On Thu, 12 Jun 2014 04:56:14 -0500 Gupta Ruchika-R66431 <ruchika.gu...@freescale.com> wrote:
> > From: Kim Phillips [mailto:kim.phill...@freescale.com] > > Sent: Thursday, June 12, 2014 4:23 AM > > > /* Check to see if QI present. If so, enable */ > > > - ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) & > > > - CTPR_QI_MASK); > > > + ctrlpriv->qi_present = > > > + !!(rd_reg32(&topregs->ctrl.perfmon.comp_parms_ms) & > > > + CTPR_MS_QI_MASK); > > > > alignment > Ok. I will correct it. > > > > > /* Report "alive" for developer to see */ > > > - dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id, > > > + dev_info(dev, "device ID = 0x%08x (Era %d)\n", caam_id, > > > caam_get_era()); > > > > Why are we dropping the upper 32 bits here? > The upper 32 bit contain the IP ID of SEC, the major number and the minor > number while the lower 32 bits have the details of the compile option, > integration and configuration options of SEC. So device ID is actually > contained only in the most significant 32 bits which are being printed here. > that may be true, but you're changing the driver to not display information it previously did, in a seemingly totally unrelated manner. This is a regression IMO - if you want the compile options specifically labelled in the display, then do that, but don't start hiding information from the user just because the h/w didn't pass an endianness change properly. Kim -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
