From: Rui Miguel Silva <rui.si...@linaro.org>

Add CAAM clock so that we could use the Cryptographic Acceleration and
Assurance Module (CAAM) hardware block.

Signed-off-by: Rui Miguel Silva <rui.si...@linaro.org>
Cc: "Horia Geantă" <horia.gea...@nxp.com>
Cc: Aymen Sghaier <aymen.sgha...@nxp.com>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: Peng Fan <peng....@nxp.com>
Cc: Herbert Xu <herb...@gondor.apana.org.au>
Cc: "David S. Miller" <da...@davemloft.net>
Cc: Lukas Auer <lukas.a...@aisec.fraunhofer.de>
Signed-off-by: Bryan O'Donoghue <pure.lo...@nexus-software.ie>
---
 drivers/clk/imx/clk-imx7d.c             | 1 +
 include/dt-bindings/clock/imx7d-clock.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 80dc211..52ab096 100644
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -795,6 +795,7 @@ static void __init imx7d_clocks_init(struct device_node 
*ccm_node)
        clks[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = 
imx_clk_gate4("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 
0x4130, 0);
        clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", 
"dram_alt_post_div", base + 0x4130, 0);
        clks[IMX7D_OCOTP_CLK] = imx_clk_gate4("ocotp_clk", "ipg_root_clk", base 
+ 0x4230, 0);
+       clks[IMX7D_CAAM_CLK] = imx_clk_gate4("caam_clk", "ipg_root_clk", base + 
0x4240, 0);
        clks[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_gate4("usb_hsic_root_clk", 
"usb_hsic_post_div", base + 0x4420, 0);
        clks[IMX7D_SDMA_CORE_CLK] = imx_clk_gate4("sdma_root_clk", 
"ahb_root_clk", base + 0x4480, 0);
        clks[IMX7D_PCIE_CTRL_ROOT_CLK] = imx_clk_gate4("pcie_ctrl_root_clk", 
"pcie_ctrl_post_div", base + 0x4600, 0);
diff --git a/include/dt-bindings/clock/imx7d-clock.h 
b/include/dt-bindings/clock/imx7d-clock.h
index e2f99ae..2bc5618 100644
--- a/include/dt-bindings/clock/imx7d-clock.h
+++ b/include/dt-bindings/clock/imx7d-clock.h
@@ -452,5 +452,6 @@
 #define IMX7D_OCOTP_CLK                        439
 #define IMX7D_NAND_RAWNAND_CLK         440
 #define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 441
-#define IMX7D_CLK_END                  442
+#define IMX7D_CAAM_CLK                 442
+#define IMX7D_CLK_END                  443
 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */
-- 
2.7.4

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