Enable x25519/x448/ecdh/ecdsa/sm2 algorithm on Kunpeng 930.

Signed-off-by: Hui Tang <tanghu...@huawei.com>
---
 drivers/crypto/hisilicon/hpre/hpre_main.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c 
b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 67f1fca..db170fc 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -30,6 +30,8 @@
 #define HPRE_BD_ARUSR_CFG              0x301030
 #define HPRE_BD_AWUSR_CFG              0x301034
 #define HPRE_TYPES_ENB                 0x301038
+#define HPRE_RSA_ENB                   BIT(0)
+#define HPRE_ECC_ENB                   BIT(1)
 #define HPRE_DATA_RUSER_CFG            0x30103c
 #define HPRE_DATA_WUSER_CFG            0x301040
 #define HPRE_INT_MASK                  0x301400
@@ -348,7 +350,12 @@ static int hpre_set_user_domain_and_cache(struct hisi_qm 
*qm)
        val |= BIT(HPRE_TIMEOUT_ABNML_BIT);
        writel_relaxed(val, HPRE_ADDR(qm, HPRE_QM_ABNML_INT_MASK));

-       writel(0x1, HPRE_ADDR(qm, HPRE_TYPES_ENB));
+       if (qm->ver >= QM_HW_V3)
+               writel(HPRE_RSA_ENB | HPRE_ECC_ENB,
+                       HPRE_ADDR(qm, HPRE_TYPES_ENB));
+       else
+               writel(HPRE_RSA_ENB, HPRE_ADDR(qm, HPRE_TYPES_ENB));
+
        writel(HPRE_QM_VFG_AX_MASK, HPRE_ADDR(qm, HPRE_VFG_AXCACHE));
        writel(0x0, HPRE_ADDR(qm, HPRE_BD_ENDIAN));
        writel(0x0, HPRE_ADDR(qm, HPRE_INT_MASK));
--
2.8.1

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