On Fri, Apr 09, 2021 at 02:56:19PM +0100, Giovanni Cabiddu wrote: > From: Wojciech Ziemba <wojciech.zie...@intel.com> > > Enable the detection of hangs by setting watchdog timers (WDTs) on > generations that supports that feature. > > The default timeout value comes from HW specs. WTDs are reset each time > an accelerator wins arbitration and is able to send/read a command to/from > an accelerator. > > The value has added significant margin to make sure there are no spurious > timeouts. The scope of watchdog is per QAT device. > > If a timeout is detected, the firmware resets the accelerator and > returns a response descriptor with an appropriate error code. > > Signed-off-by: Wojciech Ziemba <wojciech.zie...@intel.com> > Reviewed-by: Giovanni Cabiddu <giovanni.cabi...@intel.com> > --- > .../crypto/qat/qat_4xxx/adf_4xxx_hw_data.c | 1 + > .../crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 1 + > .../crypto/qat/qat_c62x/adf_c62x_hw_data.c | 1 + > .../crypto/qat/qat_common/adf_accel_devices.h | 1 + > .../crypto/qat/qat_common/adf_gen2_hw_data.c | 25 ++++++++++++ > .../crypto/qat/qat_common/adf_gen2_hw_data.h | 13 ++++++ > .../crypto/qat/qat_common/adf_gen4_hw_data.c | 40 +++++++++++++++++++ > .../crypto/qat/qat_common/adf_gen4_hw_data.h | 14 ++++++- > drivers/crypto/qat/qat_common/adf_init.c | 4 ++ > 9 files changed, 99 insertions(+), 1 deletion(-)
Patch applied. Thanks. -- Email: Herbert Xu <herb...@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
