On 22/05/18 13:33, Hans Verkuil wrote: > From: Hans Verkuil <hans.verk...@cisco.com> > > If a CEC message was received and the RX interrupt was set, but > not yet processed, and a new transmit was issues, then the
issues -> issued > transmit code would inadvertently clear the RX interrupt and > after that no new messages would ever be received. > > Instead it should only clear TX interrupts since register 0x97 > is a clear-on-write register. > > Signed-off-by: Hans Verkuil <hans.verk...@cisco.com> > --- > drivers/media/i2c/adv7511.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/i2c/adv7511.c b/drivers/media/i2c/adv7511.c > index d23505a411ee..554261291e78 100644 > --- a/drivers/media/i2c/adv7511.c > +++ b/drivers/media/i2c/adv7511.c > @@ -831,8 +831,8 @@ static int adv7511_cec_adap_transmit(struct cec_adapter > *adap, u8 attempts, > */ > adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4); > > - /* blocking, clear cec tx irq status */ > - adv7511_wr_and_or(sd, 0x97, 0xc7, 0x38); > + /* clear cec tx irq status */ > + adv7511_wr(sd, 0x97, 0x38); > > /* write data */ > for (i = 0; i < len; i++) >
