From: Kalle Jokiniemi <[EMAIL PROTECTED]>

This patch detects wether device is going into off mode and sets the
appropriate off command to be sent to voltage controller on WFI. By default
only I2C voltage lowering is used, but if user has enabled the
voltage_off_while_idle sysfs switch, SYS_OFFMODE signal is used.

Signed-off-by: Kalle Jokiniemi <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/pm.c     |   12 ++++++++++--
 arch/arm/mach-omap2/pm34xx.c |    7 +++++++
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index c89de1e..386e6c6 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -31,6 +31,7 @@
 #include <mach/powerdomain.h>
 
 #include <mach/pm.h>
+#include "prm-regbits-34xx.h"
 #include "pm.h"
 
 unsigned short enable_dyn_sleep;
@@ -87,9 +88,16 @@ static ssize_t idle_store(struct kobject *kobj, struct 
kobj_attribute *attr,
                gpio_clocks_off_while_idle = value;
        else if (attr == &uart_clocks_off_while_idle_attr)
                uart_clocks_off_while_idle = value;
-       else if (attr == &voltage_off_while_idle_attr)
+       else if (attr == &voltage_off_while_idle_attr) {
                voltage_off_while_idle = value;
-       else
+               if (voltage_off_while_idle)
+                       prm_set_mod_reg_bits(OMAP3430_SEL_OFF, OMAP3430_GR_MOD,
+                                       OMAP3_PRM_VOLTCTRL_OFFSET);
+               else
+                       prm_clear_mod_reg_bits(OMAP3430_SEL_OFF,
+                                       OMAP3430_GR_MOD,
+                                       OMAP3_PRM_VOLTCTRL_OFFSET);
+       } else
                return -EINVAL;
 
        return n;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0267959..5242ba0 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -297,6 +297,9 @@ void omap_sram_idle(void)
                        omap_serial_enable_clocks(0, 2);
                }
                if (core_next_state == PWRDM_POWER_OFF) {
+                       prm_set_mod_reg_bits(OMAP3430_AUTO_OFF,
+                                       OMAP3430_GR_MOD,
+                                       OMAP3_PRM_VOLTCTRL_OFFSET);
                        omap3_save_core_ctx();
                        omap3_save_prcm_ctx();
                        omap_save_uart_ctx(0);
@@ -334,6 +337,10 @@ void omap_sram_idle(void)
                        omap_restore_uart_ctx(0);
                        omap_restore_uart_ctx(1);
                }
+               if (core_next_state == PWRDM_POWER_OFF)
+                       prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF,
+                                       OMAP3430_GR_MOD,
+                                       OMAP3_PRM_VOLTCTRL_OFFSET);
                if (per_next_state < PWRDM_POWER_ON) {
                        per_gpio_clk_enable();
                        /* This would be actually more effective */
-- 
1.6.0

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