Hi Kevin,

On Wed, Dec 14, 2011 at 12:53 AM, Kevin Hilman <khil...@ti.com> wrote:
> Hi Jean,
>
> jean.pi...@newoldbits.com writes:
>
>> From: Jean Pihet <j-pi...@ti.com>
>>
>> . Implement the devices wake-up latency constraints using the global
>>   device PM QoS notification handler which applies the constraints to the
>>   underlying layer
>> . Implement the low level code which controls the power domains next power
>>   states, through the hwmod and pwrdm layers
>> . Add cpuidle and power domains wake-up latency figures for OMAP3, cf.
>>   comments in the code and [1] for the details on where the numbers
>>   are magically coming from
>> . Implement the relation between the cpuidle and per-device PM QoS frameworks
>>   in the OMAP3 specific idle callbacks.
>>   The chosen C-state shall satisfy the following conditions:
>>    . the 'valid' field is enabled,
>>    . it satisfies the enable_off_mode flag,
>>    . the next state for MPU and CORE power domains is not lower than the
>>      state programmed by the per-device PM QoS.
>
> I had a couple minor comments on this version, but after that, feel free
> to add:
>
> Reviewed-by: Kevin Hilman <khil...@ti.com>
Thanks for reviewing!
I fixed (most of) the minor remarks and re-submitted.

> after that, this series will go upstream through Paul.
>
> Kevin

Regards,
Jean
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