On Thu, Sep 13, 2012 at 2:26 PM, Benoit Cousson <b-cous...@ti.com> wrote:
> Hi Santosh,
>
> On 09/11/2012 11:29 AM, Shilimkar, Santosh wrote:
>> Benoit,
>>
>> On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
>> <santosh.shilim...@ti.com> wrote:
>>> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <b-cous...@ti.com> wrote:
>>>>
>>
>> [...]
>>
>>>>>> Silly question: Don't we have one arch-timer per CPU?
>>>>>>
>>>>> It is per CPU just like A9 TWD
>>>>
>>>> Shouldn't we have two nodes then?
>>>>
>>> I need to check this but arch timer DT node should be same
>>> as the twd DT node. May be one node with reference to
>>> each CPU node should do but am not too sure about the DT
>>> nodes and how all that work.
>>>
>> Here is an updated patch based on our discussion. Thanks for comments.
>> Let me know if you are ok with this version.
>
> Cool, thanks for the update.
>
>> From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
>> From: Santosh Shilimkar <santosh.shilim...@ti.com>
>> Date: Mon, 13 Aug 2012 14:39:03 +0530
>> Subject: [PATCH] ARM: OMAP5: Enable arch timer support
>>
>> Enable Cortex A15 generic timer support for OMAP5 based SOCs.
>> The CPU local timers run on the free running real time counter clock.
>>
>> Signed-off-by: Santosh Shilimkar <santosh.shilim...@ti.com>
>
> Acked-by: Benoit Cousson <b-cous...@ti.com>
>
Thanks Benoit.

> Tony,
>
> I can potentially add it along with the timer changes in the dts part2
> series if you ack the timer patch. We don't have tons of OMAP5 content
> in the dts branch so it should not conflict.
>
Yep. let me know what works. if needed I can put these two patches
on a branch and send a pull request.

Regards
santosh
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