Add base address and interrupt line inside Device Tree data for
OMAP5
Signed-off-by: Sebastien Guiriec <s-guir...@ti.com>
Reviewed-by: Shubhrajyoti D <shubhrajy...@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 737a536..07d2607 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -200,6 +200,9 @@
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48070000 0x100>;
+ interrupts = <0 56 0x4>;
+ interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
@@ -207,6 +210,9 @@
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48072000 0x100>;
+ interrupts = <0 57 0x4>;
+ interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
@@ -214,20 +220,29 @@
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
+ reg = <0x48060000 0x100>;
+ interrupts = <0 61 0x4>;
+ interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
};
- i2c4: i2c@4807A000 {
+ i2c4: i2c@4807a000 {
compatible = "ti,omap4-i2c";
+ reg = <0x4807a000 0x100>;
+ interrupts = <0 62 0x4>;
+ interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
};
- i2c5: i2c@4807C000 {
+ i2c5: i2c@4807c000 {
compatible = "ti,omap4-i2c";
+ reg = <0x4807c000 0x100>;
+ interrupts = <0 60 0x4>;
+ interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c5";
--
1.7.10.4
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