Hi Or & Co,

On Wed, 2016-05-18 at 14:45 +0300, Or Gerlitz wrote:
> On Sat, Apr 30, 2016 at 6:54 PM, Or Gerlitz <gerlitz...@gmail.com> wrote:
> > On Tue, Apr 19, 2016 at 9:30 PM, Varun Prakash <va...@chelsio.com> wrote:
> >> cxgbit.h - This file contains data structure
> >> definitions for cxgbit.ko.
> >>
> >> cxgbit_lro.h - This file contains data structure
> >> definitions for LRO support.
> >>
> >> cxgbit_main.c - This file contains code for
> >> registering with iscsi target transport and
> >> cxgb4 driver.
> >>
> >> cxgbit_cm.c - This file contains code for
> >> connection management.
> >>
> >> cxgbit_target.c - This file contains code
> >> for processing iSCSI PDU.
> >>
> >> cxgbit_ddp.c - This file contains code for
> >> Direct Data Placement.
> >
> > Wait,
> >
> > You are adding many K's LOCs to handle things like CM (connection
> > management), DDP and LRO. But your upstream solution must be using CM
> > and DDP (and LRO as well) for the HW offloaded initiator side as well,
> > not to mention the iWARP side of things.
> >
> > There must be some way to refactor things instead of repeating the
> > same bits over and over, thoughts?
> 
> Nic,
> 
> The author haven't responded... where that this stands from your point of 
> view?
> 

For an initial merge, I don't have an objection to this series wrt
drivers/target/iscsi/* improvements + prerequisites, and new standalone
cxgbit iscsit_transport driver.

That said, there are areas between cxgbi + cxgbit code that can be made
common as you've pointed out.  The Cheliso folks have mentioned off-list
that cxgbi as-is in mainline does not support LRO, and that the majority
of DDP logic is shared between initiator + target.

Are there specific pieces of logic in DDP or iWARP for cxgb* that you'd
like to see Varun + Co pursue as common code in v4.8+..?

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