On 10/08/2012 04:26 AM, Joseph Lo wrote: > Enable csite (debug and trace controller) clock at init to prevent it > be disabled. And this also the necessary clock for CPU be brought up or > resumed from a power-gate low power state (e.g., LP2).
Does it make sense to enable this clock only when entering LP2? Or do we really need to keep it on 100% of the time? -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
