On Wednesday 09 May 2007, Li Yang wrote:
> For MPC831x support, change the ehci-fsl driver to preserve
> bits set in platform code. Add a common CONFIG_USB_EHCI_FSL
> to indicate presence of Freescale EHCI SOC. Add FSL_USB2_DR_OTG
> operating mode support, thus both host and device can work for the
> mini-ab receptacle. Note: this doesn't enable OTG protocol
> support.
>
> Signed-off-by: Li Yang <[EMAIL PROTECTED]>
Looks pretty much OK, but see below.
> ---
> drivers/usb/host/Kconfig | 6 ++++++
> drivers/usb/host/ehci-fsl.c | 10 +++++++---
> drivers/usb/host/ehci-hcd.c | 2 +-
> 3 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index 6271187..8da3185 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -72,6 +72,12 @@ config USB_EHCI_BIG_ENDIAN_MMIO
> depends on USB_EHCI_HCD
> default n
>
> +config USB_EHCI_FSL
> + bool
> + default n
> + ---help---
> + Variation of ARC USB block used in some Freescale chips.
So does that mean a "select USB_EHCI_ROOT_HUB_TT" is missing?
Or is that part of the variation?
And: who sets USB_EHCI_FSL? Shouldn't there be a
"default y if MPC831x || MPC834x" etc?
> +
> config USB_ISP116X_HCD
> tristate "ISP116X HCD support"
> depends on USB
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index a524805..e802a13 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -67,7 +67,8 @@ int usb_hcd_fsl_probe(const struct hc_driver *driver,
> * in host mode.
> */
> if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
> - (pdata->operating_mode == FSL_USB2_MPH_HOST))) {
> + (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
> + (pdata->operating_mode == FSL_USB2_DR_OTG))) {
> dev_err(&pdev->dev,
> "Non Host Mode configured for %s. Wrong driver
> linked.\n",
> pdev->dev.bus_id);
> @@ -185,15 +186,18 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
> struct ehci_hcd *ehci = hcd_to_ehci(hcd);
> struct fsl_usb2_platform_data *pdata;
> void __iomem *non_ehci = hcd->regs;
> + u32 temp;
>
> pdata =
> (struct fsl_usb2_platform_data *)hcd->self.controller->
> platform_data;
> /* Enable PHY interface in the control reg. */
> - out_be32(non_ehci + FSL_SOC_USB_CTRL, 0x00000004);
> + temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
> + out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
> out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b);
>
> - if (pdata->operating_mode == FSL_USB2_DR_HOST)
> + if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
> + (pdata->operating_mode == FSL_USB2_DR_OTG))
> mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
>
> if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> index c7458f7..cc27a87 100644
> --- a/drivers/usb/host/ehci-hcd.c
> +++ b/drivers/usb/host/ehci-hcd.c
> @@ -926,7 +926,7 @@ MODULE_LICENSE ("GPL");
> #define PCI_DRIVER ehci_pci_driver
> #endif
>
> -#ifdef CONFIG_MPC834x
> +#ifdef CONFIG_USB_EHCI_FSL
> #include "ehci-fsl.c"
> #define PLATFORM_DRIVER ehci_fsl_driver
> #endif
>
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