On Tue, 2016-06-28 at 13:42 +0200, Gerhard Pircher wrote: > The question is, if a compile time option that simply clear ?s > CPU_FTR_NEED_COHERENT after identify_cpu() would be acceptable. And > then I still wonder why KVM needs its own similar fix to work on the > AmigaOne. I specifically had to remove/clear the PTE_M bit > inarch/powerpc/kvm/book3s_32_mmu_host.c for th
No we could just add something to early_init_devtree that does clear that bit if it sees the relevant piece of broken HW, it's not the AmigaOne per-se, it's the northbridge right ? We could also make non-coherent cache a runtime option if we really wanted, it's just more churn ... > 206 pteg0 = ((eaddr & 0x0fffffff) >> 22) | (vsid << 7) | > PTE_V | > 207 (primary ? 0 : PTE_SEC); > 208 pteg1 = hpaddr | PTE_M | PTE_R | PTE_C; > ^^^^^ > > > Do we know where the lockups come from btw ? A problem with the > > northbridge ? > Yes, it's a problem with the northbridge...as usual. :-( Marvell ? Cheers, Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev