On Feb 12, 2009, at 2:34 PM, Josh Boyer wrote:
On Thu, Feb 12, 2009 at 01:21:24PM -0600, Kumar Gala wrote:
On Feb 10, 2009, at 6:26 PM, Kumar Gala wrote:
The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture. Its done it such a way to be code compatiable with
the
existing HW. Made the minor code changes to support both power of
two
and power of four page sizes. Also added some new MAS bits and
macros
that are defined as part of the 2.06 ISA.
Note, its still invalid to try and use a page size that isn't
supported
by cpu.
Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
---
* Fixed MAS6_ISIZE macro
arch/powerpc/include/asm/mmu-fsl-booke.h | 54 +++++++++++++++++++
+----------
Do you want to rename asm/mmu-fsl-booke.h => mmu-booke.h (per ISA
2.06
changes)?
Misleading perhaps. ISA 2.06 is really new and we've been calling 4xx
and FSL booke for a while now.
I can call it mmu-book3e.h if you think that might enough different to
convey the ISA 2.06 fact that the FSL style MMU is now part of the 3e
architecture.
- k
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