I'm no big help, but the problem might be TLB related instead of cache related. The performance of embedded PPCs with small TLBs requiring software assist for TLB misses can be performance sensitive to TLB misses.
jeff aldo lab wrote: > I've a system Linux based on ppc8280 platform with unstable > performance from a compiling to another. > I've a board with 2 Ethernet interfaces and I inject traffic in one of > this and analyze the number of packets that I receive in the other > one. > I obtained 60000 pkt/s the first time, the second time i recompiling > the kernel just changing some died function that is not involved in > the flow of the packet.In that case I obtained 47000 pkt/s and it > seems that moving code position change the behaviour in term of cache > functionality. > Could someone help me to understand this strange situation > > Regards > Aldo > _______________________________________________ > Linuxppc-embedded mailing list > [email protected] > https://ozlabs.org/mailman/listinfo/linuxppc-embedded > _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
