================
@@ -236,5 +238,37 @@ void alignAndPadAlloca(memtag::AllocaInfo &Info,
llvm::Align Alignment) {
Info.AI = NewAI;
}
+Value *readRegister(IRBuilder<> &IRB, StringRef Name) {
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ Function *ReadRegister = Intrinsic::getDeclaration(
+ M, Intrinsic::read_register, IRB.getIntPtrTy(M->getDataLayout()));
+ MDNode *MD =
+ MDNode::get(M->getContext(), {MDString::get(M->getContext(), Name)});
+ Value *Args[] = {MetadataAsValue::get(M->getContext(), MD)};
+ return IRB.CreateCall(ReadRegister, Args);
+}
+
+Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB) {
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ if (TargetTriple.getArch() == Triple::aarch64)
+ return memtag::readRegister(IRB, "pc");
+ return IRB.CreatePtrToInt(IRB.GetInsertBlock()->getParent(),
+ IRB.getIntPtrTy(M->getDataLayout()));
+}
+
+Value *getSP(IRBuilder<> &IRB) {
+ // FIXME: use addressofreturnaddress (but implement it in aarch64 backend
----------------
fmayer wrote:
I think this is talking about the `llvm.addressofreturnaddress` intrinsic,
which we don't use
https://github.com/llvm/llvm-project/pull/84404
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