From: Marek Olšák <marek.ol...@amd.com>
This will allow removing useless cache & IB flushes.
---
src/gallium/drivers/r600/r600_hw_context.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_hw_context.c
b/src/gallium/drivers/r600/r600_hw_context.c
index 98b5c7c..bbfe620 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -406,7 +406,9 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT);
unsigned src_reloc, dst_reloc;
- r600_need_cs_space(rctx, 10 + (rctx->b.flags ?
R600_MAX_FLUSH_CS_DWORDS : 0), FALSE);
+ r600_need_cs_space(rctx,
+ 10 + (rctx->b.flags ?
R600_MAX_FLUSH_CS_DWORDS : 0) +
+ 3, FALSE);
/* Flush the caches for the first copy only. */
if (rctx->b.flags) {
@@ -441,6 +443,11 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
dst_offset += byte_count;
}
+ /* CP_DMA_CP_SYNC doesn't wait for idle on R6xx, but this does. */
+ if (rctx->b.chip_class == R600)
+ radeon_set_config_reg(cs, R_008040_WAIT_UNTIL,
+ S_008040_WAIT_CP_DMA_IDLE(1));
+
/* Invalidate the read caches. */
rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
R600_CONTEXT_INV_VERTEX_CACHE |
--
2.7.4
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