I'm choosing to shelve this series for now. Please continue along; don't waste
too
much time looking at these patches.
I am concerned by several of the Piglit regressions I've found, and want to
fix those before committing the series. I'll repost when my Piglit results
have less red and black.
--
Chad Versace
c...@chad-versace.us
On 09/23/2011 05:37 PM, Chad Versace wrote:
By default, HiZ is still disabled. This series causes no Piglit regressions
when HiZ is disabled.
When HiZ *is* enabled, it is now stable enough to run gnome-shell, nexuiz, and
openarena without any artifacts. Mipmapped depth textures, however, are still
broken, as well as many Piglit tests.
Chad Versace (18):
intel: Add HiZ operations to intel_context.vtbl
i965: Initialize intel_context.vtbl after calling intelInitContext
i965: Add stub functions for HiZ operations
i965: Set HiZ operations in brw vtbl
intel: Add HiZ control state to intel_region
intel: Add 'mode' param to intel_region_map
intel: Execute HiZ resolve ops in intel_region_map
intel: Use intel_region_map/unmap in intel_renderbuffer_map/unmap
intel: Move definition of intel_framebuffer_get_hiz_region from .h to
.c
intel: Add function intel_renderbuffer_hiz_alloc
intel: Remove intel_renderbuffer::hiz_region
i965: Add HiZ operation state to brw_context
i965: Complete stubs for HiZ operation meta-ops
i965/gen6: Don't set intel_context.reduced_primitive on Gen>= 6
i965: Change type of brw_context.primitive from GLenum to hardware
primitive
i965: Manipulate state batches for HiZ operation meta-ops
i965: After emitting a HiZ buffer, mark that it needs a HiZ resolve
i965: Do needed HiZ meta-ops before drawing
Kenneth Graunke (1):
i965/gen7: Manipulate gen7 state batches for HiZ meta-ops
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_context.c | 3 +-
src/mesa/drivers/dri/i965/brw_context.h | 37 +++-
src/mesa/drivers/dri/i965/brw_draw.c | 114 ++++++---
src/mesa/drivers/dri/i965/brw_gs.c | 44 ++--
src/mesa/drivers/dri/i965/brw_gs.h | 2 +-
src/mesa/drivers/dri/i965/brw_hiz.c | 318 +++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_hiz.h | 43 +++
src/mesa/drivers/dri/i965/brw_misc_state.c | 33 ++-
src/mesa/drivers/dri/i965/brw_vtbl.c | 10 +
src/mesa/drivers/dri/i965/gen6_clip_state.c | 17 ++
src/mesa/drivers/dri/i965/gen6_depthstencil.c | 22 ++-
src/mesa/drivers/dri/i965/gen6_sf_state.c | 16 +-
src/mesa/drivers/dri/i965/gen6_wm_state.c | 28 ++-
src/mesa/drivers/dri/i965/gen7_clip_state.c | 17 ++
src/mesa/drivers/dri/i965/gen7_misc_state.c | 33 ++-
src/mesa/drivers/dri/i965/gen7_sf_state.c | 13 +-
src/mesa/drivers/dri/i965/gen7_wm_state.c | 26 ++
src/mesa/drivers/dri/intel/intel_context.c | 14 +-
src/mesa/drivers/dri/intel/intel_context.h | 13 +-
src/mesa/drivers/dri/intel/intel_fbo.c | 65 +++--
src/mesa/drivers/dri/intel/intel_fbo.h | 23 +-
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 11 +-
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 1 +
src/mesa/drivers/dri/intel/intel_regions.c | 24 ++-
src/mesa/drivers/dri/intel/intel_regions.h | 29 ++-
src/mesa/drivers/dri/intel/intel_span.c | 13 +-
src/mesa/drivers/dri/intel/intel_tex.c | 6 +-
src/mesa/drivers/dri/intel/intel_tex.h | 6 +-
src/mesa/drivers/dri/intel/intel_tex_image.c | 2 +
src/mesa/drivers/dri/intel/intel_tex_validate.c | 15 +-
31 files changed, 851 insertions(+), 148 deletions(-)
create mode 100644 src/mesa/drivers/dri/i965/brw_hiz.c
create mode 100644 src/mesa/drivers/dri/i965/brw_hiz.h
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