From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index ee9a261..1f8904c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -459,26 +459,26 @@ scan_instruction(struct tgsi_shader_info *info,
tgsi_util_get_inst_usage_mask(fullinst, i),
is_interp_instruction, &is_mem_inst);
}
if (fullinst->Instruction.Texture) {
for (i = 0; i < fullinst->Texture.NumOffsets; i++) {
struct tgsi_full_src_register src = {{0}};
src.Register.File = fullinst->TexOffsets[i].File;
src.Register.Index = fullinst->TexOffsets[i].Index;
- src.Register.SwizzleX = fullinst->TexOffsets[i].SwizzleX;
- src.Register.SwizzleY = fullinst->TexOffsets[i].SwizzleY;
- src.Register.SwizzleZ = fullinst->TexOffsets[i].SwizzleZ;
/* The usage mask is suboptimal but should be safe. */
- scan_src_operand(info, fullinst, &src, -1, TGSI_WRITEMASK_XYZ,
+ scan_src_operand(info, fullinst, &src, -1,
+ (1 << fullinst->TexOffsets[i].SwizzleX) |
+ (1 << fullinst->TexOffsets[i].SwizzleY) |
+ (1 << fullinst->TexOffsets[i].SwizzleZ),
false, &is_mem_inst);
}
}
/* check for indirect register writes */
for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
if (dst->Register.Indirect) {
info->indirect_files |= (1 << dst->Register.File);
info->indirect_files_written |= (1 << dst->Register.File);
--
2.7.4
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