The section 'Execution Data Types' of 3D Media GPGPU volume, which
describes execution types, is exactly the same in BDW and SKL+.
Also, this section states that there is a single execution type, so it
makes sense that this is the wider of the two floating point types
involved in mixed float mode, which is what we do for SKL+ and CHV.
---
src/intel/compiler/brw_eu_validate.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/src/intel/compiler/brw_eu_validate.c
b/src/intel/compiler/brw_eu_validate.c
index 358a0347a93..000a05cb6ac 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -431,18 +431,14 @@ execution_type(const struct gen_device_info *devinfo,
const brw_inst *inst)
src1_exec_type == BRW_REGISTER_TYPE_DF)
return BRW_REGISTER_TYPE_DF;
- if (devinfo->gen >= 9 || devinfo->is_cherryview) {
- if (dst_exec_type == BRW_REGISTER_TYPE_F ||
- src0_exec_type == BRW_REGISTER_TYPE_F ||
- src1_exec_type == BRW_REGISTER_TYPE_F) {
- return BRW_REGISTER_TYPE_F;
- } else {
- return BRW_REGISTER_TYPE_HF;
- }
+ if (dst_exec_type == BRW_REGISTER_TYPE_F ||
+ src0_exec_type == BRW_REGISTER_TYPE_F ||
+ src1_exec_type == BRW_REGISTER_TYPE_F) {
+ return BRW_REGISTER_TYPE_F;
+ } else {
+ assert(devinfo->gen >= 8 && src0_exec_type == BRW_REGISTER_TYPE_HF);
+ return BRW_REGISTER_TYPE_HF;
}
-
- assert(src0_exec_type == BRW_REGISTER_TYPE_F);
- return BRW_REGISTER_TYPE_F;
}
/**
--
2.17.1
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