Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
---
src/amd/vulkan/radv_nir_to_llvm.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index b72d1aa0023..9644185f870 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -1004,13 +1004,6 @@ static void create_function(struct radv_shader_context
*ctx,
struct arg_info args = {};
LLVMValueRef desc_sets;
bool needs_view_index = needs_view_index_sgpr(ctx, stage);
- allocate_user_sgprs(ctx, stage, has_previous_stage,
- previous_stage, needs_view_index, &user_sgpr_info);
-
- if (user_sgpr_info.need_ring_offsets && !ctx->options->supports_spill) {
- add_arg(&args, ARG_SGPR,
ac_array_in_const_addr_space(ctx->ac.v4i32),
- &ctx->ring_offsets);
- }
if (ctx->ac.chip_class >= GFX10) {
if (is_pre_gs_stage(stage) && ctx->options->key.vs.out.as_ngg) {
@@ -1021,6 +1014,14 @@ static void create_function(struct radv_shader_context
*ctx,
}
}
+ allocate_user_sgprs(ctx, stage, has_previous_stage,
+ previous_stage, needs_view_index, &user_sgpr_info);
+
+ if (user_sgpr_info.need_ring_offsets && !ctx->options->supports_spill) {
+ add_arg(&args, ARG_SGPR,
ac_array_in_const_addr_space(ctx->ac.v4i32),
+ &ctx->ring_offsets);
+ }
+
switch (stage) {
case MESA_SHADER_COMPUTE:
declare_global_input_sgprs(ctx, &user_sgpr_info, &args,
--
2.22.0
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