On Fri, Jun 01, 2012 at 11:54:37AM +0200, Vaclav Peroutka wrote:
> Hallo Mathias,
>
> why does name matter ? I apologize but I can not say it.

Really ?

> > We still waiting for the right name of the magic NEW CM3.
> [...]
> > >> Hello,
> > >>
> > >> for one new device I want to use OpenOCD debugger. I changed the
> > >> script and got following message:
> > >>
> > >> Open On-Chip Debugger 0.6.0-dev-00497-ga6cf60c (2012-04-06-08:15)
> > >> Licensed under GNU GPL v2
> > >> For bug reports, read
> > >>         http://openocd.sourceforge.net/doc/doxygen/bugs.html
> > >> Info : only one transport option; autoselect 'jtag'
> > >> 300 kHz
> > >> srst_only separate srst_gates_jtag srst_open_drain
> > >> adapter_nsrst_delay: 100
> > >> jtag_ntrst_delay: 100
> > >> cortex_m3 reset_config sysresetreq
> > >> Info : clock speed 300 kHz
> > >> Info : JTAG tap: newcm3.cpu tap/device found: 0x4ba00477 (mfg:
> > >> 0x23b, part: 0xba00, ver: 0x4)

Well, 0x4ba00477 is the device ID of the recent NXP LPC18xx Cortex-M3
microcontroller, which is already available in the wild.
It seems that only flash-less versions of the chip are currently
available for purchase, so they are commonly used with external CFI
flash.

I'm currently testing a Diolan LPC1850-DB1 board
(http://www.lpc1850.com/), and I am able to flash the CFI chip with
openocd.

For this to work, you will need a more recent version of openocd,
containing at least this commit :
http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd;a=commit;h=9d31589d19b1c9c4cbde5c361c046d735c43c215

An you will also need to setup all the EMC related registers (using
openocd mww command) so that the flash chip is available to to CM3 core
before trying to detect of write the flash in openocd.

Aurel

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