Hi!
I have a code for STM32F100C4T6B that is run from SRAM. Problem is, that
I'm unable to set breakpoint for address in SRAM area. My setup is
following:
- JTAG Turtelizer2 clone (ft2232 based)
- latest OpenOCD from git [08ddb19f] (but older versions tested as
well), executed like:
openocd -f interface/turtelizer2.cfg -d 3 -c "gdb_breakpoint_override
soft" -c "gdb_memory_map enable" -c "gdb_flash_program enable" -f
target/stm32f1x.cfg -c "adapter_khz 700" -c "reset_config srst_pulls_trst"
- I changed workarea size from 16kB to 4kB
- gcc 4.6/gdb 7.3 from Linaro (Codesourcery tested too)
- Eclipse 3.8, GDB HW Debugging using following startup code:
monitor reset init
monitor reset halt
- I checked Zylin Eclipse plugin, but problem is the same
What works:
- set breakpoint for flash code address, press resume, target halts as
expected
- set breakpoint just before jump to SRAM code, stepping in SRAM code
works OK
What doesn't work:
- set breakpoint in SRAM code, press resume, target is running without
halting on breakpoint (program is running as expected)
- set breakpoint just before jump to SRAM code, stepping in SRAM code
works OK, but then setting breakpoint in SRAM and resume doesn't halt target
Here are logs from OpenOCD for first fail case:
Debug: 1185 14545 gdb_server.c:2051 gdb_input_inner(): received packet:
'Z0,20000324,2'
Debug: 1186 14545 gdb_server.c:1401 gdb_breakpoint_watchpoint_packet(): -
Debug: 1187 14550 cortex_m.c:1173 cortex_m3_set_breakpoint(): BPID: 1,
Type: 1, Address: 0x20000324 Length: 2 (set=1)
Debug: 1188 14550 breakpoints.c:106 breakpoint_add_internal(): added
software breakpoint at 0x20000324 of length 0x00000002, (BPID: 1)
Debug: 1189 14550 gdb_server.c:2051 gdb_input_inner(): received packet: 'c'
Debug: 1190 14550 target.c:1310 target_call_event_callbacks(): target
event 5 (gdb-start)
Debug: 1191 14550 gdb_server.c:1369 gdb_step_continue_packet(): -
Debug: 1192 14550 gdb_server.c:1378 gdb_step_continue_packet(): continue
Debug: 1193 14550 target.c:1310 target_call_event_callbacks(): target
event 3 (resume-start)
Debug: 1194 14550 target.c:1631 target_free_all_working_areas_restore():
freeing all working areas
Debug: 1195 14550 target.c:1397 print_wa_layout():
0x20000000-0x20000fff (4096 bytes)
Debug: 1196 14552 target.c:1952 target_read_u16(): address: 0x080001d0,
value: 0x2100
Debug: 1197 14552 armv7m.c:144 armv7m_restore_context():
Debug: 1198 14560 cortex_m.c:1597 cortex_m3_store_core_reg_u32(): write
special reg 19 value 0x0
Debug: 1199 14560 armv7m.c:252 armv7m_write_core_reg(): write core reg
19 value 0x0
Debug: 1200 14564 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 16 value 0x1000000
Debug: 1201 14564 armv7m.c:252 armv7m_write_core_reg(): write core reg
16 value 0x1000000
Debug: 1202 14568 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 15 value 0x80001d1
Debug: 1203 14568 armv7m.c:252 armv7m_write_core_reg(): write core reg
15 value 0x80001d1
Debug: 1204 14572 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 4 value 0x40011000
Debug: 1205 14572 armv7m.c:252 armv7m_write_core_reg(): write core reg 4
value 0x40011000
Debug: 1206 14576 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 3 value 0x2000036c
Debug: 1207 14576 armv7m.c:252 armv7m_write_core_reg(): write core reg 3
value 0x2000036c
Debug: 1208 14580 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 2 value 0xe000e010
Debug: 1209 14580 armv7m.c:252 armv7m_write_core_reg(): write core reg 2
value 0xe000e010
Debug: 1210 14584 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 1 value 0x3
Debug: 1211 14584 armv7m.c:252 armv7m_write_core_reg(): write core reg 1
value 0x3
Debug: 1212 14588 cortex_m.c:1564 cortex_m3_store_core_reg_u32(): write
core reg 0 value 0x12b
Debug: 1213 14588 armv7m.c:252 armv7m_write_core_reg(): write core reg 0
value 0x12b
Debug: 1214 14590 target.c:1310 target_call_event_callbacks(): target
event 2 (resumed)
Debug: 1215 14590 cortex_m.c:781 cortex_m3_resume(): target resumed at
0x80001d1
Debug: 1216 14590 target.c:1310 target_call_event_callbacks(): target
event 4 (resume-end)
So, it seems that software breakpoint is set correctly by gdb...
Here is my linker script (2kB flash size is on purpose) if it may help
analyze problem:
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = 0x20001000; /* end of 4K RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0; /* required amount of heap */
_Min_Stack_Size = 0x200; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 4K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text.Reset_Handler)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.ARM.attributes 0 : { *(.ARM.attributes) }
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
/* used by the startup to initialize data */
_sidata = .;
} >FLASH
.vectors :
{
. = ALIGN(4);
_svector = .;
. = . + SIZEOF(.isr_vector);
} >RAM
/* Initialized data sections goes into RAM, load LMA copy after code */
.data : AT(_sidata)
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss
secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
PROVIDE ( end = _ebss );
PROVIDE ( _end = _ebss );
/* User_heap_stack section, used to check that there is enough RAM
left */
._user_heap_stack :
{
. = ALIGN(4);
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(4);
} >RAM
/* MEMORY_bank1 section, code must be located here explicitly
*/
/* Example: extern int foo(void) __attribute__ ((section
(".mb1text"))); */
.memory_b1_text :
{
*(.mb1text) /* .mb1text sections (code) */
*(.mb1text*) /* .mb1text* sections (code) */
*(.mb1rodata) /* read-only data (constants) */
*(.mb1rodata*)
} >MEMORY_B1
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
}
Any hints what's wrong?
Best regards,
Krzysztof
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