Hi,
I was surprised to find that the ST-Link interface does not
support DCC target requests,
even for ARM Cortex-M3 CPUs supported via other JTAG interfaces.
The attached patch adds that ST-Link support for DCC target
requests.
It is tested only on the STM32L-discovery board, but should work
on all STLINK Cortex-m3 targets.
Only the file stm32_stlink.c is modified.
The code was (very obviously) derived from the existing
Cortex-M3 support for DCC.
It should handle tracepoints and the rest, but I have only
tested console output.
I realize that the procedure is to use Git for patch review,
however, before I invest more time and energy, I'd appreciate a
quick thumbs up or down on this.
Is that enhancement desired? Is anyone willing to review it?
To test it with other ST-Link boards?
Is the patch in a form that could be accepted without major rework?
If anyone wishes to adopt the patch as their own, I'd be more
than happy to support your efforts in getting it accepted.
I doubt I'll be able to shepard it through the process myself
for another couple months.
Looking forward, I think the code for all the DCC support for
Cortex-M3 should have a state machine added for handling partial
command reads. The current code (both for JTAG and this ST-Link
patch) assumes that the target will supply bytes faster than the
host can read them. However, this may not be the case when the
target is heavily interrupt bound.
- brent
--- original/stm32_stlink.c 2013-01-06 16:47:39.499308560 -0800
+++ ./stm32_stlink.c 2013-01-06 23:02:51.884625055 -0800
@@ -37,6 +37,7 @@
#include "armv7m.h"
#include "cortex_m.h"
#include "arm_semihosting.h"
+#include "target_request.h"
#define ARMV7M_SCS_DCRSR 0xe000edf4
#define ARMV7M_SCS_DCRDR 0xe000edf8
@@ -265,6 +266,79 @@
return ERROR_OK;
}
+static int stm32_stlink_dcc_read(struct stlink_interface_s *stlink_if, uint8_t *value, uint8_t *ctrl)
+{
+ uint16_t dcrdr;
+ int retval = stlink_if->layout->api->read_mem8(stlink_if->fd,
+ DCB_DCRDR, sizeof(dcrdr), (uint8_t *)&dcrdr);
+ if (retval == ERROR_OK) {
+ *ctrl = (uint8_t)dcrdr;
+ *value = (uint8_t)(dcrdr >> 8);
+
+ LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
+
+ /* write ack back to software dcc register
+ * signify we have read data */
+ if (dcrdr & (1 << 0)) {
+ dcrdr = 0;
+ retval = stlink_if->layout->api->write_mem8(stlink_if->fd,
+ DCB_DCRDR, 1, (uint8_t *)&dcrdr);
+ }
+ }
+ return retval;
+}
+
+static int stm32_stlink_target_request_data(struct target *target,
+ uint32_t size, uint8_t *buffer)
+{
+ struct stlink_interface_s *stlink_if = target_to_stlink(target);
+ uint8_t data;
+ uint8_t ctrl;
+ uint32_t i;
+
+ for (i = 0; i < (size * 4); i++) {
+ stm32_stlink_dcc_read(stlink_if, &data, &ctrl);
+ buffer[i] = data;
+ }
+
+ return ERROR_OK;
+}
+
+static int stm32_stlink_handle_target_request(void *priv)
+{
+ struct target *target = priv;
+ if (!target_was_examined(target))
+ return ERROR_OK;
+ struct stlink_interface_s *stlink_if = target_to_stlink(target);
+
+ if (!target->dbg_msg_enabled)
+ return ERROR_OK;
+
+ if (target->state == TARGET_RUNNING) {
+ uint8_t data;
+ uint8_t ctrl;
+
+ stm32_stlink_dcc_read(stlink_if, &data, &ctrl);
+
+ /* check if we have data */
+ if (ctrl & (1 << 0)) {
+ uint32_t request;
+
+ /* we assume target is quick enough */
+ request = data;
+ stm32_stlink_dcc_read(stlink_if, &data, &ctrl);
+ request |= (data << 8);
+ stm32_stlink_dcc_read(stlink_if, &data, &ctrl);
+ request |= (data << 16);
+ stm32_stlink_dcc_read(stlink_if, &data, &ctrl);
+ request |= (data << 24);
+ target_request(target, request);
+ }
+ }
+
+ return ERROR_OK;
+}
+
static int stm32_stlink_init_arch_info(struct target *target,
struct cortex_m3_common *cortex_m3,
struct jtag_tap *tap)
@@ -282,6 +356,8 @@
armv7m->examine_debug_reason = stm32_stlink_examine_debug_reason;
armv7m->stlink = true;
+ target_register_timer_callback(stm32_stlink_handle_target_request, 1, 1, target);
+
return ERROR_OK;
}
@@ -782,6 +858,8 @@
.poll = stm32_stlink_poll,
.arch_state = armv7m_arch_state,
+ .target_request_data = stm32_stlink_target_request_data,
+
.assert_reset = stm32_stlink_assert_reset,
.deassert_reset = stm32_stlink_deassert_reset,
.soft_reset_halt = stm32_stlink_soft_reset_halt,
------------------------------------------------------------------------------
Master Visual Studio, SharePoint, SQL, ASP.NET, C# 2012, HTML5, CSS,
MVC, Windows 8 Apps, JavaScript and much more. Keep your skills current
with LearnDevNow - 3,200 step-by-step video tutorials by Microsoft
MVPs and experts. SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122412
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel
