Hello,

I am using OpenOCD with a Olimex ARM-JTAG parallel port JTAG interface
to connect to a LPC3131 based board (the Olimex LPC-H3131) and I am
having problems with a reset based halt timing out.

I have previously used this OpenOCD/JTAG interface combination with a
SAM7S256 board and it works perfectly so the problem appears to be
something LPC3131 specific. I have tried OpenOCD versions 0.4.0 and
0.5.0 without any change in behaviour.

The TRST and SRST lines are both connected on the board so I have used
"reset_config trst_and_srst" in my configuration. (BTW, I noticed that
although there is a reset-init procedure in the lpc3131.cfg script,
there is no definition for reset_config. Is this considered to be a
board level attribute and hence expected to be defined in a board
level  script ?)

My command line (one long command; I put the backslashes in for posting):

/path/to/openocd -c "reset_config trst_and_srst" \
        -f interface/parport.cfg -f target/lpc3131.cfg \
        -c "adapter_khz 500"

and the resulting output from the telnet interface:

===========================================================
> reset init
JTAG tap: lpc3131.cpu tap/device found: 0x07926f0f (mfg: 0x787, part:
0x7926, ver: 0x0)
timed out while waiting for target halted
TARGET: lpc3131.cpu - Not halted

in procedure 'reset'
===========================================================

The board is running a blinker application which stops after this
reset init command, so it appears the board is been halted even though
OpenOCD thinks it has not:

===========================================================
> arm reg
error: target must be halted for register accesses
in procedure 'arm'
> targets
    TargetName         Type       Endian TapName            State
--  ------------------ ---------- ------ ------------------ ------------
 0* lpc3131.cpu        arm926ejs  little lpc3131.cpu        running
===========================================================

If I defer the halt until after the reset by telling OpenOCD
(incorrectly) that SRST pulls TRST, the halt works:

/path/to/openocd -c "reset_config trst_and_srst srst_pulls_trst" \
        -f interface/parport.cfg -f target/lpc3131.cfg \
        -c "adapter_khz 500"

===========================================================
> reset init
JTAG tap: lpc3131.cpu tap/device found: 0x07926f0f (mfg: 0x787, part:
0x7926, ver: 0x0)
srst pulls trst - can not reset into halted mode. Issuing halt after reset.
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x6000001f pc: 0x1102e114
MMU: disabled, D-Cache: disabled, I-Cache: enabled

Running reset init script for LPC3131

cpsr (/32): 0xA00000D3
pc (/32): 0x11029000
background polling: off
TAP: lpc3131.cpu (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x11029000
MMU: disabled, D-Cache: disabled, I-Cache: enabled
===========================================================

While I have a workaround with srst_pulls_trst, it would be nice to
fix the real problem.

Does anyone have any ideas ?

Thanks,

Simon.

-- 
Simon Clubley
simon.club...@googlemail.com
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