On Thu, Oct 28, 2004 at 09:17:32PM -0700, Martin Peck wrote: > I am assuming you are using an EGD to process raw entropy from > /dev/hw_random or direct xstore reads into /dev/random. You do not > want to use entropy from /dev/hw_random without doing some FIPS sanity > checks first.
http://www.cryptography.com/resources/whitepapers/VIA_rng.pdf claims between 0.75 to 0.99 bits of entropy. http://peertech.org/hardware/viarng/C5HardwareEntropy.html ... VIA PadLock Engine in the C5XL and C5P Processors The C5XL is one of the first versions of the C5 line that includes the new Nehemiah core and PadLock data encryption engine. In this case PadLock refers to the hardware entropy source, while in the C5P support for AES has also been added. When Centaur designed this entropy source, they went far and above what most might consider adequate and built a random number generator that can deliver over 40-60Mbps of data in raw mode, and 6-10Mbps with the von Neumann compressor enabled to whiten the output. The C5P improves on this further and provides two hardware entropy sources on die which can both feed the xstore instruction. With two of these entropy sources enabled CPU overhead becomes the limiting factor when pulling entropy from the hardware. The C5J will have multiple SHA-1 digests on the core; the entropy sources can be configured to perform an SHA-1 digest before returning data via the xstore instruction. While obscuring internal RNG state this also inhibits FIPS testing on generated output. The benefits and tradeoff's of such a configuration should be considered carefully. ... -- Eugen* Leitl <a href="http://leitl.org";>leitl</a> ______________________________________________________________ ICBM: 48.07078, 11.61144 http://www.leitl.org 8B29F6BE: 099D 78BA 2FD3 B014 B08A 7779 75B0 2443 8B29 F6BE http://moleculardevices.org http://nanomachines.net
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