Hello community, here is the log from the commit of package glibc for openSUSE:11.4 checked in at Tue Sep 20 12:06:30 CEST 2011.
-------- --- old-versions/11.4/UPDATES/all/glibc/glibc.changes 2011-07-27 10:18:08.000000000 +0200 +++ 11.4/glibc/glibc.changes 2011-09-19 20:43:40.000000000 +0200 @@ -1,0 +2,6 @@ +Mon Sep 19 18:42:51 UTC 2011 - [email protected] + +- Do not not trigger an abort when an i586 Intel CPU is running the + i686 library, as valgrind does. [bnc#681398] + +------------------------------------------------------------------- calling whatdependson for 11.4-i586 Old: ---- minmem New: ---- x86-cpuid-level2.patch ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ glibc.spec ++++++ --- /var/tmp/diff_new_pack.5svf2o/_old 2011-09-20 12:06:04.000000000 +0200 +++ /var/tmp/diff_new_pack.5svf2o/_new 2011-09-20 12:06:04.000000000 +0200 @@ -65,7 +65,7 @@ Provides: rtld(GNU_HASH) AutoReqProv: on Version: 2.11.3 -Release: 12.<RELEASE17> +Release: 12.<RELEASE19> Url: http://www.gnu.org/software/libc/libc.html PreReq: filesystem BuildRoot: %{_tmppath}/%{name}-%{version}-build @@ -142,6 +142,7 @@ Patch50: glibc-gconvcache-s390.diff Patch51: glibc-vfprintf-positional.diff Patch52: glibc-elf-localscope.diff +Patch53: x86-cpuid-level2.patch Patch500: ARM_glibc-2.10.1-local-eabi-wchar.diff Patch501: ARM_glibc-2.10.1-local-hwcap-updates.diff Patch502: ARM_glibc-2.10.1-local-lowlevellock.diff @@ -363,6 +364,7 @@ %patch50 %patch51 -p1 %patch52 +%patch53 -p1 %ifarch %arm armv5tel armv7l %patch500 %patch501 ++++++ x86-cpuid-level2.patch ++++++ openSUSE bug report: https://bugzilla.novell.com/show_bug.cgi?id=681398 Patch from Debian, see http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=584748 --- sysdeps/x86_64/cacheinfo.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) --- a/sysdeps/x86_64/cacheinfo.c +++ b/sysdeps/x86_64/cacheinfo.c @@ -254,7 +254,13 @@ static long int __attribute__ ((noinline)) handle_intel (int name, unsigned int maxidx) { - assert (maxidx >= 2); + if (maxidx <= 2) + { + /* This should never happen as all Intel i686 CPU support a CPUID + level of 2 minimum. However valgrind sometimes load the i686 + library with a P55C CPUID. Return 0 in that case. */ + return 0; + } /* OK, we can use the CPUID instruction to get all info about the caches. */ ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Remember to have fun... -- To unsubscribe, e-mail: [email protected] For additional commands, e-mail: [email protected]
