Hello community,

here is the log from the commit of package Mesa for openSUSE:Factory checked in 
at 2013-09-23 10:04:37
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/Mesa (Old)
 and      /work/SRC/openSUSE:Factory/.Mesa.new (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "Mesa"

Changes:
--------
--- /work/SRC/openSUSE:Factory/Mesa/Mesa.changes        2013-09-16 
19:37:18.000000000 +0200
+++ /work/SRC/openSUSE:Factory/.Mesa.new/Mesa.changes   2013-09-23 
10:04:38.000000000 +0200
@@ -1,0 +2,9 @@
+Tue Sep 17 17:50:56 UTC 2013 - [email protected]
+
+- Added U_radeon-winsys-pad-IBs-to-a-multiple-of-8-DWs.patch from
+  upstream -- aligns the gfx, compute, and dma IBs to 8 DW boundries.
+  Additionally, r6xx hardware requires at least 4
+  DW alignment to avoid a hw bug.  This also aligns the DMA
+  IBs to 8 DW which is required for the DMA engine.
+
+-------------------------------------------------------------------

New:
----
  U_radeon-winsys-pad-IBs-to-a-multiple-of-8-DWs.patch

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ Mesa.spec ++++++
--- /var/tmp/diff_new_pack.4AWhap/_old  2013-09-23 10:04:39.000000000 +0200
+++ /var/tmp/diff_new_pack.4AWhap/_new  2013-09-23 10:04:39.000000000 +0200
@@ -111,6 +111,8 @@
 # PATCH-FIX-UPSTREAM gallium-egl-gbm-use-wayland-cflags.patch -- use pkgconfig 
for finding wayland
 Patch16:        u_gallium-egl-gbm-use-wayland-cflags.patch
 Patch18:        U_wayland-egl-pc-require-wayland.patch
+# PATCH-FIX-UPSTREAM U_radeon-winsys-pad-IBs-to-a-multiple-of-8-DWs.patch -- 
from 
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a81beee37e0dd7b75422448420e8e8b0b4b76c1e
+Patch19:        U_radeon-winsys-pad-IBs-to-a-multiple-of-8-DWs.patch
 
 BuildRoot:      %{_tmppath}/%{name}-%{version}-build
 
@@ -534,6 +536,7 @@
 %patch16 -p1
 %endif
 %patch18 -p1
+%patch19 -p1
 
 %build
 

++++++ U_radeon-winsys-pad-IBs-to-a-multiple-of-8-DWs.patch ++++++
>From a81beee37e0dd7b75422448420e8e8b0b4b76c1e Mon Sep 17 00:00:00 2001
From: Alex Deucher <[email protected]>
Date: Fri, 6 Sep 2013 16:43:34 -0400
Subject: [PATCH 1/1] radeon/winsys: pad IBs to a multiple of 8 DWs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This aligns the gfx, compute, and dma IBs to 8 DW boundries.
This aligns the the IB to the fetch size of the CP for optimal
performance. Additionally, r6xx hardware requires at least 4
DW alignment to avoid a hw bug.  This also aligns the DMA
IBs to 8 DW which is required for the DMA engine.  This
alignment is already handled in the gallium driver, but that
patch can be removed now that it's done in the winsys.

Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
CC: "9.2" <[email protected]>
CC: "9.1" <[email protected]>
---
 src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 30 +++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c 
b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index ea0c99d..38a9209 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -466,6 +466,36 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs 
*rcs, unsigned flags, ui
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_cs_context *tmp;
 
+    switch (cs->base.ring_type) {
+    case RING_DMA:
+           /* pad DMA ring to 8 DWs */
+           if (cs->ws->info.chip_class <= SI) {
+                   while (rcs->cdw & 7)
+                           OUT_CS(&cs->base, 0xf0000000); /* NOP packet */
+           } else {
+                   while (rcs->cdw & 7)
+                           OUT_CS(&cs->base, 0x00000000); /* NOP packet */
+           }
+           break;
+    case RING_GFX:
+           /* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
+            * r6xx, requires at least 4 dw alignment to avoid a hw bug.
+            */
+            if (flags & RADEON_FLUSH_COMPUTE) {
+                   if (cs->ws->info.chip_class <= SI) {
+                           while (rcs->cdw & 7)
+                                   OUT_CS(&cs->base, 0x80000000); /* type2 nop 
packet */
+                   } else {
+                           while (rcs->cdw & 7)
+                                   OUT_CS(&cs->base, 0xffff1000); /* type3 nop 
packet */
+                   }
+           } else {
+                   while (rcs->cdw & 7)
+                           OUT_CS(&cs->base, 0x80000000); /* type2 nop packet 
*/
+           }
+           break;
+    }
+
     if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {
        fprintf(stderr, "radeon: command stream overflowed\n");
     }
-- 
1.8.4

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