> -----Original Message-----
> From: Taylor Simpson <ltaylorsimp...@gmail.com>
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain <bc...@quicinc.com>; Matheus Bernardino (QUIC)
> <quic_mathb...@quicinc.com>; Sid Manning <sidn...@quicinc.com>; Marco
> Liebel (QUIC) <quic_mlie...@quicinc.com>; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng; ltaylorsimp...@gmail.com
> Subject: [PATCH v2 8/9] Hexagon (target/hexagon) Remove unused
> WRITES_PRED_REG attribute
>
> WARNING: This email originated from outside of Qualcomm. Please be wary of
> any links or attachments, and do not enable macros.
>
> This is the only remaining use of the is_written function. We will
> remove it in the subsequent commit.
>
> Signed-off-by: Taylor Simpson <ltaylorsimp...@gmail.com>
> ---
> target/hexagon/attribs_def.h.inc | 1 -
> target/hexagon/hex_common.py | 11 -----------
> 2 files changed, 12 deletions(-)
>
> diff --git a/target/hexagon/attribs_def.h.inc
> b/target/hexagon/attribs_def.h.inc
> index 21d457fa4a..87942d46f4 100644
> --- a/target/hexagon/attribs_def.h.inc
> +++ b/target/hexagon/attribs_def.h.inc
> @@ -117,7 +117,6 @@ DEF_ATTRIB(IMPLICIT_READS_P1, "Reads the P1
> register", "", "")
> DEF_ATTRIB(IMPLICIT_READS_P2, "Reads the P2 register", "", "")
> DEF_ATTRIB(IMPLICIT_READS_P3, "Reads the P3 register", "", "")
> DEF_ATTRIB(IMPLICIT_WRITES_USR, "May write USR", "", "")
> -DEF_ATTRIB(WRITES_PRED_REG, "Writes a predicate register", "", "")
> DEF_ATTRIB(COMMUTES, "The operation is communitive", "", "")
> DEF_ATTRIB(DEALLOCRET, "dealloc_return", "", "")
> DEF_ATTRIB(DEALLOCFRAME, "deallocframe", "", "")
> diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
> index 4565dd1953..ca5e9630c1 100755
> --- a/target/hexagon/hex_common.py
> +++ b/target/hexagon/hex_common.py
> @@ -94,10 +94,6 @@ def is_cond_call(tag):
> def calculate_attribs():
> add_qemu_macro_attrib("fREAD_PC", "A_IMPLICIT_READS_PC")
> add_qemu_macro_attrib("fTRAP", "A_IMPLICIT_READS_PC")
> - add_qemu_macro_attrib("fWRITE_P0", "A_WRITES_PRED_REG")
> - add_qemu_macro_attrib("fWRITE_P1", "A_WRITES_PRED_REG")
> - add_qemu_macro_attrib("fWRITE_P2", "A_WRITES_PRED_REG")
> - add_qemu_macro_attrib("fWRITE_P3", "A_WRITES_PRED_REG")
> add_qemu_macro_attrib("fSET_OVERFLOW", "A_IMPLICIT_WRITES_USR")
> add_qemu_macro_attrib("fSET_LPCFG", "A_IMPLICIT_WRITES_USR")
> add_qemu_macro_attrib("fLOAD", "A_SCALAR_LOAD")
> @@ -122,13 +118,6 @@ def calculate_attribs():
> continue
> macro = macros[macname]
> attribdict[tag] |= set(macro.attribs)
> - # Figure out which instructions write predicate registers
> - tagregs = get_tagregs()
> - for tag in tags:
> - regs = tagregs[tag]
> - for regtype, regid in regs:
> - if regtype == "P" and is_written(regid):
> - attribdict[tag].add("A_WRITES_PRED_REG")
> # Mark conditional jumps and calls
> # Not all instructions are properly marked with A_CONDEXEC
> for tag in tags:
> --
> 2.34.1
Reviewed-by: Brian Cain <bc...@quicinc.com>
