Signed-off-by: Clément Mathieu--Drif <clement.mathieu--d...@eviden.com> --- hw/i386/intel_iommu.c | 6 ++++++ include/hw/i386/intel_iommu.h | 1 + 2 files changed, 7 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 4b54a45107..c35ccc3a98 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3704,6 +3704,7 @@ static Property vtd_properties[] = { DEFINE_PROP_BOOL("x-scalable-mode", IntelIOMMUState, scalable_mode, FALSE), DEFINE_PROP_BOOL("snoop-control", IntelIOMMUState, snoop_control, false), DEFINE_PROP_BOOL("x-pasid-mode", IntelIOMMUState, pasid, false), + DEFINE_PROP_BOOL("flts", IntelIOMMUState, flts, false), DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true), DEFINE_PROP_BOOL("dma-translation", IntelIOMMUState, dma_translation, true), DEFINE_PROP_END_OF_LIST(), @@ -4413,6 +4414,11 @@ static void vtd_init(IntelIOMMUState *s) s->ecap |= VTD_ECAP_PASID; } + if (s->flts) { + s->ecap |= VTD_ECAP_FLTS; + s->cap |= VTD_CAP_FS1GP; + } + vtd_reset_caches(s); /* Define registers with default values and bit semantics */ diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index b9a01556ec..6ecc8bb8a9 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -263,6 +263,7 @@ struct IntelIOMMUState { bool caching_mode; /* RO - is cap CM enabled? */ bool scalable_mode; /* RO - is Scalable Mode supported? */ bool snoop_control; /* RO - is SNP filed supported? */ + bool flts; /* RO - is FS translation supported? */ dma_addr_t root; /* Current root table pointer */ bool root_scalable; /* Type of root table (scalable or not) */ -- 2.44.0