On 1/27/23 07:55, Peter Maydell wrote:
Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 fine-grained traps.
These trap execution of the SVC instruction from AArch32 and AArch64.
(As usual, AArch32 can only trap from EL0, as fine grained traps are
disabled with an AArch32 EL1.)
Signed-off-by: Peter Maydell<peter.mayd...@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/translate.h | 2 ++
target/arm/helper.c | 20 ++++++++++++++++++++
target/arm/translate-a64.c | 9 ++++++++-
target/arm/translate.c | 12 +++++++++---
5 files changed, 40 insertions(+), 4 deletion
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
