Yes , think of it of a high level and standardised method of describing the
configuration of your FPGA hardware rather than a program for it to execute.For
example I could define logic blocks to act as flipflops and attach the input
to one pin and the out put to another they don't need to interact with each
other to perform this so the config maybe sequential once loaded in to the FPGA
the resultant Logic config works in parallel or as parallel as you wish to
design for!JA
On Thursday, 9 January 2020, 13:42:00 GMT, Norman Dunbar via Ql-Users
<ql-users@lists.q-v-d.com> wrote:
Hi Marcel,
On 09/01/2020 10:50, Marcel Kilgus via Ql-Users wrote:
> Well, it's a bit like programming, the difference is just that
> basically all lines execute at the same time! If you want something to
> execute sequentially you have to implement a state machine.
> ...
Thanks. I had a look at the link. Interesting. I don't understand most
of it, but I recognise some words!
--
Norman Dunbar
Dunbar IT Consultants Ltd
Registered address:
27a Lidget Hill
Pudsey
West Yorkshire
United Kingdom
LS28 7LG
Company Number: 05132767
_______________________________________________
QL-Users Mailing List
_______________________________________________
QL-Users Mailing List
