Re: [casper] Hardware/Yellow Block Porting Workshop - 30 July - 3 August, SAAO, Cape Town

2018-02-27 Thread Francois Kapp
Do you want to add the Protea/Marriot hotel as a suggestion? It's very
close to SAAO for those who can foot the bill...
http://www.marriott.com/hotels/travel/cptmw-protea-hotel-cape-town-mowbray/

On 27 February 2018 at 13:23, Adam Isaacson  wrote:

> Hi Casperites,
>
> Thanks to those of you that filled in the Doodle poll. We have a venue and
> a date! Please see details below and diarise:
>
> *Workshop:* Hardware/Yellow Block Porting Workshop
>
> *Workshop Leadership Team: *Jack Hickish (University of Berkeley),
> Jonathon Kocz (Caltech) (TBC), Wesley New (SARAO), Adam Isaacson (SARAO)
> and Amish Patel (SARAO)
>
> *Workshop Description: *
> 1) You bring your completed firmware with hardware and we will help you
> integrate it into the new CASPER toolflow, so that you can target your
> hardware with the new CASPER toolflow
> 2) We will show you how take existing firmware and create a yellow block.
> 3) Workshop will be run informally and will be hands on
>
> *Workshop Prerequisites: *
>
> I would suggest, at least, having run through tutorial 1 and tutorial 2 to
> familiarise yourself with Ubuntu, Matlab and Vivado- see tutorial section
> under http://casper-dsp.org (new unofficially released CASPER site)
>
> *Venue:* South African Astronomical Observatory (SAAO), Cape Town,
> Auditorium
> *Date: *30 July - 3rd August 2018
> *Time:* 9am - 5pm
> *Workshop Cost:* Free :)
>
> *Accommodation:* I suggest City Lodge Pinelands (
> https://clhg.com/hotels/155/City-Lodge-Hotel-Pinelands-Cape-Town
> )
>
> *Directions:* https://www.saao.ac.za/contact-2/ (Cape Town) - just
> between the River Club and Valkenburg hospital here in the suburb of
> Observatory. Security will direct you to the auditorium after you have
> signed in.
>
> *What to Bring:* Your lap top/desktop, target hardware, ethernet
> switches, cables and firmware. We will cater for the food and venue hire.
> There is internet availability (WiFi) at the venue.
>
> *RSVP:* Please respond to my email (aisaac...@ska.ac.za) and not the
> whole CASPER emailing group, if you will be attending by no later than the *31
> March 2018*, thanks.
>
> If you reply, it would also be great if you could give some background as
> to what software tools you are currently using and what you want to achieve
> through this workshop. I would like to know whether you are a beginner or
> advanced.
>
> All further communication will be sent out to participants. I hope to see
> you there!
>
> Kind regards,
>
> Adam Isaacson
> SARAO
> DBE Hardware Manager
> Cell: (+27) 825639602 <082%20563%209602>
> Tel:  (+27) 215067300 <021%20506%207300>
> email: aisaac...@ska.ac.za
>
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Re: [casper] UltraScale+ 100G Ethernet Configuration

2018-02-27 Thread Adam Isaacson
Hi Arash,

I am afraid I don't have the expertise on this yet or a solution to this
problem. We also have a VCU118 board and will be implementing a 100GbE
yellow block in the months to come, so it would be good to stay in touch
about this - maybe not duplicate work, but help one another if time
pressures allow.

Kind regards,

Adam Isaacson
SARAO
DBE Hardware Manager
Cell: (+27) 825639602
Tel:  (+27) 215067300
email: aisaac...@ska.ac.za


On Mon, Feb 26, 2018 at 10:25 PM, Jack Hickish 
wrote:

> Hi Arash,
>
> It's awesome that you're doing this.
>
> I only have experience bringing up the 10GbE core on SNAP, but a few
> things you might try are:
> - Make sure all the (many!) clocks are running at the correct speed --
> easy to misconfigure.
> - Check and double check resets
> - Setting the transceivers into loopback mode, and checking for sanity.
> - Using a QSFP loopback module to similar effect. I believe one is
> supplied with the VCU kit.
>
> I'm pretty sure I have less expertise in this than you, but they're my
> first thoughts.
>
> I assume that the infiniband switch is dual-personality, and capable of
> establishing a 100GbE link?
>
> Anyway, it's great that you're working on this,
>
> Jack
>
>
>
> On Mon, 26 Feb 2018 at 12:13 Roshanineshat, Arash <
> arash.roshanines...@cfa.harvard.edu> wrote:
>
>> Hi
>>
>> I'm trying to implement a design using UltraScale+ 100G Ethernet on a
>> VCU118 board. I use Vivado 2017.4 and UltraScale+ 100G Ethernet IP
>> core subsystem version 2.4.
>>
>> I'll give you a quick background about what I have done so far, please
>> let me know if I took a wrong step at any point.
>>
>> I want to implement OSI model which consists of following layers:
>>
>> 7-Application layer
>> 6-Presentation layer
>> 5-Session Layer
>> 4-Transport
>> 3-Network Layer
>> 2-Data Link Layer
>> 1-Physical layer
>>
>> According to what I learned from Xilinx's forum community, 100G IP
>> core will take care of Ethernet protocol (Layers 1 and 2) and I have
>> to implement Layers 3 and 4. However, Linux operating system will take
>> care of Layers 3 and 4 for me. Therefore, I only need to generate the
>> data and use GTY transceivers to transfer them to the network. Right?
>>
>> To customize GTY Transceivers to use QSFP1, and to test it I did the
>> following:
>>
>> 1-As GTY documentation says, QSFP1 is located in left side quads and
>> in quad 231.
>> 2-I selected X1Y48~51 channels of CMACE4 X0Y7. I chose this value
>> because I saw it will put the transceivers on quad bank 231.
>> 3-I chose CAUI4 mode (4 lanes x 25.7812G) Simple TX.
>> 4-I generated an IP core using the above settings.
>> 5-I generated an Open IP Example design using the IP generated above
>> to experiment with it.
>> 6-I connected gt_refclks to QSFP_SI570_CLOCK_C_P/N for QSFP1
>> 7-I initiated a IBUFS to convert a LVDS clock to single-ended clock
>> and connected it to init_clk
>> 8-Create a xdc file according to my VCU118 pinouts.
>> 9-generated the bitcode
>>
>> I loaded the bitcode to the FPGA board and I noticed TX_gt_locked,
>> TX_done, TX_busy LEDs are blinking correctly. So I *guess* the data is
>> being generated too. the problem I have now is that I cannot bring up
>> the QSFP interface and our 100G infiniband switch, reports that the
>> QSFP port connected to the FPGA is "down".
>>
>> What I'm suspicious about is that I have selected a wrong GTY
>> transceiver configuration, however, It seems to me, everything is
>> according to the documentation and the other reason I can think of is
>> the clock values.
>>
>> I would be grateful if you could advise me on possible solutions or
>> debugging methods that I can try.
>>
>> Best Regards
>> Arash Roshanineshat
>>
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[casper] Hardware/Yellow Block Porting Workshop - 30 July - 3 August, SAAO, Cape Town

2018-02-27 Thread Adam Isaacson
Hi Casperites,

Thanks to those of you that filled in the Doodle poll. We have a venue and
a date! Please see details below and diarise:

*Workshop:* Hardware/Yellow Block Porting Workshop

*Workshop Leadership Team: *Jack Hickish (University of Berkeley), Jonathon
Kocz (Caltech) (TBC), Wesley New (SARAO), Adam Isaacson (SARAO) and Amish
Patel (SARAO)

*Workshop Description: *
1) You bring your completed firmware with hardware and we will help you
integrate it into the new CASPER toolflow, so that you can target your
hardware with the new CASPER toolflow
2) We will show you how take existing firmware and create a yellow block.
3) Workshop will be run informally and will be hands on

*Workshop Prerequisites: *

I would suggest, at least, having run through tutorial 1 and tutorial 2 to
familiarise yourself with Ubuntu, Matlab and Vivado- see tutorial section
under http://casper-dsp.org (new unofficially released CASPER site)

*Venue:* South African Astronomical Observatory (SAAO), Cape Town,
Auditorium
*Date: *30 July - 3rd August 2018
*Time:* 9am - 5pm
*Workshop Cost:* Free :)

*Accommodation:* I suggest City Lodge Pinelands (
https://clhg.com/hotels/155/City-Lodge-Hotel-Pinelands-Cape-Town
)

*Directions:* https://www.saao.ac.za/contact-2/ (Cape Town) - just between
the River Club and Valkenburg hospital here in the suburb of Observatory.
Security will direct you to the auditorium after you have signed in.

*What to Bring:* Your lap top/desktop, target hardware, ethernet switches,
cables and firmware. We will cater for the food and venue hire. There is
internet availability (WiFi) at the venue.

*RSVP:* Please respond to my email (aisaac...@ska.ac.za) and not the whole
CASPER emailing group, if you will be attending by no later than the *31
March 2018*, thanks.

If you reply, it would also be great if you could give some background as
to what software tools you are currently using and what you want to achieve
through this workshop. I would like to know whether you are a beginner or
advanced.

All further communication will be sent out to participants. I hope to see
you there!

Kind regards,

Adam Isaacson
SARAO
DBE Hardware Manager
Cell: (+27) 825639602
Tel:  (+27) 215067300
email: aisaac...@ska.ac.za

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