Re: [casper] fft_biplex_real_2x Block

[Wang]

Hi everyone,
I solved the problem.


在2022年11月10日星期四 UTC+8 15:26:11 写道：

> Hi Andrew,
>
> Thanks for your advice.
> I first set to the mlib_devel version of the build model to view the 
> model. 
> Then set the correct parameters on my device.
>
> cheers
> Wang
>
> 在2022年11月10日星期四 UTC+8 14:55:59 写道：
>
>> Hi Wang
>>
>> It may be that the version of the toolflow used to create that model, is 
>> not the same as what is on your machine. You may want to drag a new block 
>> in from your library, and then set the parameters to the same as  the block 
>> in the model. There is also a script that will update the blocks in your 
>> model automatically - update_casper_blocks.m (I think).
>>
>> Regards
>> Andrew
>>
>> On Thu, Nov 10, 2022 at 8:41 AM Wang  wrote:
>>
>>> Hi Andrew，
>>>
>>> 在2022年11月10日星期四 UTC+8 14:09:34 写道：
>>>
 Hi Wang

 It looks like there is something going wrong during the creation of the 
 internal logic in the FFT.

 Could you give us the following information
 1. Which git repo and branch of mlib_devel are you using?

>>>  
>>> I used mlib_devel-roach2, matlab2013b and ise14.7. 
>>> I'm sorry I can't remember where I got it. 
>>> It's probably GitHub - casper-astro/mlib_devel at roach2 
>>>  . 
>>>
>>> 2. What parameters did you change on the FFT?

>>>  
>>> I'm directly copying someone else's FFT, so I didn't change the 
>>> parameters. 
>>> But the one I use is a model that refers to the FFT part of David's 
>>> PAPER correlator model. 
>>> roachfengine/fft_1024ch_core.mdl at master · david-macmahon/roachfengine 
>>> · GitHub 
>>> 
>>> You can also get it from the attachment.
>>>
>>> 3. What are the first error messages you see in Matlab?

>>>  
>>> The message is:
>>> Simulink:Commands:ParamUnknown: biplex_core block (mask) does not have a 
>>> parameter named 'n_inputs'
>>> Backtrace 1: reuse_block:138
>>> Backtrace 2: fft_biplex_real_2x_init:231
>>> Backtrace 3: openmdl:13
>>> Backtrace 4: open:159
>>> Backtrace 5: uiopen:167
>>>
>>> I also encountered this error when I opened David's FFT file.
>>>

 Regards
 Andrew

 On Thu, Nov 10, 2022 at 7:04 AM Wang  wrote:

> Hi CASPER，
>
> I learned about  fft_biplex_real_2x block first.
>
> https://casper.astro.berkeley.edu/w/index.php?title=Fft_biplex_real_2x=150
>  
> 
> However, there are some questions:
>
> 1. I can't view the internal logic of biplex_core and bi_real_unscr_2x 
> blocks. Every time I double-click to view them, Matlab will continuously 
> report errors and keep repeating the cycle.
>
> 2.   fft_biplex_real_2x block I use in Pcore block link. However,  
> However, the internal ports of the fft block are not connected, such as 
> the 
> output ports of even_bussify and odd_bussify, and the input ports of 
> even_pol_debus and odd_pol_debus.
>
> BW，
> wang
>
> [image: fft_internal.jpg]
>
> -- 
> You received this message because you are subscribed to the Google 
> Groups "cas...@lists.berkeley.edu" group.
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> an email to casper+un...@lists.berkeley.edu.
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> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/612086b3-cb85-4851-892c-ce9b0b15207an%40lists.berkeley.edu
>  
> 
> .
>


 *Disclaimer*

 The information contained in this communication from the sender is 
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 notified that any disclosure, copying, distribution or taking action in 
 relation of the contents of this information is strictly prohibited and 
 may 
 be unlawful.

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 malicious activity, human error and technology failure; and to lead the 
 movement toward building a more resilient world. To find out more, visit 
 our website.

>>> Regards
>>> Wang
>>>
>>
>>
>> *Disclaimer*
>>
>> The information contained in this communication from the sender is 
>> confidential. It is intended solely for use by 

Re: [casper] fft_biplex_real_2x Block

[Wang]

Hi Andrew,

Thanks for your advice.
I first set to the mlib_devel version of the build model to view the model. 
Then set the correct parameters on my device.

cheers
Wang

在2022年11月10日星期四 UTC+8 14:55:59 写道：

> Hi Wang
>
> It may be that the version of the toolflow used to create that model, is 
> not the same as what is on your machine. You may want to drag a new block 
> in from your library, and then set the parameters to the same as  the block 
> in the model. There is also a script that will update the blocks in your 
> model automatically - update_casper_blocks.m (I think).
>
> Regards
> Andrew
>
> On Thu, Nov 10, 2022 at 8:41 AM Wang  wrote:
>
>> Hi Andrew，
>>
>> 在2022年11月10日星期四 UTC+8 14:09:34 写道：
>>
>>> Hi Wang
>>>
>>> It looks like there is something going wrong during the creation of the 
>>> internal logic in the FFT.
>>>
>>> Could you give us the following information
>>> 1. Which git repo and branch of mlib_devel are you using?
>>>
>>  
>> I used mlib_devel-roach2, matlab2013b and ise14.7. 
>> I'm sorry I can't remember where I got it. 
>> It's probably GitHub - casper-astro/mlib_devel at roach2 
>>  . 
>>
>> 2. What parameters did you change on the FFT?
>>>
>>  
>> I'm directly copying someone else's FFT, so I didn't change the 
>> parameters. 
>> But the one I use is a model that refers to the FFT part of David's PAPER 
>> correlator model. 
>> roachfengine/fft_1024ch_core.mdl at master · david-macmahon/roachfengine 
>> · GitHub 
>> 
>> You can also get it from the attachment.
>>
>> 3. What are the first error messages you see in Matlab?
>>>
>>  
>> The message is:
>> Simulink:Commands:ParamUnknown: biplex_core block (mask) does not have a 
>> parameter named 'n_inputs'
>> Backtrace 1: reuse_block:138
>> Backtrace 2: fft_biplex_real_2x_init:231
>> Backtrace 3: openmdl:13
>> Backtrace 4: open:159
>> Backtrace 5: uiopen:167
>>
>> I also encountered this error when I opened David's FFT file.
>>
>>>
>>> Regards
>>> Andrew
>>>
>>> On Thu, Nov 10, 2022 at 7:04 AM Wang  wrote:
>>>
 Hi CASPER，

 I learned about  fft_biplex_real_2x block first.

 https://casper.astro.berkeley.edu/w/index.php?title=Fft_biplex_real_2x=150
  
 
 However, there are some questions:

 1. I can't view the internal logic of biplex_core and bi_real_unscr_2x 
 blocks. Every time I double-click to view them, Matlab will continuously 
 report errors and keep repeating the cycle.

 2.   fft_biplex_real_2x block I use in Pcore block link. However,  
 However, the internal ports of the fft block are not connected, such as 
 the 
 output ports of even_bussify and odd_bussify, and the input ports of 
 even_pol_debus and odd_pol_debus.

 BW，
 wang

 [image: fft_internal.jpg]

 -- 
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 .

>>>
>>>
>>> *Disclaimer*
>>>
>>> The information contained in this communication from the sender is 
>>> confidential. It is intended solely for use by the recipient and others 
>>> authorized to receive it. If you are not the recipient, you are hereby 
>>> notified that any disclosure, copying, distribution or taking action in 
>>> relation of the contents of this information is strictly prohibited and may 
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>>> resilience. Mimecast integrates email defenses with brand protection, 
>>> security awareness training, web security, compliance and other essential 
>>> capabilities. Mimecast helps protect large and small organizations from 
>>> malicious activity, human error and technology failure; and to lead the 
>>> movement toward building a more resilient world. To find out more, visit 
>>> our website.
>>>
>> Regards
>> Wang
>>
>
>
> *Disclaimer*
>
> The information contained in this communication from the sender is 
> confidential. It is intended solely for use by the recipient and others 
> authorized to receive it. If you are not the recipient, you are hereby 
> notified that any disclosure, copying, distribution or taking action in 
> relation of the contents of this information is 

Re: [casper] fft_biplex_real_2x Block

[Andrew Martens]

Hi Wang

It may be that the version of the toolflow used to create that model, is
not the same as what is on your machine. You may want to drag a new block
in from your library, and then set the parameters to the same as  the block
in the model. There is also a script that will update the blocks in your
model automatically - update_casper_blocks.m (I think).

Regards
Andrew

On Thu, Nov 10, 2022 at 8:41 AM Wang  wrote:

> Hi Andrew，
>
> 在2022年11月10日星期四 UTC+8 14:09:34 写道：
>
>> Hi Wang
>>
>> It looks like there is something going wrong during the creation of the
>> internal logic in the FFT.
>>
>> Could you give us the following information
>> 1. Which git repo and branch of mlib_devel are you using?
>>
>
> I used mlib_devel-roach2, matlab2013b and ise14.7.
> I'm sorry I can't remember where I got it.
> It's probably GitHub - casper-astro/mlib_devel at roach2
>  .
>
> 2. What parameters did you change on the FFT?
>>
>
> I'm directly copying someone else's FFT, so I didn't change the
> parameters.
> But the one I use is a model that refers to the FFT part of David's PAPER
> correlator model.
> roachfengine/fft_1024ch_core.mdl at master · david-macmahon/roachfengine ·
> GitHub
> 
> You can also get it from the attachment.
>
> 3. What are the first error messages you see in Matlab?
>>
>
> The message is:
> Simulink:Commands:ParamUnknown: biplex_core block (mask) does not have a
> parameter named 'n_inputs'
> Backtrace 1: reuse_block:138
> Backtrace 2: fft_biplex_real_2x_init:231
> Backtrace 3: openmdl:13
> Backtrace 4: open:159
> Backtrace 5: uiopen:167
>
> I also encountered this error when I opened David's FFT file.
>
>>
>> Regards
>> Andrew
>>
>> On Thu, Nov 10, 2022 at 7:04 AM Wang  wrote:
>>
>>> Hi CASPER，
>>>
>>> I learned about  fft_biplex_real_2x block first.
>>>
>>> https://casper.astro.berkeley.edu/w/index.php?title=Fft_biplex_real_2x=150
>>> 
>>> However, there are some questions:
>>>
>>> 1. I can't view the internal logic of biplex_core and bi_real_unscr_2x
>>> blocks. Every time I double-click to view them, Matlab will continuously
>>> report errors and keep repeating the cycle.
>>>
>>> 2.   fft_biplex_real_2x block I use in Pcore block link. However,
>>> However, the internal ports of the fft block are not connected, such as the
>>> output ports of even_bussify and odd_bussify, and the input ports of
>>> even_pol_debus and odd_pol_debus.
>>>
>>> BW，
>>> wang
>>>
>>> [image: fft_internal.jpg]
>>>
>>> --
>>> You received this message because you are subscribed to the Google
>>> Groups "cas...@lists.berkeley.edu" group.
>>> To unsubscribe from this group and stop receiving emails from it, send
>>> an email to casper+un...@lists.berkeley.edu.
>>> To view this discussion on the web visit
>>> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/612086b3-cb85-4851-892c-ce9b0b15207an%40lists.berkeley.edu
>>> 
>>> .
>>>
>>
>>
>> *Disclaimer*
>>
>> The information contained in this communication from the sender is
>> confidential. It is intended solely for use by the recipient and others
>> authorized to receive it. If you are not the recipient, you are hereby
>> notified that any disclosure, copying, distribution or taking action in
>> relation of the contents of this information is strictly prohibited and may
>> be unlawful.
>>
>> This email has been scanned for viruses and malware, and may have been
>> automatically archived by Mimecast, a leader in email security and cyber
>> resilience. Mimecast integrates email defenses with brand protection,
>> security awareness training, web security, compliance and other essential
>> capabilities. Mimecast helps protect large and small organizations from
>> malicious activity, human error and technology failure; and to lead the
>> movement toward building a more resilient world. To find out more, visit
>> our website.
>>
> Regards
> Wang
>

Disclaimer

The information contained in this communication from the sender is 
confidential. It is intended solely for use by the recipient and others 
authorized to receive it. If you are not the recipient, you are hereby notified 
that any disclosure, copying, distribution or taking action in relation of the 
contents of this information is strictly prohibited and may be unlawful.

This email has been scanned for viruses and malware, and may have been 
automatically archived by Mimecast, a leader in email security and cyber 
resilience. Mimecast integrates email defenses with brand protection, security 
awareness training, web security, compliance and other essential capabilities. 
Mimecast helps protect large and small organizations from malicious 

Re: [casper] fft_biplex_real_2x Block

[Andrew Martens]

Hi Wang

It looks like there is something going wrong during the creation of the
internal logic in the FFT.

Could you give us the following information
1. Which git repo and branch of mlib_devel are you using?
2. What parameters did you change on the FFT?
3. What are the first error messages you see in Matlab?

Regards
Andrew

On Thu, Nov 10, 2022 at 7:04 AM Wang  wrote:

> Hi CASPER，
>
> I learned about  fft_biplex_real_2x block first.
>
> https://casper.astro.berkeley.edu/w/index.php?title=Fft_biplex_real_2x=150
> 
> However, there are some questions:
>
> 1. I can't view the internal logic of biplex_core and bi_real_unscr_2x
> blocks. Every time I double-click to view them, Matlab will continuously
> report errors and keep repeating the cycle.
>
> 2.   fft_biplex_real_2x block I use in Pcore block link. However,
> However, the internal ports of the fft block are not connected, such as the
> output ports of even_bussify and odd_bussify, and the input ports of
> even_pol_debus and odd_pol_debus.
>
> BW，
> wang
>
> [image: fft_internal.jpg]
>
> --
> You received this message because you are subscribed to the Google Groups "
> casper@lists.berkeley.edu" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to casper+unsubscr...@lists.berkeley.edu.
> To view this discussion on the web visit
> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/612086b3-cb85-4851-892c-ce9b0b15207an%40lists.berkeley.edu
> 
> .
>

Disclaimer

The information contained in this communication from the sender is 
confidential. It is intended solely for use by the recipient and others 
authorized to receive it. If you are not the recipient, you are hereby notified 
that any disclosure, copying, distribution or taking action in relation of the 
contents of this information is strictly prohibited and may be unlawful.

This email has been scanned for viruses and malware, and may have been 
automatically archived by Mimecast, a leader in email security and cyber 
resilience. Mimecast integrates email defenses with brand protection, security 
awareness training, web security, compliance and other essential capabilities. 
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human error and technology failure; and to lead the movement toward building a 
more resilient world. To find out more, visit our website.

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Re: [casper] fft_biplex_real_2x

[Ryan Monroe]

I don't use the stock CASPER FFTs anymore, but I'm pretty sure that 
there's no way to use them for anything less than {2 complex inputs 
--OR-- 4 real inputs}.  If you want less, you can drive an input with a 
constant '0', but resource-wise, they're the same.  This is because of 
algorithmic limitations; there is a resource efficiency you gain by 
doing two complex FFTs at once.


This is a time for a streaming Xilinx FFT.

--Ryan

On 01/19/2016 09:49 PM, James Smith wrote:

Hi Rolando,

I can't recall that it does, off the top of my head, but the Casper 
one can be set up to use just one input. This is what I've done in the 
past, I think.


Regards,
James


On Wed, Jan 20, 2016 at 7:39 AM, Rolando Paz > wrote:


Hi James and Andrew

Thank for yours advices.

I'm trying to recompile the design of Peter McMahon:
https://casper.berkeley.edu/wiki/Parspec

I'm using these libraries:

https://github.com/casper-astro/mlib_devel/tree/mlib_devel-2010-09-20

and I use a virtual machine "windows XP SP3", on ubuntu 14.04LTS,
Matlab R2007b,
ISE, EDK, SG 10.1, with respective updates, IBOB+QUADC.

With this configuration, I can not compile this new design.

I'll try with Xilinx FFT...
Is there a Xilinx block version for the PFB too?

Thank you.



2016-01-19 23:23 GMT-06:00 Andrew Martens >:

Hi Rolando

You may want to look at the Xilinx FFT for your use case. The
CASPER FFT is optimised so that minimal resources are used
when processing high bandwidths (either many inputs, or inputs
captured at high sample rates). In this case you may find that
the Xilinx FFT actually uses fewer resources.

Regards
Andrew

On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz
> wrote:

Hi

Is there any other FFT block that I can use with ADC4x250-8?

https://casper.berkeley.edu/wiki/ADC4x250-8

I am using the "fft_biplex_real_2x" block, however I need
only one input of the four that this block has. I placed
at zero the others three inputs.

I need more FPGA resources from IBOB, and I think using
another FFT block may be one solution.

Best Regards

RP

Re: [casper] fft_biplex_real_2x

[Rolando Paz]

Hi

In the attached picture you can see the fft xilinx blocks I found.

Which one should I use?
How should I set this block?


2016-01-20 3:06 GMT-06:00 Ryan Monroe :

> I don't use the stock CASPER FFTs anymore, but I'm pretty sure that
> there's no way to use them for anything less than {2 complex inputs --OR--
> 4 real inputs}.  If you want less, you can drive an input with a constant
> '0', but resource-wise, they're the same.  This is because of algorithmic
> limitations; there is a resource efficiency you gain by doing two complex
> FFTs at once.
>
> This is a time for a streaming Xilinx FFT.
>
> --Ryan
>
>
> On 01/19/2016 09:49 PM, James Smith wrote:
>
> Hi Rolando,
>
> I can't recall that it does, off the top of my head, but the Casper one
> can be set up to use just one input. This is what I've done in the past, I
> think.
>
> Regards,
> James
>
>
> On Wed, Jan 20, 2016 at 7:39 AM, Rolando Paz  wrote:
>
>> Hi James and Andrew
>>
>> Thank for yours advices.
>>
>> I'm trying to recompile the design of Peter McMahon:
>> https://casper.berkeley.edu/wiki/Parspec
>>
>> I'm using these libraries:
>>
>> https://github.com/casper-astro/mlib_devel/tree/mlib_devel-2010-09-20
>>
>> and I use a virtual machine "windows XP SP3", on ubuntu 14.04LTS, Matlab
>> R2007b,
>> ISE, EDK, SG 10.1, with respective updates, IBOB+QUADC.
>>
>> With this configuration, I can not compile this new design.
>>
>> I'll try with Xilinx FFT...
>> Is there a Xilinx block version for the PFB too?
>>
>> Thank you.
>>
>>
>>
>> 2016-01-19 23:23 GMT-06:00 Andrew Martens < 
>> and...@ska.ac.za>:
>>
>>> Hi Rolando
>>>
>>> You may want to look at the Xilinx FFT for your use case. The CASPER FFT
>>> is optimised so that minimal resources are used when processing high
>>> bandwidths (either many inputs, or inputs captured at high sample rates).
>>> In this case you may find that the Xilinx FFT actually uses fewer
>>> resources.
>>>
>>> Regards
>>> Andrew
>>>
>>> On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz  wrote:
>>>
 Hi

 Is there any other FFT block that I can use with ADC4x250-8?

 https://casper.berkeley.edu/wiki/ADC4x250-8

 I am using the "fft_biplex_real_2x" block, however I need only one
 input of the four that this block has. I placed at zero the others three
 inputs.

 I need more FPGA resources from IBOB, and I think using another FFT
 block may be one solution.

 Best Regards

 RP

>>>
>>>
>>
>
>

Re: [casper] fft_biplex_real_2x

[James Smith]

Hi Rolando,

I'll refer you to Xilinx Sysgen's reference documents. You should be able
to get them from their website. They contain all the info you need about
those blocks.

The different FFT versions will depend on your board - I'm not familiar
with the iBOB, so I'm not sure which FPGA it has on it, but the older FPGAs
don't support the newer FFT designs.

You can set it up depending on your needs - speed or space. I'd suggest
doing a few simulations to get a feel for how the various FFTs work. These
don't take too long and will give you a good feel for what's available.

Regards,
James


On Wed, Jan 20, 2016 at 3:40 PM, Rolando Paz  wrote:

> Hi
>
> In the attached picture you can see the fft xilinx blocks I found.
>
> Which one should I use?
> How should I set this block?
>
>
> 2016-01-20 3:06 GMT-06:00 Ryan Monroe :
>
>> I don't use the stock CASPER FFTs anymore, but I'm pretty sure that
>> there's no way to use them for anything less than {2 complex inputs --OR--
>> 4 real inputs}.  If you want less, you can drive an input with a constant
>> '0', but resource-wise, they're the same.  This is because of algorithmic
>> limitations; there is a resource efficiency you gain by doing two complex
>> FFTs at once.
>>
>> This is a time for a streaming Xilinx FFT.
>>
>> --Ryan
>>
>>
>> On 01/19/2016 09:49 PM, James Smith wrote:
>>
>> Hi Rolando,
>>
>> I can't recall that it does, off the top of my head, but the Casper one
>> can be set up to use just one input. This is what I've done in the past, I
>> think.
>>
>> Regards,
>> James
>>
>>
>> On Wed, Jan 20, 2016 at 7:39 AM, Rolando Paz  wrote:
>>
>>> Hi James and Andrew
>>>
>>> Thank for yours advices.
>>>
>>> I'm trying to recompile the design of Peter McMahon:
>>> https://casper.berkeley.edu/wiki/Parspec
>>>
>>> I'm using these libraries:
>>>
>>> https://github.com/casper-astro/mlib_devel/tree/mlib_devel-2010-09-20
>>>
>>> and I use a virtual machine "windows XP SP3", on ubuntu 14.04LTS, Matlab
>>> R2007b,
>>> ISE, EDK, SG 10.1, with respective updates, IBOB+QUADC.
>>>
>>> With this configuration, I can not compile this new design.
>>>
>>> I'll try with Xilinx FFT...
>>> Is there a Xilinx block version for the PFB too?
>>>
>>> Thank you.
>>>
>>>
>>>
>>> 2016-01-19 23:23 GMT-06:00 Andrew Martens < 
>>> and...@ska.ac.za>:
>>>
 Hi Rolando

 You may want to look at the Xilinx FFT for your use case. The CASPER
 FFT is optimised so that minimal resources are used when processing high
 bandwidths (either many inputs, or inputs captured at high sample rates).
 In this case you may find that the Xilinx FFT actually uses fewer
 resources.

 Regards
 Andrew

 On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz  wrote:

> Hi
>
> Is there any other FFT block that I can use with ADC4x250-8?
>
> https://casper.berkeley.edu/wiki/ADC4x250-8
>
> I am using the "fft_biplex_real_2x" block, however I need only one
> input of the four that this block has. I placed at zero the others three
> inputs.
>
> I need more FPGA resources from IBOB, and I think using another FFT
> block may be one solution.
>
> Best Regards
>
> RP
>


>>>
>>
>>
>

[casper] fft_biplex_real_2x

[Rolando Paz]

Hi

Is there any other FFT block that I can use with ADC4x250-8?

https://casper.berkeley.edu/wiki/ADC4x250-8

I am using the "fft_biplex_real_2x" block, however I need only one input of
the four that this block has. I placed at zero the others three inputs.

I need more FPGA resources from IBOB, and I think using another FFT block
may be one solution.

Best Regards

RP

Re: [casper] fft_biplex_real_2x

[Andrew Martens]

Hi Rolando

You may want to look at the Xilinx FFT for your use case. The CASPER FFT is
optimised so that minimal resources are used when processing high
bandwidths (either many inputs, or inputs captured at high sample rates).
In this case you may find that the Xilinx FFT actually uses fewer
resources.

Regards
Andrew

On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz  wrote:

> Hi
>
> Is there any other FFT block that I can use with ADC4x250-8?
>
> https://casper.berkeley.edu/wiki/ADC4x250-8
>
> I am using the "fft_biplex_real_2x" block, however I need only one input
> of the four that this block has. I placed at zero the others three inputs.
>
> I need more FPGA resources from IBOB, and I think using another FFT block
> may be one solution.
>
> Best Regards
>
> RP
>

Re: [casper] fft_biplex_real_2x

[Rolando Paz]

Hi James and Andrew

Thank for yours advices.

I'm trying to recompile the design of Peter McMahon:
https://casper.berkeley.edu/wiki/Parspec

I'm using these libraries:

https://github.com/casper-astro/mlib_devel/tree/mlib_devel-2010-09-20

and I use a virtual machine "windows XP SP3", on ubuntu 14.04LTS, Matlab
R2007b,
ISE, EDK, SG 10.1, with respective updates, IBOB+QUADC.

With this configuration, I can not compile this new design.

I'll try with Xilinx FFT...
Is there a Xilinx block version for the PFB too?

Thank you.



2016-01-19 23:23 GMT-06:00 Andrew Martens :

> Hi Rolando
>
> You may want to look at the Xilinx FFT for your use case. The CASPER FFT
> is optimised so that minimal resources are used when processing high
> bandwidths (either many inputs, or inputs captured at high sample rates).
> In this case you may find that the Xilinx FFT actually uses fewer
> resources.
>
> Regards
> Andrew
>
> On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz  wrote:
>
>> Hi
>>
>> Is there any other FFT block that I can use with ADC4x250-8?
>>
>> https://casper.berkeley.edu/wiki/ADC4x250-8
>>
>> I am using the "fft_biplex_real_2x" block, however I need only one input
>> of the four that this block has. I placed at zero the others three inputs.
>>
>> I need more FPGA resources from IBOB, and I think using another FFT block
>> may be one solution.
>>
>> Best Regards
>>
>> RP
>>
>
>

Re: [casper] fft_biplex_real_2x

[James Smith]

Hi Rolando,

I can't recall that it does, off the top of my head, but the Casper one can
be set up to use just one input. This is what I've done in the past, I
think.

Regards,
James


On Wed, Jan 20, 2016 at 7:39 AM, Rolando Paz  wrote:

> Hi James and Andrew
>
> Thank for yours advices.
>
> I'm trying to recompile the design of Peter McMahon:
> https://casper.berkeley.edu/wiki/Parspec
>
> I'm using these libraries:
>
> https://github.com/casper-astro/mlib_devel/tree/mlib_devel-2010-09-20
>
> and I use a virtual machine "windows XP SP3", on ubuntu 14.04LTS, Matlab
> R2007b,
> ISE, EDK, SG 10.1, with respective updates, IBOB+QUADC.
>
> With this configuration, I can not compile this new design.
>
> I'll try with Xilinx FFT...
> Is there a Xilinx block version for the PFB too?
>
> Thank you.
>
>
>
> 2016-01-19 23:23 GMT-06:00 Andrew Martens :
>
>> Hi Rolando
>>
>> You may want to look at the Xilinx FFT for your use case. The CASPER FFT
>> is optimised so that minimal resources are used when processing high
>> bandwidths (either many inputs, or inputs captured at high sample rates).
>> In this case you may find that the Xilinx FFT actually uses fewer
>> resources.
>>
>> Regards
>> Andrew
>>
>> On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz  wrote:
>>
>>> Hi
>>>
>>> Is there any other FFT block that I can use with ADC4x250-8?
>>>
>>> https://casper.berkeley.edu/wiki/ADC4x250-8
>>>
>>> I am using the "fft_biplex_real_2x" block, however I need only one input
>>> of the four that this block has. I placed at zero the others three inputs.
>>>
>>> I need more FPGA resources from IBOB, and I think using another FFT
>>> block may be one solution.
>>>
>>> Best Regards
>>>
>>> RP
>>>
>>
>>
>

Re: [casper] fft_biplex_real_2x

[James Smith]

Hi Rolando,

Have you tried one of the built-in Xilinx FFTs? As far as I know, the
Casper ones really only exist because the Xilinx ones only accept one input
at a time.

If you do use them, they are really efficient with resources.

Regards,
James


On Tue, Jan 19, 2016 at 11:11 PM, Rolando Paz  wrote:

> Hi
>
> Is there any other FFT block that I can use with ADC4x250-8?
>
> https://casper.berkeley.edu/wiki/ADC4x250-8
>
> I am using the "fft_biplex_real_2x" block, however I need only one input
> of the four that this block has. I placed at zero the others three inputs.
>
> I need more FPGA resources from IBOB, and I think using another FFT block
> may be one solution.
>
> Best Regards
>
> RP
>

Re: [casper] fft_biplex_real_2X block

[Andrew Martens]

Hi Rolando


Now, I need to understand the equalizer block.


After the FFT the size of each data sample has grown. Many astronomical 
signals have a frequency spectrum that is related to white noise. This 
means that each frequency channel sample is about the same size. So we 
don't need lots of bits for each sample as the smallest number we need 
is nearly the same size as the biggest. Channels with large numbers at 
this point are often RFI which we will not use.


We can save FPGA resources and bandwidth if we make the numbers smaller 
before processing the data further. If we just took the top (most 
significant) bits, we might lose some data, this depends on the power of 
the signal we are looking at. So we boost the signal by multiplying it 
with a number so that the result lies in the most significant bits 
before throwing the other bits away. We may want each channel (or a 
group of channels next to each other) from the FFT to be multiplied by a 
different number, it depends on what our signal looks like and what our 
system has done to the signal.



How I can know if the equalizer block is working correctly?


A good way to start would be to simulate using data that has similar 
characteristics to what you expect from the signal you will look at. Get 
a noise signal which uses the same number of bits when sampled by the 
ADC and put that into your system. Then put down some Scopes and look at 
what happens in the signal chain. If your equalizer values are too 
small, then you will see zeros going to the xengine, if the values are 
too big, then there will just be saturated (the maximum value) values 
going to the xengine.


On a real system, try changing the values to something small so that the 
final values are 0 or very small, then slowly increase the values until 
you see the outputs stop increasing.



I have also doubts about the config file. This is the part with which I
program the IBOB:

[equalisation]
#Perform automatic equalization (=1) or set to fixed EQ_poly values (=0)
auto_eq = 0
#Number of equalization blocks, include an eq_poly_x entry for each block
eq_blocks = 4
#Number of equalization channels per equalization block
eq_chans = 64
#Starting point for auto-equalization or values for manual eq programming.
#One line entry per antenna. Item is a list of polynomial coefficients.
#Eg,
#EQ_poly_0 = 10, 30 ,40
#corresponds to 10 + 30x^2 + 40x^4
eq_poly_0 = 300
eq_poly_1 = 300
eq_poly_2 = 300
eq_poly_3 = 300

Do you know what does this?



You should look in the code and the model for where these values are 
used and try to understand what is happening. Getting these equalization 
values right is important and different experiments will require 
different values. It is very important to really understand what is 
happening.


You should also simulate using the fft_biplex_real_2x block and 
understand how the data comes out.


Good luck
Andrew



2014-08-31 16:50 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu
mailto:d...@ssl.berkeley.edu:




On Sun, Aug 31, 2014 at 3:40 PM, Rolando Paz flx...@gmail.com
mailto:flx...@gmail.com wrote:

Hi again...

I'm using a IBOB-QUADC, the FPGA clock rate is 200MHz, and QUADC
clock rate is 200 MHz. The size of PFB and FFT is 2^11 pnts, and
that means that I have 1024 channels for each of the four inputs
of the QUADC, is this correct?


yes, that's correct:
2048 real points in and out of the PFB FIR, as well as into the FFT.
1024 complex points out of the FFT.

My correlation block is called xengine4, and within are 6
cross-correlations and 4 autocorrelations. That means that I
have 16 BRAM in the correlator's design. For each BRAM I use a
vacc_32bit block .

If the design can handle four real independent streams, as we
have discussed, Does this means that I should set each
vacc_32bit block with 1024 channels?


yes.


Best Regards

Rolando Paz


2014-08-31 11:33 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu
mailto:d...@ssl.berkeley.edu:



i think the FFT biplex real 2x block
can compute real to complex FFT's on
4, 8, 12, 16 inputs,  depending on how you set
the Number simultaneous inputs parameter.

best wishes,

dan







On Sun, Aug 31, 2014 at 10:26 AM, Rolando Paz
flx...@gmail.com mailto:flx...@gmail.com wrote:

Hi Dan

Now I understand :-)

It's very different this:

4 time samples in parallel  (fft_wideband_real)

4 real streams  (fft_biplex_real_2x)

Casper's website says
(https://casper.berkeley.edu/wiki/Fft_biplex_real_2x):

...Thus, a biplex core (which can do 2 complex FFTs) can
transform 4 real streams. Twiddle factor, and other

[casper] fft_biplex_real_2X block

[Rolando Paz]

Could someone please explain why the QUADC designs use only the
fft_bliplex_real_2x block?

Why the fft_biplex_real_2x block uses more resources than the
fft_wideband_real block?

Best Regards

Rolando Paz

Re: [casper] fft_biplex_real_2X block

[Rolando Paz]

Hi Dan

Now I understand :-)

It's very different this:

4 time samples in parallel  (fft_wideband_real)

4 real streams  (fft_biplex_real_2x)

Casper's website says (https://casper.berkeley.edu/wiki/Fft_biplex_real_2x):

...Thus, a biplex core (which can do 2 complex FFTs) can transform 4 real
streams. Twiddle factor, and other logic sharing, allows multiples of 4
input streams to be processed simultaneously with minimal resource
increases...

Does this mean that I only need a single block?

Best Regards

Rolando Paz


2014-08-31 11:06 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu:



 hi Rolando,

 the quad adc outputs one sample per FPGA clock,
 so your correlator will need to use an FFT with real input,
 complex output, 1 real input sample per clock.

 I think (but I'm not sure), the *fft_biplex_real_2x block does*
 *two real to complex ffts, so you'll need*
 *two of these blocks to compute four*
 *fft's on four inputs.*

 *best wishes,*

 *dan*


 On Sun, Aug 31, 2014 at 10:00 AM, Rolando Paz flx...@gmail.com wrote:

 Could someone please explain why the QUADC designs use only the
 fft_bliplex_real_2x block?

 Why the fft_biplex_real_2x block uses more resources than the
 fft_wideband_real block?

 Best Regards

 Rolando Paz

Re: [casper] fft_biplex_real_2X block

[Dan Werthimer]

i think the FFT biplex real 2x block
can compute real to complex FFT's on
4, 8, 12, 16 inputs,  depending on how you set
the Number simultaneous inputs parameter.

best wishes,

dan







On Sun, Aug 31, 2014 at 10:26 AM, Rolando Paz flx...@gmail.com wrote:

 Hi Dan

 Now I understand :-)

 It's very different this:

 4 time samples in parallel  (fft_wideband_real)

 4 real streams  (fft_biplex_real_2x)

 Casper's website says (https://casper.berkeley.edu/wiki/Fft_biplex_real_2x
 ):

 ...Thus, a biplex core (which can do 2 complex FFTs) can transform 4 real
 streams. Twiddle factor, and other logic sharing, allows multiples of 4
 input streams to be processed simultaneously with minimal resource
 increases...

 Does this mean that I only need a single block?

 Best Regards

 Rolando Paz


 2014-08-31 11:06 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu:



 hi Rolando,

 the quad adc outputs one sample per FPGA clock,
 so your correlator will need to use an FFT with real input,
 complex output, 1 real input sample per clock.

 I think (but I'm not sure), the *fft_biplex_real_2x block does*
 *two real to complex ffts, so you'll need*
 *two of these blocks to compute four*
 *fft's on four inputs.*

 *best wishes,*

 *dan*


 On Sun, Aug 31, 2014 at 10:00 AM, Rolando Paz flx...@gmail.com wrote:

 Could someone please explain why the QUADC designs use only the
 fft_bliplex_real_2x block?

 Why the fft_biplex_real_2x block uses more resources than the
 fft_wideband_real block?

 Best Regards

 Rolando Paz

Re: [casper] fft_biplex_real_2X block

[Rolando Paz]

Hi again...

I'm using a IBOB-QUADC, the FPGA clock rate is 200MHz, and QUADC clock rate
is 200 MHz. The size of PFB and FFT is 2^11 pnts, and that means that I
have 1024 channels for each of the four inputs of the QUADC, is this
correct?

My correlation block is called xengine4, and within are 6
cross-correlations and 4 autocorrelations. That means that I have 16 BRAM
in the correlator's design. For each BRAM I use a vacc_32bit block .

If the design can handle four real independent streams, as we have
discussed, Does this means that I should set each vacc_32bit block with
1024 channels?

Best Regards

Rolando Paz


2014-08-31 11:33 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu:



 i think the FFT biplex real 2x block
 can compute real to complex FFT's on
 4, 8, 12, 16 inputs,  depending on how you set
 the Number simultaneous inputs parameter.

 best wishes,

 dan







 On Sun, Aug 31, 2014 at 10:26 AM, Rolando Paz flx...@gmail.com wrote:

 Hi Dan

 Now I understand :-)

 It's very different this:

 4 time samples in parallel  (fft_wideband_real)

 4 real streams  (fft_biplex_real_2x)

 Casper's website says (
 https://casper.berkeley.edu/wiki/Fft_biplex_real_2x):

 ...Thus, a biplex core (which can do 2 complex FFTs) can transform 4 real
 streams. Twiddle factor, and other logic sharing, allows multiples of 4
 input streams to be processed simultaneously with minimal resource
 increases...

 Does this mean that I only need a single block?

 Best Regards

 Rolando Paz


 2014-08-31 11:06 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu:



 hi Rolando,

 the quad adc outputs one sample per FPGA clock,
 so your correlator will need to use an FFT with real input,
 complex output, 1 real input sample per clock.

 I think (but I'm not sure), the *fft_biplex_real_2x block does*
 *two real to complex ffts, so you'll need*
 *two of these blocks to compute four*
 *fft's on four inputs.*

 *best wishes,*

 *dan*


 On Sun, Aug 31, 2014 at 10:00 AM, Rolando Paz flx...@gmail.com wrote:

 Could someone please explain why the QUADC designs use only the
 fft_bliplex_real_2x block?

 Why the fft_biplex_real_2x block uses more resources than the
 fft_wideband_real block?

 Best Regards

 Rolando Paz

Re: [casper] fft_biplex_real_2X block

[Dan Werthimer]

On Sun, Aug 31, 2014 at 3:40 PM, Rolando Paz flx...@gmail.com wrote:

 Hi again...

 I'm using a IBOB-QUADC, the FPGA clock rate is 200MHz, and QUADC clock
 rate is 200 MHz. The size of PFB and FFT is 2^11 pnts, and that means that
 I have 1024 channels for each of the four inputs of the QUADC, is this
 correct?


yes, that's correct:
2048 real points in and out of the PFB FIR, as well as into the FFT.
1024 complex points out of the FFT.



 My correlation block is called xengine4, and within are 6
 cross-correlations and 4 autocorrelations. That means that I have 16 BRAM
 in the correlator's design. For each BRAM I use a vacc_32bit block .

 If the design can handle four real independent streams, as we have
 discussed, Does this means that I should set each vacc_32bit block with
 1024 channels?


yes.



 Best Regards

 Rolando Paz


 2014-08-31 11:33 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu:



 i think the FFT biplex real 2x block
 can compute real to complex FFT's on
 4, 8, 12, 16 inputs,  depending on how you set
 the Number simultaneous inputs parameter.

 best wishes,

 dan







 On Sun, Aug 31, 2014 at 10:26 AM, Rolando Paz flx...@gmail.com wrote:

 Hi Dan

 Now I understand :-)

 It's very different this:

 4 time samples in parallel  (fft_wideband_real)

 4 real streams  (fft_biplex_real_2x)

 Casper's website says (
 https://casper.berkeley.edu/wiki/Fft_biplex_real_2x):

 ...Thus, a biplex core (which can do 2 complex FFTs) can transform 4
 real streams. Twiddle factor, and other logic sharing, allows multiples of
 4 input streams to be processed simultaneously with minimal resource
 increases...

 Does this mean that I only need a single block?

 Best Regards

 Rolando Paz


 2014-08-31 11:06 GMT-06:00 Dan Werthimer d...@ssl.berkeley.edu:



 hi Rolando,

 the quad adc outputs one sample per FPGA clock,
 so your correlator will need to use an FFT with real input,
 complex output, 1 real input sample per clock.

 I think (but I'm not sure), the *fft_biplex_real_2x block does*
 *two real to complex ffts, so you'll need*
 *two of these blocks to compute four*
 *fft's on four inputs.*

 *best wishes,*

 *dan*


 On Sun, Aug 31, 2014 at 10:00 AM, Rolando Paz flx...@gmail.com wrote:

 Could someone please explain why the QUADC designs use only the
 fft_bliplex_real_2x block?

 Why the fft_biplex_real_2x block uses more resources than the
 fft_wideband_real block?

 Best Regards

 Rolando Paz