date:20211015

[clang] 9aa6c72 - Fix lit test failures in clang-ppc* and clang-x64-windows-msvc

2021-10-15 Thread Juneyoung Lee via cfe-commits


Author: Juneyoung Lee
Date: 2021-10-16T14:33:59+09:00
New Revision: 9aa6c72b92b6c89cc6d23b693257df9af7de2d15

URL: 
https://github.com/llvm/llvm-project/commit/9aa6c72b92b6c89cc6d23b693257df9af7de2d15
DIFF: 
https://github.com/llvm/llvm-project/commit/9aa6c72b92b6c89cc6d23b693257df9af7de2d15.diff

LOG: Fix lit test failures in clang-ppc* and clang-x64-windows-msvc

Added: 


Modified: 
clang/test/CodeGen/ppc-mm-malloc-le.c
clang/test/CodeGenCXX/mangle-abi-tag.cpp

Removed: 




diff  --git a/clang/test/CodeGen/ppc-mm-malloc-le.c 
b/clang/test/CodeGen/ppc-mm-malloc-le.c
index dcbd5a60440e3..f68577c8edcdd 100644
--- a/clang/test/CodeGen/ppc-mm-malloc-le.c
+++ b/clang/test/CodeGen/ppc-mm-malloc-le.c
@@ -35,7 +35,7 @@ test_mm_malloc() {
 // CHECK: [[REG24]]:
 // CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG5]], align 8
 // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG4]], align 8
-// CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call signext i32 
@posix_memalign(i8** [[REG29:[0-9a-zA-Z_%.]+]], i64 [[REG26]], i64 [[REG27]])
+// CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call signext i32 
@posix_memalign(i8** noundef [[REG29:[0-9a-zA-Z_%.]+]], i64 noundef [[REG26]], 
i64 noundef [[REG27]])
 // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = icmp eq i32 [[REG28]], 0
 // CHECK-NEXT: br i1 [[REG30]], label %[[REG31:[0-9a-zA-Z_%.]+]], label 
%[[REG32:[0-9a-zA-Z_%.]+]]
 // CHECK: [[REG31]]:
@@ -49,8 +49,8 @@ test_mm_malloc() {
 // CHECK-NEXT: [[REG34:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG3]], align 8
 // CHECK-NEXT: ret i8* [[REG34]]
 
-// CHECK: define internal void @_mm_free(i8* [[REG35:[0-9a-zA-Z_%.]+]])
+// CHECK: define internal void @_mm_free(i8* noundef [[REG35:[0-9a-zA-Z_%.]+]])
 // CHECK: store i8* [[REG35]], i8** [[REG36:[0-9a-zA-Z_%.]+]], align 8
 // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG36]], align 8
-// CHECK-NEXT: call void @free(i8* [[REG37]])
+// CHECK-NEXT: call void @free(i8* noundef [[REG37]])
 // CHECK-NEXT: ret void

diff  --git a/clang/test/CodeGenCXX/mangle-abi-tag.cpp 
b/clang/test/CodeGenCXX/mangle-abi-tag.cpp
index aa74d2dd6d668..433d500bcad6c 100644
--- a/clang/test/CodeGenCXX/mangle-abi-tag.cpp
+++ b/clang/test/CodeGenCXX/mangle-abi-tag.cpp
@@ -145,7 +145,7 @@ void f13_test() {
   f13();
 }
 // f13()::L::foo[abi:C][abi:D]()
-// CHECK-DAG: define linkonce_odr noundef {{(dso_local )?}}%struct.E* 
@_ZZ3f13vEN1L3fooB1CB1DEv(
+// CHECK-DAG: define linkonce_odr {{(noundef )?}}{{(dso_local )?}}%struct.E* 
@_ZZ3f13vEN1L3fooB1CB1DEv(
 
 // f13()::L::foo[abi:C][abi:D]()::a[abi:A][abi:B]
 // CHECK-DAG: @_ZZZ3f13vEN1L3fooB1CB1DEvE1aB1AB1B =



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[clang] 705387c - Resolve lit failures in clang after 8ca4b3e's land

2021-10-15 Thread Juneyoung Lee via cfe-commits


Author: Juneyoung Lee
Date: 2021-10-16T13:51:50+09:00
New Revision: 705387c5074bcca36d626882462ebbc2bcc3bed4

URL: 
https://github.com/llvm/llvm-project/commit/705387c5074bcca36d626882462ebbc2bcc3bed4
DIFF: 
https://github.com/llvm/llvm-project/commit/705387c5074bcca36d626882462ebbc2bcc3bed4.diff

LOG: Resolve lit failures in clang after 8ca4b3e's land

Added: 


Modified: 
clang/test/CodeGen/ppc-mm-malloc-le.c
clang/test/CodeGen/ppc-mm-malloc.c
clang/test/Modules/cxx-irgen.cpp
clang/test/Profile/cxx-lambda.cpp

Removed: 




diff  --git a/clang/test/CodeGen/ppc-mm-malloc-le.c 
b/clang/test/CodeGen/ppc-mm-malloc-le.c
index ba888afcd194f..dcbd5a60440e3 100644
--- a/clang/test/CodeGen/ppc-mm-malloc-le.c
+++ b/clang/test/CodeGen/ppc-mm-malloc-le.c
@@ -19,7 +19,7 @@ test_mm_malloc() {
 
 // CHECK-LABEL: @test_mm_malloc
 
-// CHECK: define internal i8* @_mm_malloc(i64 [[REG1:[0-9a-zA-Z_%.]+]], i64 
[[REG2:[0-9a-zA-Z_%.]+]])
+// CHECK: define internal i8* @_mm_malloc(i64 noundef 
[[REG1:[0-9a-zA-Z_%.]+]], i64 noundef [[REG2:[0-9a-zA-Z_%.]+]])
 // CHECK: [[REG3:[0-9a-zA-Z_%.]+]] = alloca i8*, align 8
 // CHECK: store i64 [[REG1]], i64* [[REG4:[0-9a-zA-Z_%.]+]], align 8
 // CHECK-NEXT: store i64 [[REG2]], i64* [[REG5:[0-9a-zA-Z_%.]+]], align 8

diff  --git a/clang/test/CodeGen/ppc-mm-malloc.c 
b/clang/test/CodeGen/ppc-mm-malloc.c
index 6e8f6807b50bb..f7102459afa3b 100644
--- a/clang/test/CodeGen/ppc-mm-malloc.c
+++ b/clang/test/CodeGen/ppc-mm-malloc.c
@@ -19,7 +19,7 @@ test_mm_malloc() {
 
 // CHECK-LABEL: @test_mm_malloc
 
-// CHECK: define internal i8* @_mm_malloc(i64 [[REG1:[0-9a-zA-Z_%.]+]], i64 
[[REG2:[0-9a-zA-Z_%.]+]])
+// CHECK: define internal i8* @_mm_malloc(i64 noundef 
[[REG1:[0-9a-zA-Z_%.]+]], i64 noundef [[REG2:[0-9a-zA-Z_%.]+]])
 // CHECK: [[REG3:[0-9a-zA-Z_%.]+]] = alloca i8*, align 8
 // CHECK: store i64 [[REG1]], i64* [[REG4:[0-9a-zA-Z_%.]+]], align 8
 // CHECK-NEXT: store i64 [[REG2]], i64* [[REG5:[0-9a-zA-Z_%.]+]], align 8

diff  --git a/clang/test/Modules/cxx-irgen.cpp 
b/clang/test/Modules/cxx-irgen.cpp
index 3decdd1e87f3a..b6529f61c8ca6 100644
--- a/clang/test/Modules/cxx-irgen.cpp
+++ b/clang/test/Modules/cxx-irgen.cpp
@@ -52,7 +52,7 @@ namespace ImplicitSpecialMembers {
   // CHECK-LABEL: define {{.*}} @_ZN20OperatorDeleteLookup1AD0Ev(
   // CHECK: call {{.*}}void @_ZN20OperatorDeleteLookup1AdlEPv(
 
-  // CHECK-DAG: call {{[a-z\_\d]*[ ]?i32}} @_ZN8CtorInitIiE1fEv(
+  // CHECK-DAG: call {{.*}}i32 @_ZN8CtorInitIiE1fEv(
 
   extern B b1;
   B b2(b1);

diff  --git a/clang/test/Profile/cxx-lambda.cpp 
b/clang/test/Profile/cxx-lambda.cpp
index aa0053fe98d0b..9dbd619acb856 100644
--- a/clang/test/Profile/cxx-lambda.cpp
+++ b/clang/test/Profile/cxx-lambda.cpp
@@ -19,8 +19,8 @@
 void lambdas() {
   int i = 1;
 
-  // LMBGEN-LABEL: define internal{{( [0-9_a-z]*cc)?( noundef zeroext)?}} i1 
@"_ZZ7lambdasvENK3$_0clEi"(
-  // LMBUSE-LABEL: define internal{{( [0-9_a-z]*cc)?( noundef zeroext)?}} i1 
@"_ZZ7lambdasvENK3$_0clEi"(
+  // LMBGEN-LABEL: define internal{{( [0-9_a-z]*cc)?( noundef)?( zeroext)?}} 
i1 @"_ZZ7lambdasvENK3$_0clEi"(
+  // LMBUSE-LABEL: define internal{{( [0-9_a-z]*cc)?( noundef)?( zeroext)?}} 
i1 @"_ZZ7lambdasvENK3$_0clEi"(
   // LMBGEN: store {{.*}} @[[LFC]], i64 0, i64 0
   auto f = [](int k) {
 // LMBGEN: store {{.*}} @[[LFC]], i64 0, i64 1



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[PATCH] D111270: [clang] Pass -clear-ast-before-backend in Clang::ConstructJob()

2021-10-15 Thread Heejin Ahn via Phabricator via cfe-commits

aheejin added a comment.

After this patch, `-print-stats` started erroring out. I filed a bug at 
https://bugs.llvm.org/show_bug.cgi?id=52193.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111270/new/

https://reviews.llvm.org/D111270

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[PATCH] D105169: [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default

2021-10-15 Thread Hyeongyu Kim via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG80dba72a669b: [Clang/Test]: Rename enable_noundef_analysis 
to disable-noundef-analysis and… (authored by aqjune, committed by hyeongyukim).

Changed prior to commit:
  https://reviews.llvm.org/D105169?vs=368033=380136#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105169/new/

https://reviews.llvm.org/D105169

Files:
  clang/include/clang/Basic/CodeGenOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/CodeGen/CGCall.cpp


Index: clang/lib/CodeGen/CGCall.cpp
===
--- clang/lib/CodeGen/CGCall.cpp
+++ clang/lib/CodeGen/CGCall.cpp
@@ -2255,7 +2255,7 @@
  getLangOpts().Sanitize.has(SanitizerKind::Return);
 
   // Determine if the return type could be partially undef
-  if (CodeGenOpts.EnableNoundefAttrs && HasStrictReturn) {
+  if (!CodeGenOpts.DisableNoundefAttrs && HasStrictReturn) {
 if (!RetTy->isVoidType() && RetAI.getKind() != ABIArgInfo::Indirect &&
 DetermineNoUndef(RetTy, getTypes(), DL, RetAI))
   RetAttrs.addAttribute(llvm::Attribute::NoUndef);
@@ -2390,7 +2390,7 @@
 
 // Decide whether the argument we're handling could be partially undef
 bool ArgNoUndef = DetermineNoUndef(ParamType, getTypes(), DL, AI);
-if (CodeGenOpts.EnableNoundefAttrs && ArgNoUndef)
+if (!CodeGenOpts.DisableNoundefAttrs && ArgNoUndef)
   Attrs.addAttribute(llvm::Attribute::NoUndef);
 
 // 'restrict' -> 'noalias' is done in EmitFunctionProlog when we
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -5314,9 +5314,9 @@
 def clear_ast_before_backend : Flag<["-"], "clear-ast-before-backend">,
   HelpText<"Clear the Clang AST before running backend code generation">,
   MarshallingInfoFlag>;
-def enable_noundef_analysis : Flag<["-"], "enable-noundef-analysis">, 
Group,
-  HelpText<"Enable analyzing function argument and return types for mandatory 
definedness">,
-  MarshallingInfoFlag>;
+def disable_noundef_analysis : Flag<["-"], "disable-noundef-analysis">, 
Group,
+  HelpText<"Disable analyzing function argument and return types for mandatory 
definedness">,
+  MarshallingInfoFlag>;
 def discard_value_names : Flag<["-"], "discard-value-names">,
   HelpText<"Discard value names in LLVM IR">,
   MarshallingInfoFlag>;
Index: clang/include/clang/Basic/CodeGenOptions.def
===
--- clang/include/clang/Basic/CodeGenOptions.def
+++ clang/include/clang/Basic/CodeGenOptions.def
@@ -64,7 +64,7 @@
 CODEGENOPT(DisableO0ImplyOptNone , 1, 0) ///< Don't annonate function with 
optnone at O0
 CODEGENOPT(ExperimentalStrictFloatingPoint, 1, 0) ///< Enables the new, 
experimental
   ///< strict floating point.
-CODEGENOPT(EnableNoundefAttrs, 1, 0) ///< Enable emitting `noundef` attributes 
on IR call arguments and return values
+CODEGENOPT(DisableNoundefAttrs, 1, 0) ///< Disable emitting `noundef` 
attributes on IR call arguments and return values
 CODEGENOPT(LegacyPassManager, 1, 0) ///< Use the legacy pass manager.
 CODEGENOPT(DebugPassManager, 1, 0) ///< Prints debug information for the new
///< pass manager.


Index: clang/lib/CodeGen/CGCall.cpp
===
--- clang/lib/CodeGen/CGCall.cpp
+++ clang/lib/CodeGen/CGCall.cpp
@@ -2255,7 +2255,7 @@
  getLangOpts().Sanitize.has(SanitizerKind::Return);
 
   // Determine if the return type could be partially undef
-  if (CodeGenOpts.EnableNoundefAttrs && HasStrictReturn) {
+  if (!CodeGenOpts.DisableNoundefAttrs && HasStrictReturn) {
 if (!RetTy->isVoidType() && RetAI.getKind() != ABIArgInfo::Indirect &&
 DetermineNoUndef(RetTy, getTypes(), DL, RetAI))
   RetAttrs.addAttribute(llvm::Attribute::NoUndef);
@@ -2390,7 +2390,7 @@
 
 // Decide whether the argument we're handling could be partially undef
 bool ArgNoUndef = DetermineNoUndef(ParamType, getTypes(), DL, AI);
-if (CodeGenOpts.EnableNoundefAttrs && ArgNoUndef)
+if (!CodeGenOpts.DisableNoundefAttrs && ArgNoUndef)
   Attrs.addAttribute(llvm::Attribute::NoUndef);
 
 // 'restrict' -> 'noalias' is done in EmitFunctionProlog when we
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -5314,9 +5314,9 @@
 def clear_ast_before_backend : Flag<["-"], "clear-ast-before-backend">,
   HelpText<"Clear the Clang AST before running backend code generation">,
   MarshallingInfoFlag>;

[clang] 80dba72 - [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default

2021-10-15 Thread hyeongyu kim via cfe-commits


Author: Juneyoung Lee
Date: 2021-10-16T12:01:37+09:00
New Revision: 80dba72a669b5416e97a42fd2c2a7bc5a6d3f44a

URL: 
https://github.com/llvm/llvm-project/commit/80dba72a669b5416e97a42fd2c2a7bc5a6d3f44a
DIFF: 
https://github.com/llvm/llvm-project/commit/80dba72a669b5416e97a42fd2c2a7bc5a6d3f44a.diff

LOG: [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis 
and turn it off by default

Turning on `enable_noundef_analysis` flag allows better codegen by removing 
freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to 
`disable-noundef-analysis` and turning it off by default.

Test updates are made as a separate patch: D108453

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105169

Added: 


Modified: 
clang/include/clang/Basic/CodeGenOptions.def
clang/include/clang/Driver/Options.td
clang/lib/CodeGen/CGCall.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/CodeGenOptions.def 
b/clang/include/clang/Basic/CodeGenOptions.def
index 6101232601755..520487325d6e0 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -64,7 +64,7 @@ CODEGENOPT(DisableLifetimeMarkers, 1, 0) ///< Don't emit any 
lifetime markers
 CODEGENOPT(DisableO0ImplyOptNone , 1, 0) ///< Don't annonate function with 
optnone at O0
 CODEGENOPT(ExperimentalStrictFloatingPoint, 1, 0) ///< Enables the new, 
experimental
   ///< strict floating point.
-CODEGENOPT(EnableNoundefAttrs, 1, 0) ///< Enable emitting `noundef` attributes 
on IR call arguments and return values
+CODEGENOPT(DisableNoundefAttrs, 1, 0) ///< Disable emitting `noundef` 
attributes on IR call arguments and return values
 CODEGENOPT(LegacyPassManager, 1, 0) ///< Use the legacy pass manager.
 CODEGENOPT(DebugPassManager, 1, 0) ///< Prints debug information for the new
///< pass manager.

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 4d422abd03a0e..ab7571f0bde4b 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5314,9 +5314,9 @@ def disable_free : Flag<["-"], "disable-free">,
 def clear_ast_before_backend : Flag<["-"], "clear-ast-before-backend">,
   HelpText<"Clear the Clang AST before running backend code generation">,
   MarshallingInfoFlag>;
-def enable_noundef_analysis : Flag<["-"], "enable-noundef-analysis">, 
Group,
-  HelpText<"Enable analyzing function argument and return types for mandatory 
definedness">,
-  MarshallingInfoFlag>;
+def disable_noundef_analysis : Flag<["-"], "disable-noundef-analysis">, 
Group,
+  HelpText<"Disable analyzing function argument and return types for mandatory 
definedness">,
+  MarshallingInfoFlag>;
 def discard_value_names : Flag<["-"], "discard-value-names">,
   HelpText<"Discard value names in LLVM IR">,
   MarshallingInfoFlag>;

diff  --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index daea09be3e70b..c3b87398c4971 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -2255,7 +2255,7 @@ void CodeGenModule::ConstructAttributeList(
  getLangOpts().Sanitize.has(SanitizerKind::Return);
 
   // Determine if the return type could be partially undef
-  if (CodeGenOpts.EnableNoundefAttrs && HasStrictReturn) {
+  if (!CodeGenOpts.DisableNoundefAttrs && HasStrictReturn) {
 if (!RetTy->isVoidType() && RetAI.getKind() != ABIArgInfo::Indirect &&
 DetermineNoUndef(RetTy, getTypes(), DL, RetAI))
   RetAttrs.addAttribute(llvm::Attribute::NoUndef);
@@ -2390,7 +2390,7 @@ void CodeGenModule::ConstructAttributeList(
 
 // Decide whether the argument we're handling could be partially undef
 bool ArgNoUndef = DetermineNoUndef(ParamType, getTypes(), DL, AI);
-if (CodeGenOpts.EnableNoundefAttrs && ArgNoUndef)
+if (!CodeGenOpts.DisableNoundefAttrs && ArgNoUndef)
   Attrs.addAttribute(llvm::Attribute::NoUndef);
 
 // 'restrict' -> 'noalias' is done in EmitFunctionProlog when we



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[PATCH] D111923: [RISCV] Split RISCV vector builtins into their own file and namespace.

2021-10-15 Thread Craig Topper via Phabricator via cfe-commits

craig.topper created this revision.
craig.topper added reviewers: HsiangKai, khchen, arcbbb, kito-cheng.
Herald added subscribers: achieveartificialintelligence, ctetreau, StephenFan, 
vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, 
Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, 
edward-jones, zzheng, jrtc27, shiva0217, niosHD, sabuasal, simoncook, 
johnrusso, rbar, asb.
Herald added a reviewer: aaron.ballman.
craig.topper requested review of this revision.
Herald added a subscriber: MaskRay.
Herald added a project: clang.

Similar to SVE, this separates the RVV builtlins into their own
region of builtin IDs. Only those IDs are allowed to be used by
the builtin_alias attribute now.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111923

Files:
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/include/clang/Basic/BuiltinsRISCVVector.def
  clang/include/clang/Basic/TargetBuiltins.h
  clang/include/clang/module.modulemap
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp

Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -1048,7 +1048,7 @@
   PrevDef->emitCodeGenSwitchBody(OS);
 }
 PrevDef = Def.get();
-OS << "case RISCV::BI__builtin_rvv_" << Def->getName() << ":\n";
+OS << "case RISCVVector::BI__builtin_rvv_" << Def->getName() << ":\n";
   }
   Defs.back()->emitCodeGenSwitchBody(OS);
   OS << "\n";
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -5340,8 +5340,8 @@
 }
 
 static bool RISCVAliasValid(unsigned BuiltinID, StringRef AliasName) {
-  return BuiltinID >= Builtin::FirstTSBuiltin &&
- BuiltinID < RISCV::LastTSBuiltin;
+  return BuiltinID >= RISCV::FirstRVVBuiltin &&
+ BuiltinID <= RISCV::LastRVVBuiltin;
 }
 
 static void handleBuiltinAliasAttr(Sema , Decl *D,
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3661,137 +3661,137 @@
 return true;
 
   switch (BuiltinID) {
-  case RISCV::BI__builtin_rvv_vsetvli:
+  case RISCVVector::BI__builtin_rvv_vsetvli:
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, 3) ||
CheckRISCVLMUL(TheCall, 2);
-  case RISCV::BI__builtin_rvv_vsetvlimax:
+  case RISCVVector::BI__builtin_rvv_vsetvlimax:
 return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
CheckRISCVLMUL(TheCall, 1);
-  case RISCV::BI__builtin_rvv_vget_v_i8m2_i8m1:
-  case RISCV::BI__builtin_rvv_vget_v_i16m2_i16m1:
-  case RISCV::BI__builtin_rvv_vget_v_i32m2_i32m1:
-  case RISCV::BI__builtin_rvv_vget_v_i64m2_i64m1:
-  case RISCV::BI__builtin_rvv_vget_v_f32m2_f32m1:
-  case RISCV::BI__builtin_rvv_vget_v_f64m2_f64m1:
-  case RISCV::BI__builtin_rvv_vget_v_u8m2_u8m1:
-  case RISCV::BI__builtin_rvv_vget_v_u16m2_u16m1:
-  case RISCV::BI__builtin_rvv_vget_v_u32m2_u32m1:
-  case RISCV::BI__builtin_rvv_vget_v_u64m2_u64m1:
-  case RISCV::BI__builtin_rvv_vget_v_i8m4_i8m2:
-  case RISCV::BI__builtin_rvv_vget_v_i16m4_i16m2:
-  case RISCV::BI__builtin_rvv_vget_v_i32m4_i32m2:
-  case RISCV::BI__builtin_rvv_vget_v_i64m4_i64m2:
-  case RISCV::BI__builtin_rvv_vget_v_f32m4_f32m2:
-  case RISCV::BI__builtin_rvv_vget_v_f64m4_f64m2:
-  case RISCV::BI__builtin_rvv_vget_v_u8m4_u8m2:
-  case RISCV::BI__builtin_rvv_vget_v_u16m4_u16m2:
-  case RISCV::BI__builtin_rvv_vget_v_u32m4_u32m2:
-  case RISCV::BI__builtin_rvv_vget_v_u64m4_u64m2:
-  case RISCV::BI__builtin_rvv_vget_v_i8m8_i8m4:
-  case RISCV::BI__builtin_rvv_vget_v_i16m8_i16m4:
-  case RISCV::BI__builtin_rvv_vget_v_i32m8_i32m4:
-  case RISCV::BI__builtin_rvv_vget_v_i64m8_i64m4:
-  case RISCV::BI__builtin_rvv_vget_v_f32m8_f32m4:
-  case RISCV::BI__builtin_rvv_vget_v_f64m8_f64m4:
-  case RISCV::BI__builtin_rvv_vget_v_u8m8_u8m4:
-  case RISCV::BI__builtin_rvv_vget_v_u16m8_u16m4:
-  case RISCV::BI__builtin_rvv_vget_v_u32m8_u32m4:
-  case RISCV::BI__builtin_rvv_vget_v_u64m8_u64m4:
+  case RISCVVector::BI__builtin_rvv_vget_v_i8m2_i8m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_i16m2_i16m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_i32m2_i32m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_i64m2_i64m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_f32m2_f32m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_f64m2_f64m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_u8m2_u8m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_u16m2_u16m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_u32m2_u32m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_u64m2_u64m1:
+  case RISCVVector::BI__builtin_rvv_vget_v_i8m4_i8m2:
+  case

[PATCH] D111914: [WebAssembly] Add prototype relaxed laneselect instructions

2021-10-15 Thread Thomas Lively via Phabricator via cfe-commits

tlively closed this revision.
tlively added a comment.

I forgot to include the revision URL in the commit message, but this has been 
landed as rGda07942834fe 



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[PATCH] D109128: [VFS] Use original path when falling back to external FS

2021-10-15 Thread Keith Smiley via Phabricator via cfe-commits

keith updated this revision to Diff 380125.
keith added a comment.

Improve lit test


Repository:
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Files:
  clang/test/VFS/relative-path-errors.c
  llvm/include/llvm/Support/VirtualFileSystem.h
  llvm/lib/Support/VirtualFileSystem.cpp
  llvm/unittests/Support/VirtualFileSystemTest.cpp

Index: llvm/unittests/Support/VirtualFileSystemTest.cpp
===
--- llvm/unittests/Support/VirtualFileSystemTest.cpp
+++ llvm/unittests/Support/VirtualFileSystemTest.cpp
@@ -1627,6 +1627,114 @@
   EXPECT_EQ(0, NumDiagnostics);
 }
 
+TEST_F(VFSFromYAMLTest, ReturnsRequestedPathVFSMiss) {
+  IntrusiveRefCntPtr BaseFS(
+  new vfs::InMemoryFileSystem);
+  BaseFS->addFile("//root/foo/a", 0,
+  MemoryBuffer::getMemBuffer("contents of a"));
+  ASSERT_FALSE(BaseFS->setCurrentWorkingDirectory("//root/foo"));
+  auto RemappedFS = vfs::RedirectingFileSystem::create(
+  {}, /*UseExternalNames=*/false, *BaseFS);
+
+  auto OpenedF = RemappedFS->openFileForRead("a");
+  ASSERT_FALSE(OpenedF.getError());
+  llvm::ErrorOr Name = (*OpenedF)->getName();
+  ASSERT_FALSE(Name.getError());
+  EXPECT_EQ("a", Name.get());
+
+  auto OpenedS = (*OpenedF)->status();
+  ASSERT_FALSE(OpenedS.getError());
+  EXPECT_EQ("a", OpenedS->getName());
+  EXPECT_FALSE(OpenedS->IsVFSMapped);
+
+  auto DirectS = RemappedFS->status("a");
+  ASSERT_FALSE(DirectS.getError());
+  EXPECT_EQ("a", DirectS->getName());
+  EXPECT_FALSE(DirectS->IsVFSMapped);
+
+  EXPECT_EQ(0, NumDiagnostics);
+}
+
+TEST_F(VFSFromYAMLTest, ReturnsExternalPathVFSHit) {
+  IntrusiveRefCntPtr BaseFS(
+  new vfs::InMemoryFileSystem);
+  BaseFS->addFile("//root/foo/realname", 0,
+  MemoryBuffer::getMemBuffer("contents of a"));
+  auto FS =
+  getFromYAMLString("{ 'use-external-names': true,\n"
+"  'roots': [\n"
+"{\n"
+"  'type': 'directory',\n"
+"  'name': '//root/foo',\n"
+"  'contents': [ {\n"
+"  'type': 'file',\n"
+"  'name': 'vfsname',\n"
+"  'external-contents': 'realname'\n"
+"}\n"
+"  ]\n"
+"}]}",
+BaseFS);
+  ASSERT_FALSE(FS->setCurrentWorkingDirectory("//root/foo"));
+
+  auto OpenedF = FS->openFileForRead("vfsname");
+  ASSERT_FALSE(OpenedF.getError());
+  llvm::ErrorOr Name = (*OpenedF)->getName();
+  ASSERT_FALSE(Name.getError());
+  EXPECT_EQ("realname", Name.get());
+
+  auto OpenedS = (*OpenedF)->status();
+  ASSERT_FALSE(OpenedS.getError());
+  EXPECT_EQ("realname", OpenedS->getName());
+  EXPECT_TRUE(OpenedS->IsVFSMapped);
+
+  auto DirectS = FS->status("vfsname");
+  ASSERT_FALSE(DirectS.getError());
+  EXPECT_EQ("realname", DirectS->getName());
+  EXPECT_TRUE(DirectS->IsVFSMapped);
+
+  EXPECT_EQ(0, NumDiagnostics);
+}
+
+TEST_F(VFSFromYAMLTest, ReturnsInternalPathVFSHit) {
+  IntrusiveRefCntPtr BaseFS(
+  new vfs::InMemoryFileSystem);
+  BaseFS->addFile("//root/foo/realname", 0,
+  MemoryBuffer::getMemBuffer("contents of a"));
+  auto FS =
+  getFromYAMLString("{ 'use-external-names': false,\n"
+"  'roots': [\n"
+"{\n"
+"  'type': 'directory',\n"
+"  'name': '//root/foo',\n"
+"  'contents': [ {\n"
+"  'type': 'file',\n"
+"  'name': 'vfsname',\n"
+"  'external-contents': 'realname'\n"
+"}\n"
+"  ]\n"
+"}]}",
+BaseFS);
+  ASSERT_FALSE(FS->setCurrentWorkingDirectory("//root/foo"));
+
+  auto OpenedF = FS->openFileForRead("vfsname");
+  ASSERT_FALSE(OpenedF.getError());
+  llvm::ErrorOr Name = (*OpenedF)->getName();
+  ASSERT_FALSE(Name.getError());
+  EXPECT_EQ("vfsname", Name.get());
+
+  auto OpenedS = (*OpenedF)->status();
+  ASSERT_FALSE(OpenedS.getError());
+  EXPECT_EQ("vfsname", OpenedS->getName());
+  EXPECT_TRUE(OpenedS->IsVFSMapped);
+
+  auto DirectS = FS->status("vfsname");
+  ASSERT_FALSE(DirectS.getError());
+  EXPECT_EQ("vfsname", DirectS->getName());
+  EXPECT_TRUE(DirectS->IsVFSMapped);
+
+  EXPECT_EQ(0, NumDiagnostics);
+}
+
 TEST_F(VFSFromYAMLTest, CaseInsensitive) {
   IntrusiveRefCntPtr Lower(new DummyFileSystem());
   Lower->addRegularFile("//root/foo/bar/a");
Index: llvm/lib/Support/VirtualFileSystem.cpp
===
---

[clang] da07942 - [WebAssembly] Add prototype relaxed laneselect instructions

2021-10-15 Thread Thomas Lively via cfe-commits


Author: Zhi An Ng
Date: 2021-10-15T17:45:09-07:00
New Revision: da07942834fe3ea575d7f7b980940d938411afe5

URL: 
https://github.com/llvm/llvm-project/commit/da07942834fe3ea575d7f7b980940d938411afe5
DIFF: 
https://github.com/llvm/llvm-project/commit/da07942834fe3ea575d7f7b980940d938411afe5.diff

LOG: [WebAssembly] Add prototype relaxed laneselect instructions

Add i8x16, i16x8, i32x4, i64x2 laneselect instructions. These are only
exposed as builtins, and require user opt-in.

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 778424686a10b..557189c01a279 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -167,5 +167,10 @@ TARGET_BUILTIN(__builtin_wasm_fms_f32x4, "V4fV4fV4fV4f", 
"nc", "relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_fma_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_fms_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
 
+TARGET_BUILTIN(__builtin_wasm_laneselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_laneselect_i16x8, "V8sV8sV8sV8s", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_laneselect_i32x4, "V4iV4iV4iV4i", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_laneselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", 
"relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 9172a21c5a985..9a44fddafd649 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18308,6 +18308,17 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, A->getType());
 return Builder.CreateCall(Callee, {A, B, C});
   }
+  case WebAssembly::BI__builtin_wasm_laneselect_i8x16:
+  case WebAssembly::BI__builtin_wasm_laneselect_i16x8:
+  case WebAssembly::BI__builtin_wasm_laneselect_i32x4:
+  case WebAssembly::BI__builtin_wasm_laneselect_i64x2: {
+Value *A = EmitScalarExpr(E->getArg(0));
+Value *B = EmitScalarExpr(E->getArg(1));
+Value *C = EmitScalarExpr(E->getArg(2));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_laneselect, A->getType());
+return Builder.CreateCall(Callee, {A, B, C});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 914c37dc1e1ef..e86812c03f3ac 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -704,3 +704,31 @@ f64x2 fms_f64x2(f64x2 a, f64x2 b, f64x2 c) {
   // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b, <2 x double> %c)
   // WEBASSEMBLY-NEXT: ret
 }
+
+i8x16 laneselect_i8x16(i8x16 a, i8x16 b, i8x16 c) {
+  return __builtin_wasm_laneselect_i8x16(a, b, c);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.laneselect.v16i8(
+  // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i16x8 laneselect_i16x8(i16x8 a, i16x8 b, i16x8 c) {
+  return __builtin_wasm_laneselect_i16x8(a, b, c);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.laneselect.v8i16(
+  // WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i32x4 laneselect_i32x4(i32x4 a, i32x4 b, i32x4 c) {
+  return __builtin_wasm_laneselect_i32x4(a, b, c);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.laneselect.v4i32(
+  // WEBASSEMBLY-SAME: <4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i64x2 laneselect_i64x2(i64x2 a, i64x2 b, i64x2 c) {
+  return __builtin_wasm_laneselect_i64x2(a, b, c);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.laneselect.v2i64(
+  // WEBASSEMBLY-SAME: <2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
+  // WEBASSEMBLY-NEXT: ret
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index de0b36eadecfa..7d0f38bc9889d 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -195,6 +195,11 @@ def int_wasm_fms :
 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
+def int_wasm_laneselect :
+  Intrinsic<[llvm_anyvector_ty],
+[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+[IntrNoMem, IntrSpeculatable]>;
+
 
//===--===//
 // Thread-local storage

[PATCH] D111914: [WebAssembly] Add prototype relaxed laneselect instructions

2021-10-15 Thread Thomas Lively via Phabricator via cfe-commits

tlively accepted this revision.
tlively added a comment.
This revision is now accepted and ready to land.

Awesome, thanks! I'll go ahead and land this.


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[PATCH] D111914: [WebAssembly] Add prototype relaxed laneselect instructions

2021-10-15 Thread Ng Zhi An via Phabricator via cfe-commits

ngzhian created this revision.
ngzhian added a reviewer: tlively.
Herald added subscribers: ecnelises, sunfish, hiraditya, jgravelle-google, 
sbc100, dschuff.
ngzhian requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, aheejin.
Herald added projects: clang, LLVM.

Add i8x16, i16x8, i32x4, i64x2 laneselect instructions. These are only
exposed as builtins, and require user opt-in.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111914

Files:
  clang/include/clang/Basic/BuiltinsWebAssembly.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-wasm.c
  llvm/include/llvm/IR/IntrinsicsWebAssembly.td
  llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
  llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
  llvm/test/MC/WebAssembly/simd-encodings.s

Index: llvm/test/MC/WebAssembly/simd-encodings.s
===
--- llvm/test/MC/WebAssembly/simd-encodings.s
+++ llvm/test/MC/WebAssembly/simd-encodings.s
@@ -791,4 +791,16 @@
 # CHECK: f64x2.fms # encoding: [0xfd,0xd0,0x01]
 f64x2.fms
 
+# CHECK: i8x16.laneselect # encoding: [0xfd,0xb2,0x01]
+i8x16.laneselect
+
+# CHECK: i16x8.laneselect # encoding: [0xfd,0xb3,0x01]
+i16x8.laneselect
+
+# CHECK: i32x4.laneselect # encoding: [0xfd,0xd2,0x01]
+i32x4.laneselect
+
+# CHECK: i64x2.laneselect # encoding: [0xfd,0xd3,0x01]
+i64x2.laneselect
+
 end_function
Index: llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
===
--- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -180,6 +180,18 @@
   ret <16 x i8> %res
 }
 
+; CHECK-LABEL: laneselect_v16i8:
+; CHECK-NEXT: .functype laneselect_v16i8 (v128, v128, v128) -> (v128){{$}}
+; CHECK-NEXT: i8x16.laneselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <16 x i8> @llvm.wasm.laneselect.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
+define <16 x i8> @laneselect_v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
+  %v = call <16 x i8> @llvm.wasm.laneselect.v16i8(
+<16 x i8> %a, <16 x i8> %b, <16 x i8> %c
+  )
+  ret <16 x i8> %v
+}
+
 ; ==
 ; 8 x i16
 ; ==
@@ -334,6 +346,18 @@
   ret <8 x i16> %a
 }
 
+; CHECK-LABEL: laneselect_v8i16:
+; CHECK-NEXT: .functype laneselect_v8i16 (v128, v128, v128) -> (v128){{$}}
+; CHECK-NEXT: i16x8.laneselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <8 x i16> @llvm.wasm.laneselect.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
+define <8 x i16> @laneselect_v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
+  %v = call <8 x i16> @llvm.wasm.laneselect.v8i16(
+<8 x i16> %a, <8 x i16> %b, <8 x i16> %c
+  )
+  ret <8 x i16> %v
+}
+
 ; ==
 ; 4 x i32
 ; ==
@@ -480,6 +504,18 @@
   ret <4 x i32> %a
 }
 
+; CHECK-LABEL: laneselect_v4i32:
+; CHECK-NEXT: .functype laneselect_v4i32 (v128, v128, v128) -> (v128){{$}}
+; CHECK-NEXT: i32x4.laneselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <4 x i32> @llvm.wasm.laneselect.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
+define <4 x i32> @laneselect_v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
+  %v = call <4 x i32> @llvm.wasm.laneselect.v4i32(
+<4 x i32> %a, <4 x i32> %b, <4 x i32> %c
+  )
+  ret <4 x i32> %v
+}
+
 ; ==
 ; 2 x i64
 ; ==
@@ -525,6 +561,18 @@
   ret <2 x i64> %a
 }
 
+; CHECK-LABEL: laneselect_v2i64:
+; CHECK-NEXT: .functype laneselect_v2i64 (v128, v128, v128) -> (v128){{$}}
+; CHECK-NEXT: i64x2.laneselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <2 x i64> @llvm.wasm.laneselect.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
+define <2 x i64> @laneselect_v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
+  %v = call <2 x i64> @llvm.wasm.laneselect.v2i64(
+<2 x i64> %a, <2 x i64> %b, <2 x i64> %c
+  )
+  ret <2 x i64> %v
+}
+
 ; ==
 ; 4 x f32
 ; ==
Index: llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
===
--- llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1344,3 +1344,20 @@
 
 defm "" : SIMDFM;
 defm "" : SIMDFM;
+
+//===--===//
+//

[PATCH] D111909: [clang-tidy] DefinitionsInHeadersCheck: Added option for checking C Code

2021-10-15 Thread Max Schroetter via Phabricator via cfe-commits

schrc3b6 added a comment.

This is my first PR here, so if I missed something, I will be more than happy 
to change anything if you point me in the right direction.

I didn't add an extra test so far, because check_clang_tidy.py doesn't support 
the .h extension so far. And before adding C support to the test helper, I 
wanted to get feedback if this is something that would even get mainlined, 
since clang-tidy is mainly for c++.


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[clang] 489561d - [clang] fix typo correction not looking for candidates in base classes.

2021-10-15 Thread Matheus Izvekov via cfe-commits


Author: Matheus Izvekov
Date: 2021-10-16T00:35:22+02:00
New Revision: 489561d46381d41a068beed1a2e18e00f0660248

URL: 
https://github.com/llvm/llvm-project/commit/489561d46381d41a068beed1a2e18e00f0660248
DIFF: 
https://github.com/llvm/llvm-project/commit/489561d46381d41a068beed1a2e18e00f0660248.diff

LOG: [clang] fix typo correction not looking for candidates in base classes.

RecordMemberExprValidator was not looking through ElaboratedType
nodes when looking for candidates which occur in base classes.

Signed-off-by: Matheus Izvekov 

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D111830

Added: 


Modified: 
clang/lib/Sema/SemaExprMember.cpp
clang/test/CXX/drs/dr1xx.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaExprMember.cpp 
b/clang/lib/Sema/SemaExprMember.cpp
index 2a3b696417d8..83006f9d804a 100644
--- a/clang/lib/Sema/SemaExprMember.cpp
+++ b/clang/lib/Sema/SemaExprMember.cpp
@@ -611,11 +611,10 @@ class RecordMemberExprValidatorCCC final : public 
CorrectionCandidateCallback {
 if (Record->containsDecl(ND))
   return true;
 
-if (const CXXRecordDecl *RD = dyn_cast(Record)) {
+if (const auto *RD = dyn_cast(Record)) {
   // Accept candidates that occur in any of the current class' base 
classes.
   for (const auto  : RD->bases()) {
-if (const RecordType *BSTy =
-dyn_cast_or_null(BS.getType().getTypePtrOrNull())) 
{
+if (const auto *BSTy = BS.getType()->getAs()) {
   if (BSTy->getDecl()->containsDecl(ND))
 return true;
 }

diff  --git a/clang/test/CXX/drs/dr1xx.cpp b/clang/test/CXX/drs/dr1xx.cpp
index 4efa2e2fa943..51abb36dc9e3 100644
--- a/clang/test/CXX/drs/dr1xx.cpp
+++ b/clang/test/CXX/drs/dr1xx.cpp
@@ -477,7 +477,7 @@ namespace dr140 { // dr140: yes
 
 namespace dr141 { // dr141: yes
   template void f();
-  template struct S { int n; };
+  template struct S { int n; }; // expected-note 
{{'::dr141::S::n' declared here}}
   struct A : S {
 template void f();
 template struct S {};
@@ -485,7 +485,7 @@ namespace dr141 { // dr141: yes
   struct B : S {} b;
   void g() {
 a.f();
-(void)a.S::n; // expected-error {{no member named 'n'}}
+(void)a.S::n; // expected-error {{no member named 'n' in 
'dr141::A::S'; did you mean '::dr141::S::n'?}}
 #if __cplusplus < 201103L
 // expected-error@-2 {{ambiguous}}
 // expected-note@-11 {{lookup from the current scope}}



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[PATCH] D111830: [clang] fix typo correction not looking for candidates in base classes.

2021-10-15 Thread Matheus Izvekov via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rG489561d46381: [clang] fix typo correction not looking for 
candidates in base classes. (authored by mizvekov).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111830/new/

https://reviews.llvm.org/D111830

Files:
  clang/lib/Sema/SemaExprMember.cpp
  clang/test/CXX/drs/dr1xx.cpp


Index: clang/test/CXX/drs/dr1xx.cpp
===
--- clang/test/CXX/drs/dr1xx.cpp
+++ clang/test/CXX/drs/dr1xx.cpp
@@ -477,7 +477,7 @@
 
 namespace dr141 { // dr141: yes
   template void f();
-  template struct S { int n; };
+  template struct S { int n; }; // expected-note 
{{'::dr141::S::n' declared here}}
   struct A : S {
 template void f();
 template struct S {};
@@ -485,7 +485,7 @@
   struct B : S {} b;
   void g() {
 a.f();
-(void)a.S::n; // expected-error {{no member named 'n'}}
+(void)a.S::n; // expected-error {{no member named 'n' in 
'dr141::A::S'; did you mean '::dr141::S::n'?}}
 #if __cplusplus < 201103L
 // expected-error@-2 {{ambiguous}}
 // expected-note@-11 {{lookup from the current scope}}
Index: clang/lib/Sema/SemaExprMember.cpp
===
--- clang/lib/Sema/SemaExprMember.cpp
+++ clang/lib/Sema/SemaExprMember.cpp
@@ -611,11 +611,10 @@
 if (Record->containsDecl(ND))
   return true;
 
-if (const CXXRecordDecl *RD = dyn_cast(Record)) {
+if (const auto *RD = dyn_cast(Record)) {
   // Accept candidates that occur in any of the current class' base 
classes.
   for (const auto  : RD->bases()) {
-if (const RecordType *BSTy =
-dyn_cast_or_null(BS.getType().getTypePtrOrNull())) 
{
+if (const auto *BSTy = BS.getType()->getAs()) {
   if (BSTy->getDecl()->containsDecl(ND))
 return true;
 }


Index: clang/test/CXX/drs/dr1xx.cpp
===
--- clang/test/CXX/drs/dr1xx.cpp
+++ clang/test/CXX/drs/dr1xx.cpp
@@ -477,7 +477,7 @@
 
 namespace dr141 { // dr141: yes
   template void f();
-  template struct S { int n; };
+  template struct S { int n; }; // expected-note {{'::dr141::S::n' declared here}}
   struct A : S {
 template void f();
 template struct S {};
@@ -485,7 +485,7 @@
   struct B : S {} b;
   void g() {
 a.f();
-(void)a.S::n; // expected-error {{no member named 'n'}}
+(void)a.S::n; // expected-error {{no member named 'n' in 'dr141::A::S'; did you mean '::dr141::S::n'?}}
 #if __cplusplus < 201103L
 // expected-error@-2 {{ambiguous}}
 // expected-note@-11 {{lookup from the current scope}}
Index: clang/lib/Sema/SemaExprMember.cpp
===
--- clang/lib/Sema/SemaExprMember.cpp
+++ clang/lib/Sema/SemaExprMember.cpp
@@ -611,11 +611,10 @@
 if (Record->containsDecl(ND))
   return true;
 
-if (const CXXRecordDecl *RD = dyn_cast(Record)) {
+if (const auto *RD = dyn_cast(Record)) {
   // Accept candidates that occur in any of the current class' base classes.
   for (const auto  : RD->bases()) {
-if (const RecordType *BSTy =
-dyn_cast_or_null(BS.getType().getTypePtrOrNull())) {
+if (const auto *BSTy = BS.getType()->getAs()) {
   if (BSTy->getDecl()->containsDecl(ND))
 return true;
 }
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[PATCH] D111909: [clang-tidy] DefinitionsInHeadersCheck: Added option for checking C Code

2021-10-15 Thread Max Schroetter via Phabricator via cfe-commits

schrc3b6 created this revision.
Herald added a subscriber: xazax.hun.
schrc3b6 added a reviewer: alexfh.
schrc3b6 updated this revision to Diff 380104.
schrc3b6 added a comment.
schrc3b6 published this revision for review.
Herald added a project: clang-tools-extra.
Herald added a subscriber: cfe-commits.

fixed typo


Eventhough there are no OCR rules in the C standard, to my
knowledge, it is recommended to not include definitions in header files.
This Patch introduces the CheckCCode Option which add C99 to the
language check. Since this checker was original written for C++ it
is off by default.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111909

Files:
  clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
  clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
  clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst


Index: clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst
===
--- clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst
+++ clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst
@@ -102,3 +102,8 @@
 
When `true`, the check will use the file extension to distinguish header
files. Default is `true`.
+
+.. option:: CheckCCode
+
+   When `true` C99 is added to the minimum language requirements for this 
+   Cecker. Default is `false` because this Checker was not build for C.
Index: clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
===
--- clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
+++ clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
@@ -22,6 +22,8 @@
 /// The check supports these options:
 ///   - `UseHeaderFileExtension`: Whether to use file extension to distinguish
 /// header files. True by default.
+///   - `CheckCCode`: Adds C99 to the minimum Language Requirements for this
+/// Checker. Disabled by default because this Checker wasn't build for C.
 ///   - `HeaderFileExtensions`: a semicolon-separated list of filename
 /// extensions of header files (The filename extension should not contain
 /// "." prefix). ";h;hh;hpp;hxx" by default.
@@ -35,6 +37,9 @@
 public:
   DefinitionsInHeadersCheck(StringRef Name, ClangTidyContext *Context);
   bool isLanguageVersionSupported(const LangOptions ) const override {
+if (CheckCCode) {
+  return LangOpts.CPlusPlus11 || LangOpts.C99;
+}
 return LangOpts.CPlusPlus11;
   }
   void storeOptions(ClangTidyOptions::OptionMap ) override;
@@ -43,6 +48,7 @@
 
 private:
   const bool UseHeaderFileExtension;
+  const bool CheckCCode;
   const std::string RawStringHeaderFileExtensions;
   utils::FileExtensionsSet HeaderFileExtensions;
 };
Index: clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
===
--- clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
+++ clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
@@ -31,6 +31,7 @@
  ClangTidyContext *Context)
 : ClangTidyCheck(Name, Context),
   UseHeaderFileExtension(Options.get("UseHeaderFileExtension", true)),
+  CheckCCode(Options.get("CheckCCode", false)),
   RawStringHeaderFileExtensions(Options.getLocalOrGlobal(
   "HeaderFileExtensions", utils::defaultHeaderFileExtensions())) {
   if (!utils::parseFileExtensions(RawStringHeaderFileExtensions,
@@ -44,6 +45,7 @@
 void DefinitionsInHeadersCheck::storeOptions(
 ClangTidyOptions::OptionMap ) {
   Options.store(Opts, "UseHeaderFileExtension", UseHeaderFileExtension);
+  Options.store(Opts, "CheckCCode", CheckCCode);
   Options.store(Opts, "HeaderFileExtensions", RawStringHeaderFileExtensions);
 }
 


Index: clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst
===
--- clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst
+++ clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst
@@ -102,3 +102,8 @@
 
When `true`, the check will use the file extension to distinguish header
files. Default is `true`.
+
+.. option:: CheckCCode
+
+   When `true` C99 is added to the minimum language requirements for this 
+   Cecker. Default is `false` because this Checker was not build for C.
Index: clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
===
--- clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
+++ clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
@@ -22,6 +22,8 @@
 /// The check supports these options:
 ///   - `UseHeaderFileExtension`: Whether to use file extension to distinguish
 /// header files. True by default.
+///   - `CheckCCode`: Adds

[clang] 1830ec9 - Revert "[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols"

2021-10-15 Thread Anshil Gandhi via cfe-commits


Author: Anshil Gandhi
Date: 2021-10-15T16:16:18-06:00
New Revision: 1830ec94ac022ae0b6d6876fc2251e6b91e5931e

URL: 
https://github.com/llvm/llvm-project/commit/1830ec94ac022ae0b6d6876fc2251e6b91e5931e
DIFF: 
https://github.com/llvm/llvm-project/commit/1830ec94ac022ae0b6d6876fc2251e6b91e5931e.diff

LOG: Revert "[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined 
symbols"

This reverts commit 03375a3fb33b11e1249d9c88070b7f33cb97802a.

Added: 


Modified: 
clang/lib/Driver/ToolChains/Clang.cpp
llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
llvm/test/CodeGen/AMDGPU/inline-calls.ll

Removed: 
clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu



diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index 316c6026adf5c..83afbc3952d84 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -5089,9 +5089,9 @@ void Clang::ConstructJob(Compilation , const JobAction 
,
   }
 
   // Enable -mconstructor-aliases except on darwin, where we have to work 
around
-  // a linker bug (see ), and CUDA device code, where
-  // aliases aren't supported.
-  if (!RawTriple.isOSDarwin() && !RawTriple.isNVPTX())
+  // a linker bug (see ), and CUDA/AMDGPU device code,
+  // where aliases aren't supported.
+  if (!RawTriple.isOSDarwin() && !RawTriple.isNVPTX() && !RawTriple.isAMDGPU())
 CmdArgs.push_back("-mconstructor-aliases");
 
   // Darwin's kernel doesn't support guard variables; just die if we

diff  --git a/clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu 
b/clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
deleted file mode 100644
index f75088f8e1415..0
--- a/clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
+++ /dev/null
@@ -1,17 +0,0 @@
-// REQUIRES: amdgpu-registered-target, clang-driver
-
-// RUN: %clang --offload-arch=gfx906 --cuda-device-only -nogpulib -nogpuinc -x 
hip -emit-llvm -S -o - %s \
-// RUN:   -fgpu-rdc -O3 -mllvm -amdgpu-early-inline-all=true -mllvm 
-amdgpu-function-calls=false | \
-// RUN:   FileCheck %s
-
-#include "Inputs/cuda.h"
-
-// CHECK: %struct.B = type { i8 }
-struct B {
-
-  // CHECK: @_ZN1BC1Ei = hidden unnamed_addr alias void (%struct.B*, i32), 
void (%struct.B*, i32)* @_ZN1BC2Ei
-  __device__ B(int x);
-};
-
-__device__ B::B(int x) {
-}

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
index 2e24e9f929d2a..7ff24d1e9c62b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
@@ -15,7 +15,6 @@
 #include "AMDGPU.h"
 #include "AMDGPUTargetMachine.h"
 #include "Utils/AMDGPUBaseInfo.h"
-#include "llvm/CodeGen/CommandFlags.h"
 #include "llvm/IR/Module.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/CommandLine.h"
@@ -91,13 +90,9 @@ static bool alwaysInlineImpl(Module , bool GlobalOpt) {
 
   SmallPtrSet FuncsToAlwaysInline;
   SmallPtrSet FuncsToNoInline;
-  Triple TT(M.getTargetTriple());
 
   for (GlobalAlias  : M.aliases()) {
 if (Function* F = dyn_cast(A.getAliasee())) {
-  if (TT.getArch() == Triple::amdgcn &&
-  A.getLinkage() != GlobalValue::InternalLinkage)
-continue;
   A.replaceAllUsesWith(F);
   AliasesToRemove.push_back();
 }

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
index 3c5cb6e190850..e841e939ef34b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
@@ -29,8 +29,6 @@
 #include "SIMachineFunctionInfo.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/IR/GlobalAlias.h"
-#include "llvm/IR/GlobalValue.h"
 #include "llvm/Target/TargetMachine.h"
 
 using namespace llvm;
@@ -63,8 +61,7 @@ static const Function *getCalleeFunction(const MachineOperand 
) {
 assert(Op.getImm() == 0);
 return nullptr;
   }
-  if (auto *GA = dyn_cast(Op.getGlobal()))
-return cast(GA->getOperand(0));
+
   return cast(Op.getGlobal());
 }
 

diff  --git a/llvm/test/CodeGen/AMDGPU/inline-calls.ll 
b/llvm/test/CodeGen/AMDGPU/inline-calls.ll
index 134cd301b9743..233485a202057 100644
--- a/llvm/test/CodeGen/AMDGPU/inline-calls.ll
+++ b/llvm/test/CodeGen/AMDGPU/inline-calls.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple amdgcn-unknown-linux-gnu -mcpu=tahiti 
-verify-machineinstrs < %s | FileCheck  %s
-; RUN: llc -mtriple amdgcn-unknown-linux-gnu -mcpu=tonga -verify-machineinstrs 
< %s | FileCheck  %s
-; RUN: llc -mtriple r600-unknown-linux-gnu -mcpu=redwood -verify-machineinstrs 
< %s | FileCheck %s --check-prefix=R600
+; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck  
%s
+; RUN: llc -march=amdgcn -mcpu=tonga

[PATCH] D111639: [Sema] check PseudoObject when rebuilding CXXOperatorCallExpr in template instantiation

2021-10-15 Thread John McCall via Phabricator via cfe-commits

rjmccall added a comment.

I don't think we currently hold very strongly to that ActOn vs. Build 
philosophy across all productions, but it does seem like a good idea.

I don't really  know why there's this much duplication between the code paths.  
The only semantic distinction I know of is that IIRC we need to make sure we 
use the unqualified operator lookup results from the template instead of 
reperforming the lookup.


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[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

2021-10-15 Thread Matt D. via Phabricator via cfe-commits

Matt added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:1832
+  else {
+assert(!Val.getAsInteger(10, Bits));
+CmdArgs.push_back(

There may be a way to avoid side-effects in assertions (`getAsInteger` changing 
the value of `Bits` passed by reference) similarly to the `NewToSet` example in 
https://llvm.org/docs/CodingStandards.html#assert-liberally, similarly to 
https://github.com/llvm/llvm-project/blob/release/13.x/llvm/include/llvm/TableGen/Record.h#L1980-L1983
 or 
https://github.com/llvm/llvm-project/blob/release/13.x/clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp#L181-L185.


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[PATCH] D111543: [clang][modules] Stop creating `IdentifierInfo` for names of explicit modules

2021-10-15 Thread Richard Smith - zygoloid via Phabricator via cfe-commits

rsmith added a comment.

I've stepped through this in a debugger. The problem is that the 
`CompilerInstance` is setting up an `ASTReaderListener` that is informed 
whenever a module is loaded, and that listener is called when the AST file has 
been added to the module manager but hasn't had its header read yet. That 
listener then then attempts to create an `IdentifierInfo`, which won't work, 
because the `ASTReader` is in a weird state, with modules that are loaded but 
not yet set up properly. Here's a backtrace:

  #5  0x09ddff20 in clang::IdentifierTable::get (this=0xffb60e8, 
Name=...) at include/clang/Basic/IdentifierTable.h:600
  #6  0x0a81d41c in clang::Preprocessor::getIdentifierInfo 
(this=0xffb5ef8, Name=...) at clang/include/clang/Lex/Preprocessor.h:1244
  #7  0x0a819464 in (anonymous 
namespace)::ReadModuleNames::ReadModuleName (this=0xffc3100, ModuleName=...) at 
clang/lib/Frontend/CompilerInstance.cpp:573
  #8  0x0ab3d0f6 in clang::ChainedASTReaderListener::ReadModuleName 
(this=0x1000bdd0, ModuleName=...) at clang/lib/Serialization/ASTReader.cpp:158
  #9  0x0ab5dd42 in clang::ASTReader::ReadControlBlock (this=0xffd2fe0, 
F=..., Loaded=..., ImportedBy=0x0, ClientLoadCapabilities=0) at 
clang/lib/Serialization/ASTReader.cpp:2906
  #10 0x0ab5ec50 in clang::ASTReader::ReadASTCore (this=0xffd2fe0, 
FileName=..., Type=clang::serialization::MK_ExplicitModule, ImportLoc=..., 
ImportedBy=0x0, Loaded=..., ExpectedSize=0, ExpectedModTime=0, 
ExpectedSignature=..., ClientLoadCapabilities=0) at 
clang/lib/Serialization/ASTReader.cpp:4572
  #11 0x0ab6684b in clang::ASTReader::ReadAST (this=0xffd2fe0, 
FileName=..., Type=clang::serialization::MK_ExplicitModule, ImportLoc=..., 
ClientLoadCapabilities=0, Imported=0x0)

What actually fails here is that we've not yet loaded the information about the 
identifier table in the `Interface` module, so we mark that slot in the 
identifier resolver as being up to date even though it absolutely isn't.

So, given that `ReadModuleName` needs to be robust against being called when 
half-way through loading modules, when it's not safe to touch any part of the 
AST or identifier table, I agree that it shouldn't be calling 
`getIdentifierInfo`. (I wish we didn't have these incredibly fragile callbacks 
that are run at a time when it's not safe to do most things, but it's not clear 
that's really fixable.) But I think we can still avoid the two different forms 
of cache here. What do you think about reverting the changes to `ModuleMap.h` 
and localizing the fix to the `ASTReaderListener`:

  --- a/clang/lib/Frontend/CompilerInstance.cpp
  +++ b/clang/lib/Frontend/CompilerInstance.cpp
  @@ -565,25 +565,28 @@ namespace {
   // the files we were handed.
   struct ReadModuleNames : ASTReaderListener {
 Preprocessor 
  -  llvm::SmallVector LoadedModules;
  +  llvm::SmallVector LoadedModules;
   
 ReadModuleNames(Preprocessor ) : PP(PP) {}
   
 void ReadModuleName(StringRef ModuleName) override {
  -LoadedModules.push_back(PP.getIdentifierInfo(ModuleName));
  +// Keep the module name as a string for now. It's not safe to create a 
new
  +// IdentifierInfo from an ASTReader callback.
  +LoadedModules.push_back(ModuleName.str());
 }
   
 void registerAll() {
   ModuleMap  = PP.getHeaderSearchInfo().getModuleMap();
  -for (auto *II : LoadedModules)
  -  MM.cacheModuleLoad(*II, MM.findModule(II->getName()));
  +for (const std::string  : LoadedModules)
  +  MM.cacheModuleLoad(*PP.getIdentifierInfo(ModuleName),
  + MM.findModule(ModuleName));
   LoadedModules.clear();
 }
   
 void markAllUnavailable() {
  -for (auto *II : LoadedModules) {
  -  if (Module *M = PP.getHeaderSearchInfo().getModuleMap().findModule(
  -  II->getName())) {
  +for (const std::string  : LoadedModules) {
  +  if (Module *M =
  +  
PP.getHeaderSearchInfo().getModuleMap().findModule(ModuleName)) {
   M->HasIncompatibleModuleFile = true;
   
   // Mark module as available if the only reason it was unavailable


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf92db6d3fff1: [HIP] Relax conditions for address space cast 
in builtin args (authored by gandhi21299).

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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Add address space cast if target address spaces are different
+bool NeedImplicitASC = 
+  ParamAS != LangAS::Default &&   // Pointer params in generic AS 
don't need special handling.
+  ( ArgAS == LangAS::Default  ||  // We do allow implicit 
conversion from generic AS 
+  // or from specific AS which has 
target AS matching that of Param.
+  getASTContext().getTargetAddressSpace(ArgAS) == 
getASTContext().getTargetAddressSpace(ParamAS));
+if (!NeedImplicitASC)
   continue;
 
 // First, ensure that the Arg is an RValue.


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK:

[clang] f92db6d - [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via cfe-commits


Author: Anshil Gandhi
Date: 2021-10-15T15:35:52-06:00
New Revision: f92db6d3fff13bdacdf9b24660eb3f3158c58a17

URL: 
https://github.com/llvm/llvm-project/commit/f92db6d3fff13bdacdf9b24660eb3f3158c58a17
DIFF: 
https://github.com/llvm/llvm-project/commit/f92db6d3fff13bdacdf9b24660eb3f3158c58a17.diff

LOG: [HIP] Relax conditions for address space cast in builtin args

Allow (implicit) address space casting between LLVM-equivalent
target address spaces.

Reviewed By: yaxunl, tra

Differential Revision: https://reviews.llvm.org/D111734

Added: 
clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu

Modified: 
clang/lib/Sema/SemaExpr.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 94b44714b530d..472b15b9ea06b 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@ ExprResult Sema::BuildCallExpr(Scope *Scope, Expr *Fn, 
SourceLocation LParenLoc,
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Add address space cast if target address spaces are 
diff erent
+bool NeedImplicitASC = 
+  ParamAS != LangAS::Default &&   // Pointer params in generic AS 
don't need special handling.
+  ( ArgAS == LangAS::Default  ||  // We do allow implicit 
conversion from generic AS 
+  // or from specific AS which has 
target AS matching that of Param.
+  getASTContext().getTargetAddressSpace(ArgAS) == 
getASTContext().getTargetAddressSpace(ParamAS));
+if (!NeedImplicitASC)
   continue;
 
 // First, ensure that the Arg is an RValue.

diff  --git a/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu 
b/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
new file mode 100644
index 0..d15953b3cacaa
--- /dev/null
+++ b/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}

diff  --git a/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu 
b/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
new file mode 100644
index 0..6f1484c68ec71
--- /dev/null
+++ b/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}



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[PATCH] D111833: [clang] Fortify warning for scanf calls with field width too big.

2021-10-15 Thread Michael Benfield via Phabricator via cfe-commits

mbenfield added inline comments.



Comment at: clang/lib/Sema/SemaChecking.cpp:662
+if (Index < FD->getNumParams()) {
+  if (const auto *POS =
+  FD->getParamDecl(Index)->getAttr())

enh wrote:
> mbenfield wrote:
> > enh wrote:
> > > (stray tabs?)
> > Not sure what you're referring to. AFAICT there are no tabs in this file. 
> oh, gerrit uses the >> symbol to mean "tab". is this tool just saying 
> "indentation changed", not specifically "someone added a tab"?
Ah I see. Yes, I think that's correct, that it doesn't mean a tab here. 


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 updated this revision to Diff 380098.
gandhi21299 added a comment.

cleaned up code for readability


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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Add address space cast if target address spaces are different
+bool NeedImplicitASC = 
+  ParamAS != LangAS::Default &&   // Pointer params in generic AS 
don't need special handling.
+  ( ArgAS == LangAS::Default  ||  // We do allow implicit 
conversion from generic AS 
+  // or from specific AS which has 
target AS matching that of Param.
+  getASTContext().getTargetAddressSpace(ArgAS) == 
getASTContext().getTargetAddressSpace(ParamAS));
+if (!NeedImplicitASC)
   continue;
 
 // First, ensure that the Arg is an RValue.


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* %[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float**

[PATCH] D111543: [clang][modules] Stop creating `IdentifierInfo` for names of explicit modules

2021-10-15 Thread Richard Smith - zygoloid via Phabricator via cfe-commits

rsmith added a comment.

In D111543#3067619 , @rsmith wrote:

> In D111543#3066686 , @jansvoboda11 
> wrote:
>
>> My understanding is that `Preprocessor::getIdentifierInfo` may trigger AST 
>> deserialization. The problem here seems to be that we're calling 
>> `getIdentifierInfo` before the preprocessor's `IdentifierTable` is set up 
>> with "external identifier info lookup" (aka `ASTReader`). So the call to 
>> `IdentifierTable::get` creates new `IdentifierInfo` for `"Interface"` 
>> instead of looking it up in the AST. Further calls to `getIdentifierInfo` 
>> resolve to this new `IdentifierInfo` and the `ObjCInterfaceDecl` never gets 
>> deserialized.
>
> Interesting, that could explain what we're seeing. If that's it, then this is 
> an invalidation bug: changing the presence or behavior of the external 
> identifier resolver should trigger invalidation of all existing identifiers 
> so that we will properly query the external source.
>
> But I'm missing something from that explanation: the 
> `IdentifierTable::ExternalLookup` is set in the constructor and never changed 
> from that point onwards,

I was wrong about that. Not sure how I missed the setter :)

Nonetheless: `ASTReader::ReadAST` calls `ASTReader::ReadASTBlock`, which sets 
the `ASTReader` as the external identifier lookup source. Then, once the 
recursive deserialization is done, `ASTReader::ReadAST` marks any pre-existing 
identifiers as out-of-date.

Perhaps the problem is that the identifiers attached to these attributes are 
somehow being loaded from within `ReadASTBlock`, before they get invalidated? 
That'd explain what's going wrong. If that's right, then I think this patch 
would not fully fix the bug: you'd see the same thing if you loaded a module 
that used the identifier `Interface`, then triggered deserialization of that 
identifier so it was marked up-to-date, then loaded the problematic module from 
your testcase. The fix for that would be to ensure that `ReadASTBlock` doesn't 
deserialize these (or any) identifiers. But I don't see where `ReadASTBlock` is 
triggering a load of any identifiers either...

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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Artem Belevich via Phabricator via cfe-commits

tra added a comment.

In D111734#3067624 , @gandhi21299 
wrote:

> @tra I see, we sure can rewrite that segment for readability.

It could've been done with a follow-up clean-up commit. revert/reland works, 
too.  Thank you for following up on the comment, either way.


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[clang] 53fc510 - Revert "[HIP] Relax conditions for address space cast in builtin args"

2021-10-15 Thread Anshil Gandhi via cfe-commits


Author: Anshil Gandhi
Date: 2021-10-15T14:42:28-06:00
New Revision: 53fc5100e07ac078782ffb4e8e2b627c3cc8d046

URL: 
https://github.com/llvm/llvm-project/commit/53fc5100e07ac078782ffb4e8e2b627c3cc8d046
DIFF: 
https://github.com/llvm/llvm-project/commit/53fc5100e07ac078782ffb4e8e2b627c3cc8d046.diff

LOG: Revert "[HIP] Relax conditions for address space cast in builtin args"

This reverts commit 3b48e1170dc623a95ff13a1e34c839cc094bf321.

Added: 


Modified: 
clang/lib/Sema/SemaExpr.cpp

Removed: 
clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu



diff  --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index b3211db8df2dc..94b44714b530d 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -6545,11 +6545,9 @@ ExprResult Sema::BuildCallExpr(Scope *Scope, Expr *Fn, 
SourceLocation LParenLoc,
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Add address space cast if target address spaces are 
diff erent
-if ((ArgAS != LangAS::Default &&
- getASTContext().getTargetAddressSpace(ArgAS) !=
- getASTContext().getTargetAddressSpace(ParamAS)) ||
-ParamAS == LangAS::Default)
+// Only allow implicit casting from a non-default address space pointee
+// type to a default address space pointee type
+if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.

diff  --git a/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu 
b/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
deleted file mode 100644
index d15953b3cacaa..0
--- a/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
+++ /dev/null
@@ -1,20 +0,0 @@
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
-// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
-// RUN:  -o - | FileCheck %s
-
-#define __device__ __attribute__((device))
-typedef __attribute__((address_space(3))) float *LP;
-
-// CHECK-LABEL: test_ds_atomic_add_f32
-// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
-// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
-// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
-// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
-// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
-// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
-// CHECK: %4 = load float*, float** %rtn.ascast, align 8
-// CHECK: store float %3, float* %4, align 4
-__device__ void test_ds_atomic_add_f32(float *addr, float val) {
-  float *rtn;
-  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
-}

diff  --git a/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu 
b/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
deleted file mode 100644
index 6f1484c68ec71..0
--- a/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
-// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
-// RUN:  -fsyntax-only -verify
-// expected-no-diagnostics
-
-#define __device__ __attribute__((device))
-typedef __attribute__((address_space(3))) float *LP;
-
-__device__ void test_ds_atomic_add_f32(float *addr, float val) {
-  float *rtn;
-  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
-}



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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 added a comment.

@tra I see, we sure can rewrite that segment for readability.


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[PATCH] D111543: [clang][modules] Stop creating `IdentifierInfo` for names of explicit modules

2021-10-15 Thread Richard Smith - zygoloid via Phabricator via cfe-commits

rsmith added a comment.

In D111543#3066686 , @jansvoboda11 
wrote:

> My understanding is that `Preprocessor::getIdentifierInfo` may trigger AST 
> deserialization. The problem here seems to be that we're calling 
> `getIdentifierInfo` before the preprocessor's `IdentifierTable` is set up 
> with "external identifier info lookup" (aka `ASTReader`). So the call to 
> `IdentifierTable::get` creates new `IdentifierInfo` for `"Interface"` instead 
> of looking it up in the AST. Further calls to `getIdentifierInfo` resolve to 
> this new `IdentifierInfo` and the `ObjCInterfaceDecl` never gets deserialized.

Interesting, that could explain what we're seeing. If that's it, then this is 
an invalidation bug: changing the presence or behavior of the external 
identifier resolver should trigger invalidation of all existing identifiers so 
that we will properly query the external source.

But I'm missing something from that explanation: the 
`IdentifierTable::ExternalLookup` is set in the constructor and never changed 
from that point onwards, so I don't think it's the case that the external 
lookup hasn't been set yet at the point where we create the identifier. And 
`ASTReader::ReadAST` invalidates all existing identifiers when we load a new 
AST file (search for the calls to `setOutOfDate(true)`), so if the lookup 
results for `Interface` change we should invalidate the identifier properly. 
Given the kinds of entities affected by this, I wonder if there is something 
incorrect in the way that `ObjCInterfaceDecl`s are handled or some 
Objective-C-specific name lookup issue? (ObjC lookups certainly have some 
modules-specific bugs due to be implemented as raw `DeclContext::lookup` calls 
instead of using `Sema`'s name lookup mechanism, but I think that only applies 
to qualified lookups.)

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[PATCH] D111883: [Parse] Improve diagnostic and recoveryy when there is an extra override in the outline method definition.

2021-10-15 Thread Sam McCall via Phabricator via cfe-commits

sammccall accepted this revision.
sammccall added a comment.
This revision is now accepted and ready to land.

This seems very nice to me, I'd hit the bad diagnostic before but hadn't 
noticed the bad recovery.
AFAICT this can't break any valid code.

Comment at: clang/include/clang/Basic/DiagnosticParseKinds.td:948
+def err_virt_specifier_outside_class : Error<
+  "'%0' virt-specifier is not allowed outside a class definition">;
+

`virt-specifier` is standardese. I think dropping virt, i.e. `'override' 
specifier...` is clear enough.

Comment at: clang/include/clang/Basic/DiagnosticParseKinds.td:948
+def err_virt_specifier_outside_class : Error<
+  "'%0' virt-specifier is not allowed outside a class definition">;
+

sammccall wrote:
> `virt-specifier` is standardese. I think dropping virt, i.e. `'override' 
> specifier...` is clear enough.
Hm, is "outside a class definition" the clearest way to explain the mistake?

I guess this is handling two classes of problem:
- repeating `override` on an out-of-line definition (motivating case)
- placing `override` on a free function

I'd slightly prefer the motivating case to mention "out-of-line", but that 
wording doesn't fit the other case. I'm not sure whether it's worth trying to 
split them 

Comment at: clang/lib/Parse/ParseDecl.cpp:2039
 // start of a function definition in GCC-extended K C.
 if (!isDeclarationAfterDeclarator()) {

Do we too have to consider K?

```
typedef int override;
void foo(a) 
override a; 
{
}
```

I guess not because this behavior only fires for c++?

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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rG3b48e1170dc6: [HIP] Relax conditions for address space cast 
in builtin args (authored by gandhi21299).

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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,11 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Add address space cast if target address spaces are different
+if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* %[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to float

[clang] 3b48e11 - [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via cfe-commits


Author: Anshil Gandhi
Date: 2021-10-15T14:06:47-06:00
New Revision: 3b48e1170dc623a95ff13a1e34c839cc094bf321

URL: 
https://github.com/llvm/llvm-project/commit/3b48e1170dc623a95ff13a1e34c839cc094bf321
DIFF: 
https://github.com/llvm/llvm-project/commit/3b48e1170dc623a95ff13a1e34c839cc094bf321.diff

LOG: [HIP] Relax conditions for address space cast in builtin args

Allow (implicit) address space casting between LLVM-equivalent
target address spaces.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D111734

Added: 
clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu

Modified: 
clang/lib/Sema/SemaExpr.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 94b44714b530d..b3211db8df2dc 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,11 @@ ExprResult Sema::BuildCallExpr(Scope *Scope, Expr *Fn, 
SourceLocation LParenLoc,
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Add address space cast if target address spaces are 
diff erent
+if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.

diff  --git a/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu 
b/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
new file mode 100644
index 0..d15953b3cacaa
--- /dev/null
+++ b/clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}

diff  --git a/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu 
b/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
new file mode 100644
index 0..6f1484c68ec71
--- /dev/null
+++ b/clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}



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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Artem Belevich via Phabricator via cfe-commits

tra accepted this revision.
tra added a comment.

LGTM in general, modulo a readability suggestion.

Comment at: clang/lib/Sema/SemaExpr.cpp:6548-6550
+// Prevent addrspace cast if the parameter has a default address
+// space, or the argument has a non-default addrspace and the
+// target addrspaces of the argument and the parameter differ.

tra wrote:
> I'd rephrase it in terms of `add ASC if target AS is different`.
> 
> `Prevent` assumes that we've already decided to add an ASC, while it is not 
> the case. All we know is that we've got a pointer argument and we are 
> figuring out whether ASC is needed.
Hmm. I guess that does not quite match what we do here.
Oringal code would add ASC for generic->specific only.
The test cases you've addedd are for specific->specific AS, AFAICT, and that 
makes me wonder if I understand what's going on here.

So the test case currently does fail, because we end up w/o implicit ASC and 
end up trying to pass wrong types of pointers. https://godbolt.org/z/MaWMbGb5z

Now we actually want to allow implicit ASC for the pointer types that are in 
the *same* target AS, so my comment suggestion was actually wrong.

This confusion also suggests that the condition is hard to understand. Perhaps 
we can rewrite it.

E.g.
```
  bool NeedImplicitASC = 
ParamAS != LangAS::Default &&   // Pointers params in generic AS don't 
need special handling.
( ArgAs == LangAS::Default  || // We do allow implicit 
conversion from generic AS 
  // or from specific AS which has target AS matching that of Param.
  getASTContext().getTargetAddressSpace(ArgAS) == 
getASTContext().getTargetAddressSpace(ParamAS));
  if (!NeedImplicitASC)
 continue;
```

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[PATCH] D111476: [modules] Make a module map referenced by a system map a system one too.

2021-10-15 Thread Volodymyr Sapsai via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd0e7bdc20849: [modules] Make a module map referenced by a 
system map a system one too. (authored by vsapsai).

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Files:
  clang/lib/Lex/ModuleMap.cpp
  clang/test/Modules/fmodules-validate-once-per-build-session.c


Index: clang/test/Modules/fmodules-validate-once-per-build-session.c
===
--- clang/test/Modules/fmodules-validate-once-per-build-session.c
+++ clang/test/Modules/fmodules-validate-once-per-build-session.c
@@ -1,4 +1,5 @@
 #include "foo.h"
+#include "bar.h"
 
 // Clear the module cache.
 // RUN: rm -rf %t
@@ -9,51 +10,74 @@
 // Create a module.  We will use -I or -isystem to determine whether to treat
 // foo.h as a system header.
 // RUN: echo 'void meow(void);' > %t/Inputs/foo.h
+// RUN: echo 'void woof(void);' > %t/Inputs/bar.h
 // RUN: echo 'module Foo { header "foo.h" }' > %t/Inputs/module.map
+// RUN: echo 'extern module Bar "bar.modulemap"' >> %t/Inputs/module.map
+// RUN: echo 'module Bar { header "bar.h" }' > %t/Inputs/bar.modulemap
 
 // ===
 // Compile the module.
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache -fsyntax-only -isystem %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache-user -fsyntax-only -I %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: ls -R %t/modules-cache | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache | grep Bar.pcm.timestamp
 // RUN: ls -R %t/modules-cache-user | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache-user | grep Bar.pcm.timestamp
 // RUN: cp %t/modules-cache/Foo.pcm %t/modules-to-compare/Foo-before.pcm
+// RUN: cp %t/modules-cache/Bar.pcm %t/modules-to-compare/Bar-before.pcm
 // RUN: cp %t/modules-cache-user/Foo.pcm 
%t/modules-to-compare/Foo-before-user.pcm
+// RUN: cp %t/modules-cache-user/Bar.pcm 
%t/modules-to-compare/Bar-before-user.pcm
 
 // ===
 // Use it, and make sure that we did not recompile it.
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache -fsyntax-only -isystem %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache-user -fsyntax-only -I %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: ls -R %t/modules-cache | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache | grep Bar.pcm.timestamp
 // RUN: ls -R %t/modules-cache-user | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache-user | grep Bar.pcm.timestamp
 // RUN: cp %t/modules-cache/Foo.pcm %t/modules-to-compare/Foo-after.pcm
+// RUN: cp %t/modules-cache/Bar.pcm %t/modules-to-compare/Bar-after.pcm
 // RUN: cp %t/modules-cache-user/Foo.pcm 
%t/modules-to-compare/Foo-after-user.pcm
+// RUN: cp %t/modules-cache-user/Bar.pcm 
%t/modules-to-compare/Bar-after-user.pcm
 
 // RUN: diff %t/modules-to-compare/Foo-before.pcm 
%t/modules-to-compare/Foo-after.pcm
+// RUN: diff %t/modules-to-compare/Bar-before.pcm 
%t/modules-to-compare/Bar-after.pcm
 // RUN: diff %t/modules-to-compare/Foo-before-user.pcm 
%t/modules-to-compare/Foo-after-user.pcm
+// RUN: diff %t/modules-to-compare/Bar-before-user.pcm 
%t/modules-to-compare/Bar-after-user.pcm
 
 // ===
 // Change the sources.
 // RUN: echo 'void meow2(void);' > %t/Inputs/foo.h
+// RUN: echo 'module Bar { header "bar.h" export * }' > %t/Inputs/bar.modulemap
 
 // ===
-// Use the module, and make sure that we did not recompile it if foo.h is a
-// system header, even though the sources changed.
+// Use the module, and make sure that we did not recompile it if foo.h or
+// module.map are system files, even though the sources changed.
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache -fsyntax-only -isystem %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache-user -fsyntax-only -I %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: ls -R %t/modules-cache | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache | grep Bar.pcm.timestamp
 // RUN: ls -R %t/modules-cache-user | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache-user | grep Bar.pcm.timestamp
 // RUN: cp %t/modules-cache/Foo.pcm

[PATCH] D111476: [modules] Make a module map referenced by a system map a system one too.

2021-10-15 Thread Volodymyr Sapsai via Phabricator via cfe-commits

vsapsai added a comment.

Thanks for the review!


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[clang] d0e7bdc - [modules] Make a module map referenced by a system map a system one too.

2021-10-15 Thread Volodymyr Sapsai via cfe-commits


Author: Volodymyr Sapsai
Date: 2021-10-15T12:46:51-07:00
New Revision: d0e7bdc208491fd5d4245878c1ec2962694e2baa

URL: 
https://github.com/llvm/llvm-project/commit/d0e7bdc208491fd5d4245878c1ec2962694e2baa
DIFF: 
https://github.com/llvm/llvm-project/commit/d0e7bdc208491fd5d4245878c1ec2962694e2baa.diff

LOG: [modules] Make a module map referenced by a system map a system one too.

Mimic the behavior of including headers where a system includer makes an
includee a system header too.

rdar://84049469

Differential Revision: https://reviews.llvm.org/D111476

Added: 


Modified: 
clang/lib/Lex/ModuleMap.cpp
clang/test/Modules/fmodules-validate-once-per-build-session.c

Removed: 




diff  --git a/clang/lib/Lex/ModuleMap.cpp b/clang/lib/Lex/ModuleMap.cpp
index 53b824baba58b..08381d0422058 100644
--- a/clang/lib/Lex/ModuleMap.cpp
+++ b/clang/lib/Lex/ModuleMap.cpp
@@ -2173,7 +2173,7 @@ void ModuleMapParser::parseExternModuleDecl() {
   }
   if (auto File = SourceMgr.getFileManager().getFile(FileNameRef))
 Map.parseModuleMapFile(
-*File, /*IsSystem=*/false,
+*File, IsSystem,
 Map.HeaderInfo.getHeaderSearchOpts().ModuleMapFileHomeIsCwd
 ? Directory
 : (*File)->getDir(),

diff  --git a/clang/test/Modules/fmodules-validate-once-per-build-session.c 
b/clang/test/Modules/fmodules-validate-once-per-build-session.c
index 840545bb59fc9..0c97342a8d70a 100644
--- a/clang/test/Modules/fmodules-validate-once-per-build-session.c
+++ b/clang/test/Modules/fmodules-validate-once-per-build-session.c
@@ -1,4 +1,5 @@
 #include "foo.h"
+#include "bar.h"
 
 // Clear the module cache.
 // RUN: rm -rf %t
@@ -9,51 +10,74 @@
 // Create a module.  We will use -I or -isystem to determine whether to treat
 // foo.h as a system header.
 // RUN: echo 'void meow(void);' > %t/Inputs/foo.h
+// RUN: echo 'void woof(void);' > %t/Inputs/bar.h
 // RUN: echo 'module Foo { header "foo.h" }' > %t/Inputs/module.map
+// RUN: echo 'extern module Bar "bar.modulemap"' >> %t/Inputs/module.map
+// RUN: echo 'module Bar { header "bar.h" }' > %t/Inputs/bar.modulemap
 
 // ===
 // Compile the module.
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache -fsyntax-only -isystem %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache-user -fsyntax-only -I %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: ls -R %t/modules-cache | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache | grep Bar.pcm.timestamp
 // RUN: ls -R %t/modules-cache-user | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache-user | grep Bar.pcm.timestamp
 // RUN: cp %t/modules-cache/Foo.pcm %t/modules-to-compare/Foo-before.pcm
+// RUN: cp %t/modules-cache/Bar.pcm %t/modules-to-compare/Bar-before.pcm
 // RUN: cp %t/modules-cache-user/Foo.pcm 
%t/modules-to-compare/Foo-before-user.pcm
+// RUN: cp %t/modules-cache-user/Bar.pcm 
%t/modules-to-compare/Bar-before-user.pcm
 
 // ===
 // Use it, and make sure that we did not recompile it.
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache -fsyntax-only -isystem %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: %clang_cc1 -cc1 -fmodules -fimplicit-module-maps -fdisable-module-hash 
-fmodules-cache-path=%t/modules-cache-user -fsyntax-only -I %t/Inputs 
-fbuild-session-timestamp=139000 -fmodules-validate-once-per-build-session 
%s
 // RUN: ls -R %t/modules-cache | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache | grep Bar.pcm.timestamp
 // RUN: ls -R %t/modules-cache-user | grep Foo.pcm.timestamp
+// RUN: ls -R %t/modules-cache-user | grep Bar.pcm.timestamp
 // RUN: cp %t/modules-cache/Foo.pcm %t/modules-to-compare/Foo-after.pcm
+// RUN: cp %t/modules-cache/Bar.pcm %t/modules-to-compare/Bar-after.pcm
 // RUN: cp %t/modules-cache-user/Foo.pcm 
%t/modules-to-compare/Foo-after-user.pcm
+// RUN: cp %t/modules-cache-user/Bar.pcm 
%t/modules-to-compare/Bar-after-user.pcm
 
 // RUN: 
diff  %t/modules-to-compare/Foo-before.pcm %t/modules-to-compare/Foo-after.pcm
+// RUN: 
diff  %t/modules-to-compare/Bar-before.pcm %t/modules-to-compare/Bar-after.pcm
 // RUN: 
diff  %t/modules-to-compare/Foo-before-user.pcm 
%t/modules-to-compare/Foo-after-user.pcm
+// RUN: 
diff  %t/modules-to-compare/Bar-before-user.pcm 
%t/modules-to-compare/Bar-after-user.pcm
 
 // ===
 // Change the sources.
 // RUN: echo 'void meow2(void);' > %t/Inputs/foo.h
+// RUN: echo 'module Bar { header "bar.h" export * }' > %t/Inputs/bar.modulemap
 
 // ===
-// Use the module, and make sure that we did not recompile it if foo.h is a
-// system header,

[PATCH] D109707: [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-15 Thread Yaxun Liu via Phabricator via cfe-commits

yaxunl added a comment.

@gandhi21299 you may need to add "-target x86_64-unknown-linux-gnu" to your 
codegen test to avoid issue with Darwin toolchain.


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 added a comment.

Thanks for the review!


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Yaxun Liu via Phabricator via cfe-commits

yaxunl accepted this revision.
yaxunl added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks.


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[PATCH] D111639: [Sema] check PseudoObject when rebuilding CXXOperatorCallExpr in template instantiation

2021-10-15 Thread Reid Kleckner via Phabricator via cfe-commits

rnk added a subscriber: rjmccall.
rnk added a comment.

So, after reading through Build(Unary|Bin)Op, I think the duplication of logic 
between TreeTransform is intentional, and the better fix is to generalize the 
existing logic for placeholder handling. If you enter into the Build*Op 
codepaths, you will re-run a lot of redundant checks. Maybe +@rjmccall can 
provide a second opinion.




Comment at: clang/lib/Sema/TreeTransform.h:14572
 
   if (First->getObjectKind() == OK_ObjCProperty) {
 BinaryOperatorKind Opc = BinaryOperator::getOverloadedOpcode(Op);

I notice that ObjC pseudo objects are handled here. Is there a way to unify 
things? Can this code be removed if we route builtin operators over to 
`Sema::Build(Bin|Unary)Op`?



Comment at: clang/lib/Sema/TreeTransform.h:14583
 
   if (Second && Second->getObjectKind() == OK_ObjCProperty) {
 ExprResult Result = SemaRef.CheckPlaceholderExpr(Second);

This is also pseudo object handling code


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[PATCH] D109707: [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-15 Thread Nico Weber via Phabricator via cfe-commits

thakis added a comment.

This breaks tests on Mac: http://45.33.8.238/mac/37119/step_7.txt

Please take a look and revert for now if it takes a while to fix.


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[PATCH] D110614: [clang-tidy] Fix false positives in cppcoreguidelines-virtual-class-destructor

2021-10-15 Thread Aaron Ballman via Phabricator via cfe-commits

aaron.ballman added a comment.

In D110614#3067303 , @carlosgalvezp 
wrote:

> Thanks!! I'll wait for tomorrow morning (~8 PM here) to merge, to give some 
> last minute opportunity for comments. Is this what I should monitor after 
> merge to make sure nothing breaks?
> https://lab.llvm.org/buildbot/#/console

SGTM! And yes, you'd monitor that (though I tend to use 
https://lab.llvm.org/buildbot/#/builders myself because the view works better 
for me personally).


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[PATCH] D106674: Runtime for Interop directive

2021-10-15 Thread Sri Hari Krishna Narayanan via Phabricator via cfe-commits

sriharikrishna marked an inline comment as not done.
sriharikrishna added inline comments.



Comment at: openmp/libomptarget/src/interop.cpp:198-201
+  if (interop_type == kmp_interop_type_tasksync) {
+__kmpc_omp_wait_deps(loc_ref, gtid, ndeps, dep_list, ndeps_noalias,
+ noalias_dep_list);
+  }

RaviNarayanaswamy wrote:
> jdoerfert wrote:
> > RaviNarayanaswamy wrote:
> > > jdoerfert wrote:
> > > > RaviNarayanaswamy wrote:
> > > > > jdoerfert wrote:
> > > > > > RaviNarayanaswamy wrote:
> > > > > > > Interop object does not wait for any task from libomp.  
> > > > > > > Init just initializes the interop object.
> > > > > > > The initialization of interop object should  be done by the 
> > > > > > > plugin as only the plugin knows what properties are supported
> > > > > > > Interop object does not wait for any task from libomp. 
> > > > > > 
> > > > > > I don't know why you think we would not wait for libomp tasks. If 
> > > > > > we have dependences we need to wait for them.
> > > > > > 
> > > > > > > The initialization of interop object should be done by the plugin 
> > > > > > > as only the plugin knows what properties are supported.
> > > > > > 
> > > > > > It is, below. This is the generic part that then redirects to the 
> > > > > > plugin.
> > > > > Libomp would have not invoked the task which calls this routine if 
> > > > > there are dependences.   They must be executed before the task 
> > > > > containing  the interop creation is scheduled.
> > > > > 
> > > > > The interop_type should be passed to plugin and let it initialize the 
> > > > > common for all interop-types and then add based on the interop_type 
> > > > > Libomp would have not invoked the task which calls this routine if 
> > > > > there are dependences. They must be executed before the task 
> > > > > containing the interop creation is scheduled.
> > > > 
> > > > To me it seems you are assuming that we create a task in which this 
> > > > routine is called. We do not, as far as I can tell. See D105876.
> > > > 
> > > > > The interop_type should be passed to plugin and let it initialize the 
> > > > > common for all interop-types and then add based on the interop_type
> > > > 
> > > > So what you are trying to say is that `init_device_info` should take 
> > > > the `interop_type` too? That makes sense to me. But as discussed in 
> > > > other reviews recently, we should not extend the API for "future use 
> > > > cases" but extend it as use cases become relevant. For now it seems we 
> > > > can simply set up the `tgt_device_info` part of the `omp_interop_val_t` 
> > > > without knowing the `interop_type`.
> > > Then need to change this code since the interop_type  can be both 
> > > target_sync and  target which will not be handled correctly.  target_sync 
> > > and target have common initialization + additional  property base don the 
> > > interop_type requested
> > > Then need to change this code since the interop_type can be both 
> > > target_sync and target which will not be handled correctly. target_sync 
> > > and target have common initialization + additional property base don the 
> > > interop_type requested
> > 
> > Could you please elaborate what needs to be changed exactly. What 
> > information is currently not available in the setup as is? What properties 
> > would be different?
> Should be something like this
> 
> // NEED to add _kmp_interop_type_target  to represent interop target
> //  interop_ptr->device_info would initialize the following: device handle, 
> device_context, platform.
> if (interop_type == kmp_interop_type_target) { 
>  if (!Device.RTL || !Device.RTL->init_device_info ||
> Device.RTL->init_device_info(device_id, &(interop_ptr)->device_info,
>  &(interop_ptr)->err_str)) {
>   delete interop_ptr;
>   interop_ptr = omp_interop_none;
>  }
> // Add target sync if  request.
> if (interop_type == kmp_interop_type_tasksync) {
> if (!Device.RTL || !Device.RTL->init_async_info ||
> Device.RTL->init_async_info(device_id, &(interop_ptr)->async_info)) {
>   delete interop_ptr;
>   interop_ptr = omp_interop_none;
>   }
> 
> 
> 
It looks like the code you have written for kmp_interop_type_target already 
exists in the else part. So I am still puzzled about this. 


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 updated this revision to Diff 380067.
gandhi21299 marked 3 inline comments as done.
gandhi21299 added a comment.

corrected sema test, as requested


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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,11 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Add address space cast if target address spaces are different
+if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -fsyntax-only -verify
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* %[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to float addrspace(3)*
+// CHECK: %3 = call

[PATCH] D110614: [clang-tidy] Fix false positives in cppcoreguidelines-virtual-class-destructor

2021-10-15 Thread Carlos Galvez via Phabricator via cfe-commits

carlosgalvezp added a comment.

Thanks!! I'll wait for tomorrow morning (~8 PM here) to merge, to give some 
last minute opportunity for comments. Is this what I should monitor after merge 
to make sure nothing breaks?
https://lab.llvm.org/buildbot/#/console


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Artem Belevich via Phabricator via cfe-commits

tra added inline comments.



Comment at: clang/lib/Sema/SemaExpr.cpp:6548-6550
+// Prevent addrspace cast if the parameter has a default address
+// space, or the argument has a non-default addrspace and the
+// target addrspaces of the argument and the parameter differ.

I'd rephrase it in terms of `add ASC if target AS is different`.

`Prevent` assumes that we've already decided to add an ASC, while it is not the 
case. All we know is that we've got a pointer argument and we are figuring out 
whether ASC is needed.



Comment at: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu:3
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+

You do not want to produce any output. I think `-fsyntax-only -verify` along 
with `// expected-no-diagnostics` should do the trick. 



Comment at: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu:8
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {

Not needed w/o FileCheck.


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[PATCH] D109707: [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rG03375a3fb33b: [HIP] [AlwaysInliner] Disable AlwaysInliner to 
eliminate undefined symbols (authored by gandhi21299).

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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
  llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
  llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
  llvm/test/CodeGen/AMDGPU/inline-calls.ll

Index: llvm/test/CodeGen/AMDGPU/inline-calls.ll
===
--- llvm/test/CodeGen/AMDGPU/inline-calls.ll
+++ llvm/test/CodeGen/AMDGPU/inline-calls.ll
@@ -1,6 +1,6 @@
-; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck  %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck  %s
-; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple amdgcn-unknown-linux-gnu -mcpu=tahiti -verify-machineinstrs < %s | FileCheck  %s
+; RUN: llc -mtriple amdgcn-unknown-linux-gnu -mcpu=tonga -verify-machineinstrs < %s | FileCheck  %s
+; RUN: llc -mtriple r600-unknown-linux-gnu -mcpu=redwood -verify-machineinstrs < %s | FileCheck %s --check-prefix=R600
 
 ; ALL-NOT: {{^}}func:
 define internal i32 @func(i32 %a) {
@@ -9,7 +9,7 @@
   ret i32 %tmp0
 }
 
-; ALL: {{^}}kernel:
+; CHECK: {{^}}kernel:
 ; GCN-NOT: s_swappc_b64
 define amdgpu_kernel void @kernel(i32 addrspace(1)* %out) {
 entry:
@@ -18,12 +18,13 @@
   ret void
 }
 
-; CHECK-NOT: func_alias
-; ALL-NOT: func_alias
+; CHECK: func_alias
+; R600-NOT: func_alias
 @func_alias = alias i32 (i32), i32 (i32)* @func
 
-; ALL: {{^}}kernel3:
+; CHECK-NOT: {{^}}kernel3:
 ; GCN-NOT: s_swappc_b64
+; R600: {{^}}kernel3:
 define amdgpu_kernel void @kernel3(i32 addrspace(1)* %out) {
 entry:
   %tmp0 = call i32 @func_alias(i32 1)
Index: llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
===
--- llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
@@ -29,6 +29,8 @@
 #include "SIMachineFunctionInfo.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/GlobalAlias.h"
+#include "llvm/IR/GlobalValue.h"
 #include "llvm/Target/TargetMachine.h"
 
 using namespace llvm;
@@ -61,7 +63,8 @@
 assert(Op.getImm() == 0);
 return nullptr;
   }
-
+  if (auto *GA = dyn_cast(Op.getGlobal()))
+return cast(GA->getOperand(0));
   return cast(Op.getGlobal());
 }
 
Index: llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
===
--- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
@@ -15,6 +15,7 @@
 #include "AMDGPU.h"
 #include "AMDGPUTargetMachine.h"
 #include "Utils/AMDGPUBaseInfo.h"
+#include "llvm/CodeGen/CommandFlags.h"
 #include "llvm/IR/Module.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/CommandLine.h"
@@ -90,9 +91,13 @@
 
   SmallPtrSet FuncsToAlwaysInline;
   SmallPtrSet FuncsToNoInline;
+  Triple TT(M.getTargetTriple());
 
   for (GlobalAlias  : M.aliases()) {
 if (Function* F = dyn_cast(A.getAliasee())) {
+  if (TT.getArch() == Triple::amdgcn &&
+  A.getLinkage() != GlobalValue::InternalLinkage)
+continue;
   A.replaceAllUsesWith(F);
   AliasesToRemove.push_back();
 }
Index: clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
@@ -0,0 +1,17 @@
+// REQUIRES: amdgpu-registered-target, clang-driver
+
+// RUN: %clang --offload-arch=gfx906 --cuda-device-only -nogpulib -nogpuinc -x hip -emit-llvm -S -o - %s \
+// RUN:   -fgpu-rdc -O3 -mllvm -amdgpu-early-inline-all=true -mllvm -amdgpu-function-calls=false | \
+// RUN:   FileCheck %s
+
+#include "Inputs/cuda.h"
+
+// CHECK: %struct.B = type { i8 }
+struct B {
+
+  // CHECK: @_ZN1BC1Ei = hidden unnamed_addr alias void (%struct.B*, i32), void (%struct.B*, i32)* @_ZN1BC2Ei
+  __device__ B(int x);
+};
+
+__device__ B::B(int x) {
+}
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -5089,9 +5089,9 @@
   }
 
   // Enable -mconstructor-aliases except on darwin, where we have to work around
-  // a linker bug (see ), and CUDA/AMDGPU device code,
-  // where aliases aren't supported.
-  if (!RawTriple.isOSDarwin() && !RawTriple.isNVPTX() && !RawTriple.isAMDGPU())
+  // a linker bug (see ), and CUDA device code, where
+  // aliases aren't supported.
+  if (!RawTriple.isOSDarwin() && !RawTriple.isNVPTX())

[clang] 03375a3 - [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-15 Thread Anshil Gandhi via cfe-commits


Author: Anshil Gandhi
Date: 2021-10-15T11:39:15-06:00
New Revision: 03375a3fb33b11e1249d9c88070b7f33cb97802a

URL: 
https://github.com/llvm/llvm-project/commit/03375a3fb33b11e1249d9c88070b7f33cb97802a
DIFF: 
https://github.com/llvm/llvm-project/commit/03375a3fb33b11e1249d9c88070b7f33cb97802a.diff

LOG: [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

By default clang emits complete contructors as alias of base constructors if 
they are the same.
The backend is supposed to emit symbols for the alias, otherwise it causes 
undefined symbols.
@yaxunl observed that this issue is related to the llvm options 
`-amdgpu-early-inline-all=true`
and `-amdgpu-function-calls=false`. This issue is resolved by only inlining 
global values
with internal linkage. The `getCalleeFunction()` in AMDGPUResourceUsageAnalysis 
also had
to be extended to support aliases to functions. inline-calls.ll was corrected 
appropriately.

Reviewed By: yaxunl, #amdgpu

Differential Revision: https://reviews.llvm.org/D109707

Added: 
clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu

Modified: 
clang/lib/Driver/ToolChains/Clang.cpp
llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
llvm/test/CodeGen/AMDGPU/inline-calls.ll

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index 83afbc3952d84..316c6026adf5c 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -5089,9 +5089,9 @@ void Clang::ConstructJob(Compilation , const JobAction 
,
   }
 
   // Enable -mconstructor-aliases except on darwin, where we have to work 
around
-  // a linker bug (see ), and CUDA/AMDGPU device code,
-  // where aliases aren't supported.
-  if (!RawTriple.isOSDarwin() && !RawTriple.isNVPTX() && !RawTriple.isAMDGPU())
+  // a linker bug (see ), and CUDA device code, where
+  // aliases aren't supported.
+  if (!RawTriple.isOSDarwin() && !RawTriple.isNVPTX())
 CmdArgs.push_back("-mconstructor-aliases");
 
   // Darwin's kernel doesn't support guard variables; just die if we

diff  --git a/clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu 
b/clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
new file mode 100644
index 0..f75088f8e1415
--- /dev/null
+++ b/clang/test/CodeGenCUDA/amdgpu-alias-undef-symbols.cu
@@ -0,0 +1,17 @@
+// REQUIRES: amdgpu-registered-target, clang-driver
+
+// RUN: %clang --offload-arch=gfx906 --cuda-device-only -nogpulib -nogpuinc -x 
hip -emit-llvm -S -o - %s \
+// RUN:   -fgpu-rdc -O3 -mllvm -amdgpu-early-inline-all=true -mllvm 
-amdgpu-function-calls=false | \
+// RUN:   FileCheck %s
+
+#include "Inputs/cuda.h"
+
+// CHECK: %struct.B = type { i8 }
+struct B {
+
+  // CHECK: @_ZN1BC1Ei = hidden unnamed_addr alias void (%struct.B*, i32), 
void (%struct.B*, i32)* @_ZN1BC2Ei
+  __device__ B(int x);
+};
+
+__device__ B::B(int x) {
+}

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
index 7ff24d1e9c62b..2e24e9f929d2a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
@@ -15,6 +15,7 @@
 #include "AMDGPU.h"
 #include "AMDGPUTargetMachine.h"
 #include "Utils/AMDGPUBaseInfo.h"
+#include "llvm/CodeGen/CommandFlags.h"
 #include "llvm/IR/Module.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/CommandLine.h"
@@ -90,9 +91,13 @@ static bool alwaysInlineImpl(Module , bool GlobalOpt) {
 
   SmallPtrSet FuncsToAlwaysInline;
   SmallPtrSet FuncsToNoInline;
+  Triple TT(M.getTargetTriple());
 
   for (GlobalAlias  : M.aliases()) {
 if (Function* F = dyn_cast(A.getAliasee())) {
+  if (TT.getArch() == Triple::amdgcn &&
+  A.getLinkage() != GlobalValue::InternalLinkage)
+continue;
   A.replaceAllUsesWith(F);
   AliasesToRemove.push_back();
 }

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
index e841e939ef34b..3c5cb6e190850 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
@@ -29,6 +29,8 @@
 #include "SIMachineFunctionInfo.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/GlobalAlias.h"
+#include "llvm/IR/GlobalValue.h"
 #include "llvm/Target/TargetMachine.h"
 
 using namespace llvm;
@@ -61,7 +63,8 @@ static const Function *getCalleeFunction(const MachineOperand 
) {
 assert(Op.getImm() == 0);
 return nullptr;
   }
-
+  if (auto *GA = dyn_cast(Op.getGlobal()))
+return cast(GA->getOperand(0));
   return cast(Op.getGlobal());
 }
 

diff  --git a/llvm/test/CodeGen/AMDGPU/inline-calls.ll 
b/llvm/test/CodeGen/AMDGPU/inline-calls.ll
index 233485a202057..134cd301b9743 100644

[PATCH] D108453: [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default (2)

2021-10-15 Thread Evgenii Stepanov via Phabricator via cfe-commits

eugenis accepted this revision.
eugenis added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D111270: [clang] Pass -clear-ast-before-backend in Clang::ConstructJob()

2021-10-15 Thread Arthur Eubanks via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG47eb99aa44ab: [clang] Pass -clear-ast-before-backend in 
Clang::ConstructJob() (authored by aeubanks).

Repository:
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CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D111270

Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Interpreter/Interpreter.cpp


Index: clang/lib/Interpreter/Interpreter.cpp
===
--- clang/lib/Interpreter/Interpreter.cpp
+++ clang/lib/Interpreter/Interpreter.cpp
@@ -113,6 +113,10 @@
 
   Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts());
 
+  // Don't clear the AST before backend codegen since we do codegen multiple
+  // times, reusing the same AST.
+  Clang->getCodeGenOpts().ClearASTBeforeBackend = false;
+
   return std::move(Clang);
 }
 
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4660,6 +4660,7 @@
   // cleanup.
   if (!C.isForDiagnostics())
 CmdArgs.push_back("-disable-free");
+  CmdArgs.push_back("-clear-ast-before-backend");
 
 #ifdef NDEBUG
   const bool IsAssertBuild = false;


Index: clang/lib/Interpreter/Interpreter.cpp
===
--- clang/lib/Interpreter/Interpreter.cpp
+++ clang/lib/Interpreter/Interpreter.cpp
@@ -113,6 +113,10 @@
 
   Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts());
 
+  // Don't clear the AST before backend codegen since we do codegen multiple
+  // times, reusing the same AST.
+  Clang->getCodeGenOpts().ClearASTBeforeBackend = false;
+
   return std::move(Clang);
 }
 
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4660,6 +4660,7 @@
   // cleanup.
   if (!C.isForDiagnostics())
 CmdArgs.push_back("-disable-free");
+  CmdArgs.push_back("-clear-ast-before-backend");
 
 #ifdef NDEBUG
   const bool IsAssertBuild = false;
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[clang] 47eb99a - [clang] Pass -clear-ast-before-backend in Clang::ConstructJob()

2021-10-15 Thread Arthur Eubanks via cfe-commits


Author: Arthur Eubanks
Date: 2021-10-15T10:13:17-07:00
New Revision: 47eb99aa44ab1d20327d67a49d6c47163de76387

URL: 
https://github.com/llvm/llvm-project/commit/47eb99aa44ab1d20327d67a49d6c47163de76387
DIFF: 
https://github.com/llvm/llvm-project/commit/47eb99aa44ab1d20327d67a49d6c47163de76387.diff

LOG: [clang] Pass -clear-ast-before-backend in Clang::ConstructJob()

This clears the memory used for the Clang AST before we run LLVM passes.

https://llvm-compile-time-tracker.com/compare.php?from=d0a5f61c4f6fccec87fd5207e3fcd9502dd59854=b7437fee79e04464dd968e1a29185495f3590481=max-rss
shows significant memory savings with no slowdown (in fact -O0 slightly speeds 
up).

For more background, see
https://lists.llvm.org/pipermail/cfe-dev/2021-September/068930.html.

Turn this off for the interpreter since it does codegen multiple times.

Differential Revision: https://reviews.llvm.org/D111270

Added: 


Modified: 
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Interpreter/Interpreter.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index d2c08412d5932..83afbc3952d84 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -4660,6 +4660,7 @@ void Clang::ConstructJob(Compilation , const JobAction 
,
   // cleanup.
   if (!C.isForDiagnostics())
 CmdArgs.push_back("-disable-free");
+  CmdArgs.push_back("-clear-ast-before-backend");
 
 #ifdef NDEBUG
   const bool IsAssertBuild = false;

diff  --git a/clang/lib/Interpreter/Interpreter.cpp 
b/clang/lib/Interpreter/Interpreter.cpp
index 02b3025297b67..d14940d2e1321 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -113,6 +113,10 @@ CreateCI(const llvm::opt::ArgStringList ) {
 
   Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts());
 
+  // Don't clear the AST before backend codegen since we do codegen multiple
+  // times, reusing the same AST.
+  Clang->getCodeGenOpts().ClearASTBeforeBackend = false;
+
   return std::move(Clang);
 }
 



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[clang] 6a154e6 - [clang] Use llvm::is_contained (NFC)

2021-10-15 Thread Kazu Hirata via cfe-commits


Author: Kazu Hirata
Date: 2021-10-15T10:07:08-07:00
New Revision: 6a154e606e570870789b047a10c21642dce2fdd3

URL: 
https://github.com/llvm/llvm-project/commit/6a154e606e570870789b047a10c21642dce2fdd3
DIFF: 
https://github.com/llvm/llvm-project/commit/6a154e606e570870789b047a10c21642dce2fdd3.diff

LOG: [clang] Use llvm::is_contained (NFC)

Added: 


Modified: 
clang/include/clang/ASTMatchers/ASTMatchersInternal.h
clang/lib/CodeGen/CGOpenMPRuntime.cpp
clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp

Removed: 




diff  --git a/clang/include/clang/ASTMatchers/ASTMatchersInternal.h 
b/clang/include/clang/ASTMatchers/ASTMatchersInternal.h
index 488f9d80d604d..1a4137cb3628f 100644
--- a/clang/include/clang/ASTMatchers/ASTMatchersInternal.h
+++ b/clang/include/clang/ASTMatchers/ASTMatchersInternal.h
@@ -2249,11 +2249,7 @@ class HasAnyOperatorNameMatcher : public 
SingleNodeMatcherInterface {
 
   bool matchesNode(const T ) const override {
 Optional OptOpName = getOpName(Node);
-if (!OptOpName)
-  return false;
-return llvm::any_of(Names, [OpName = *OptOpName](const std::string ) {
-  return Name == OpName;
-});
+return OptOpName && llvm::is_contained(Names, *OptOpName);
   }
 
 private:

diff  --git a/clang/lib/CodeGen/CGOpenMPRuntime.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
index ce9262704312f..399bfdbd33a54 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntime.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
@@ -8580,10 +8580,8 @@ class MappableExprsHandler {
   if (!C)
 continue;
   MapKind Kind = Other;
-  if (!C->getMapTypeModifiers().empty() &&
-  llvm::any_of(C->getMapTypeModifiers(), [](OpenMPMapModifierKind K) {
-return K == OMPC_MAP_MODIFIER_present;
-  }))
+  if (llvm::is_contained(C->getMapTypeModifiers(),
+ OMPC_MAP_MODIFIER_present))
 Kind = Present;
   else if (C->getMapType() == OMPC_MAP_alloc)
 Kind = Allocs;
@@ -8602,10 +8600,8 @@ class MappableExprsHandler {
   if (!C)
 continue;
   MapKind Kind = Other;
-  if (!C->getMotionModifiers().empty() &&
-  llvm::any_of(C->getMotionModifiers(), [](OpenMPMotionModifierKind K) 
{
-return K == OMPC_MOTION_MODIFIER_present;
-  }))
+  if (llvm::is_contained(C->getMotionModifiers(),
+ OMPC_MOTION_MODIFIER_present))
 Kind = Present;
   const auto *EI = C->getVarRefs().begin();
   for (const auto L : C->component_lists()) {
@@ -8620,10 +8616,8 @@ class MappableExprsHandler {
   if (!C)
 continue;
   MapKind Kind = Other;
-  if (!C->getMotionModifiers().empty() &&
-  llvm::any_of(C->getMotionModifiers(), [](OpenMPMotionModifierKind K) 
{
-return K == OMPC_MOTION_MODIFIER_present;
-  }))
+  if (llvm::is_contained(C->getMotionModifiers(),
+ OMPC_MOTION_MODIFIER_present))
 Kind = Present;
   const auto *EI = C->getVarRefs().begin();
   for (const auto L : C->component_lists()) {
@@ -9191,18 +9185,13 @@ class MappableExprsHandler {
  const MapData ) {
   ArrayRef MapModifiers = std::get<2>(LHS);
   OpenMPMapClauseKind MapType = std::get<1>(RHS);
-  bool HasPresent = !MapModifiers.empty() &&
-llvm::any_of(MapModifiers, [](OpenMPMapModifierKind K) 
{
-  return K == clang::OMPC_MAP_MODIFIER_present;
-});
+  bool HasPresent =
+  llvm::is_contained(MapModifiers, clang::OMPC_MAP_MODIFIER_present);
   bool HasAllocs = MapType == OMPC_MAP_alloc;
   MapModifiers = std::get<2>(RHS);
   MapType = std::get<1>(LHS);
   bool HasPresentR =
-  !MapModifiers.empty() &&
-  llvm::any_of(MapModifiers, [](OpenMPMapModifierKind K) {
-return K == clang::OMPC_MAP_MODIFIER_present;
-  });
+  llvm::is_contained(MapModifiers, clang::OMPC_MAP_MODIFIER_present);
   bool HasAllocsR = MapType == OMPC_MAP_alloc;
   return (HasPresent && !HasPresentR) || (HasAllocs && !HasAllocsR);
 });

diff  --git a/clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp 
b/clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
index 09e885e8133fe..190bb4c165806 100644
--- a/clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
@@ -102,12 +102,8 @@ static bool hasStdClassWithName(const CXXRecordDecl *RD,
 ArrayRef Names) {
   if (!RD || !RD->getDeclContext()->isStdNamespace())
 return false;
-  if (RD->getDeclName().isIdentifier()) {
-StringRef Name = RD->getName();
-return llvm::any_of(Names, [](StringRef GivenName) -> bool {
-  return Name == GivenName;
-});
-  }
+  if

[PATCH] D111199: [Clang][LLVM][Attr] support btf_type_tag attribute

2021-10-15 Thread Yonghong Song via Phabricator via cfe-commits

yonghong-song updated this revision to Diff 380049.
yonghong-song added a subscriber: urnathan.
yonghong-song added a comment.

- fix a few clang-format issues.


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Files:
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/AST/PropertiesBase.td
  clang/include/clang/AST/RecursiveASTVisitor.h
  clang/include/clang/AST/Type.h
  clang/include/clang/AST/TypeLoc.h
  clang/include/clang/AST/TypeProperties.td
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/TypeNodes.td
  clang/include/clang/Serialization/ASTRecordWriter.h
  clang/include/clang/Serialization/TypeBitCodes.def
  clang/lib/AST/ASTContext.cpp
  clang/lib/AST/ASTStructuralEquivalence.cpp
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/AST/TypeLoc.cpp
  clang/lib/AST/TypePrinter.cpp
  clang/lib/CodeGen/CGDebugInfo.cpp
  clang/lib/CodeGen/CodeGenFunction.cpp
  clang/lib/Sema/SemaExpr.cpp
  clang/lib/Sema/SemaType.cpp
  clang/lib/Sema/TreeTransform.h
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/CodeGen/attr-btf_type_tag-conv-var.c
  clang/test/CodeGen/attr-btf_type_tag-typedef-field.c
  clang/test/Sema/attr-btf_type_tag.c
  clang/tools/libclang/CIndex.cpp
  llvm/include/llvm/IR/DIBuilder.h
  llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
  llvm/lib/IR/DIBuilder.cpp
  llvm/test/DebugInfo/attr-btf_type_tag.ll

Index: llvm/test/DebugInfo/attr-btf_type_tag.ll
===
--- /dev/null
+++ llvm/test/DebugInfo/attr-btf_type_tag.ll
@@ -0,0 +1,62 @@
+; REQUIRES: x86-registered-target
+; RUN: llc -filetype=obj -o %t %s
+; RUN: llvm-dwarfdump -debug-info %t | FileCheck %s
+; Source:
+;   #define __tag1 __attribute__((btf_type_tag("tag1")))
+;   #define __tag2 __attribute__((btf_type_tag("tag2")))
+;
+;   int * __tag1 * __tag2 *g;
+; Compilation flag:
+;   clang -target x86_64 -g -S -emit-llvm t.c
+
+@g = dso_local global i32*** null, align 8, !dbg !0
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!13, !14, !15, !16, !17}
+!llvm.ident = !{!18}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "g", scope: !2, file: !3, line: 4, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C99, file: !3, producer: "clang version 14.0.0 (https://github.com/llvm/llvm-project.git 2c240a5eefae1a945dfd36cdaa0c677eca90dd82)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "t.c", directory: "/home/yhs/work/tests/llvm/btf_tag_type")
+!4 = !{!0}
+!5 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !6, size: 64, annotations: !11)
+!6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64, annotations: !9)
+!7 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !8, size: 64)
+!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!9 = !{!10}
+!10 = !{!"btf_type_tag", !"tag1"}
+!11 = !{!12}
+!12 = !{!"btf_type_tag", !"tag2"}
+
+; CHECK:  DW_TAG_variable
+; CHECK-NEXT:   DW_AT_name  ("g")
+; CHECK-NEXT:   DW_AT_type  (0x[[T1:[0-9]+]] "int ***")
+
+; CHECK:  0x[[T1]]: DW_TAG_pointer_type
+; CHECK-NEXT:   DW_AT_type  (0x[[T2:[0-9]+]] "int **")
+
+; CHECK:DW_TAG_LLVM_annotation
+; CHECK-NEXT: DW_AT_name("btf_type_tag")
+; CHECK-NEXT: DW_AT_const_value ("tag2")
+
+; CHECK:NULL
+
+; CHECK:  0x[[T2]]: DW_TAG_pointer_type
+; CHECK-NEXT:   DW_AT_type  (0x[[T3:[0-9]+]] "int *")
+
+; CHECK:DW_TAG_LLVM_annotation
+; CHECK-NEXT: DW_AT_name("btf_type_tag")
+; CHECK-NEXT: DW_AT_const_value ("tag1")
+
+; CHECK:NULL
+
+; CHECK:  0x[[T3]]: DW_TAG_pointer_type
+; CHECK-NEXT:   DW_AT_type  (0x[[#]] "int")
+
+!13 = !{i32 7, !"Dwarf Version", i32 4}
+!14 = !{i32 2, !"Debug Info Version", i32 3}
+!15 = !{i32 1, !"wchar_size", i32 4}
+!16 = !{i32 7, !"uwtable", i32 1}
+!17 = !{i32 7, !"frame-pointer", i32 2}
+!18 = !{!"clang version 14.0.0 (https://github.com/llvm/llvm-project.git 2c240a5eefae1a945dfd36cdaa0c677eca90dd82)"}
Index: llvm/lib/IR/DIBuilder.cpp
===
--- llvm/lib/IR/DIBuilder.cpp
+++ llvm/lib/IR/DIBuilder.cpp
@@ -287,17 +287,16 @@
 0, 0, None, DINode::FlagZero);
 }
 
-DIDerivedType *DIBuilder::createPointerType(
-DIType *PointeeTy,
-uint64_t SizeInBits,
-uint32_t AlignInBits,
-Optional DWARFAddressSpace,
-StringRef Name) {
+DIDerivedType *
+DIBuilder::createPointerType(DIType *PointeeTy, uint64_t SizeInBits,
+ uint32_t AlignInBits,
+ Optional DWARFAddressSpace,
+ StringRef Name, DINodeArray Annotations) {
   // FIXME: Why is there

[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 updated this revision to Diff 380048.
gandhi21299 added a comment.

removed unused diagnostic sema note


Repository:
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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Prevent addrspace cast if the parameter has a default address
+// space, or the argument has a non-default addrspace and the
+// target addrspaces of the argument and the parameter differ.
+if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* %[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] =

[PATCH] D111262: Comment AST: Factor out function type extraction in DeclInfo::fill (NFC)

2021-10-15 Thread Aaron Puchert via Phabricator via cfe-commits

aaronpuchert added a comment.

Ping @gribozavr2. (Ideally also the followups.)


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 updated this revision to Diff 380047.
gandhi21299 added a comment.

installed clang-format, refreshing patch


Repository:
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Files:
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Prevent addrspace cast if the parameter has a default address
+// space, or the argument has a non-default addrspace and the
+// target addrspaces of the argument and the parameter differ.
+if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.
Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
===
--- clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -8374,6 +8374,7 @@
 def err_deleted_inherited_ctor_use : Error<
   "constructor inherited by %0 from base class %1 is implicitly deleted">;
 
+def note_no_addrspace_cast : Note<"skip address space cast">;
 def note_called_by : Note<"called by %0">;
 def err_kern_type_not_void_return : Error<
   "kernel function type %0 must have void return type">;


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu

[PATCH] D111190: Comment parsing: Complete list of Doxygen commands

2021-10-15 Thread Aaron Puchert via Phabricator via cfe-commits

aaronpuchert added a comment.

Ping @gribozavr2.


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[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 updated this revision to Diff 380046.
gandhi21299 added a comment.

adding sema test


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/Sema/SemaExpr.cpp
  clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
  clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN:  -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* 
%[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** 
%[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to 
float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float 
addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@
 auto ArgPtTy = ArgTy->getPointeeType();
 auto ArgAS = ArgPtTy.getAddressSpace();
 
-// Only allow implicit casting from a non-default address space pointee
-// type to a default address space pointee type
-if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+// Prevent addrspace cast if the parameter has a default address
+// space, or the argument has a non-default addrspace and the
+// target addrspaces of the argument and the parameter differ.
+if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ParamAS == LangAS::Default)
   continue;
 
 // First, ensure that the Arg is an RValue.
Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
===
--- clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -8374,6 +8374,7 @@
 def err_deleted_inherited_ctor_use : Error<
   "constructor inherited by %0 from base class %1 is implicitly deleted">;
 
+def note_no_addrspace_cast : Note<"skip address space cast">;
 def note_called_by : Note<"called by %0">;
 def err_kern_type_not_void_return : Error<
   "kernel function type %0 must have void return type">;


Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:  -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN:  -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+  float *rtn;
+  *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN:

[PATCH] D111833: [clang] Fortify warning for scanf calls with field width too big.

2021-10-15 Thread Elliott Hughes via Phabricator via cfe-commits

enh added inline comments.



Comment at: clang/lib/Sema/SemaChecking.cpp:662
+if (Index < FD->getNumParams()) {
+  if (const auto *POS =
+  FD->getParamDecl(Index)->getAttr())

mbenfield wrote:
> enh wrote:
> > (stray tabs?)
> Not sure what you're referring to. AFAICT there are no tabs in this file. 
oh, gerrit uses the >> symbol to mean "tab". is this tool just saying 
"indentation changed", not specifically "someone added a tab"?


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[PATCH] D107882: BPF: Enable frontend constant folding for VLA size

2021-10-15 Thread Yonghong Song via Phabricator via cfe-commits

yonghong-song added a comment.

@pchaigno @efriedma I added an IR pass in BPF backend to remove these 
stacksave/stackrestore intrinsics. https://reviews.llvm.org/D111897
@pchaigno Could you test with https://reviews.llvm.org/D111897 instead?


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[PATCH] D108453: [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default (2)

2021-10-15 Thread Hyeongyu Kim via Phabricator via cfe-commits

hyeongyukim updated this revision to Diff 380037.
hyeongyukim added a comment.

Rebase


Repository:
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Files:
  clang/test/CXX/except/except.spec/p14-ir.cpp
  clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm
  clang/test/CodeGen/2005-01-02-ConstantInits.c
  clang/test/CodeGen/2006-05-19-SingleEltReturn.c
  clang/test/CodeGen/2007-06-18-SextAttrAggregate.c
  clang/test/CodeGen/2009-02-13-zerosize-union-field.c
  clang/test/CodeGen/2009-05-04-EnumInreg.c
  clang/test/CodeGen/64bit-swiftcall.c
  clang/test/CodeGen/RISCV/riscv-inline-asm.c
  clang/test/CodeGen/RISCV/riscv32-ilp32-abi.c
  clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-abi.c
  clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c
  clang/test/CodeGen/RISCV/riscv32-ilp32d-abi.c
  clang/test/CodeGen/RISCV/riscv32-ilp32f-abi.c
  clang/test/CodeGen/RISCV/riscv32-ilp32f-ilp32d-abi.c
  clang/test/CodeGen/RISCV/riscv64-lp64-abi.c
  clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-abi.c
  clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c
  clang/test/CodeGen/RISCV/riscv64-lp64d-abi.c
  clang/test/CodeGen/RISCV/riscv64-lp64f-lp64d-abi.c
  clang/test/CodeGen/SystemZ/systemz-abi-vector.c
  clang/test/CodeGen/SystemZ/systemz-abi.c
  clang/test/CodeGen/SystemZ/systemz-inline-asm.c
  clang/test/CodeGen/WebAssembly/wasm-arguments.c
  clang/test/CodeGen/WebAssembly/wasm-main_argc_argv.c
  clang/test/CodeGen/X86/avx-union.c
  clang/test/CodeGen/X86/avx512fp16-complex-abi.c
  clang/test/CodeGen/X86/ms-x86-intrinsics.c
  clang/test/CodeGen/X86/strictfp_builtins.c
  clang/test/CodeGen/X86/x86-atomic-long_double.c
  clang/test/CodeGen/X86/x86-inline-asm-min-vector-width.c
  clang/test/CodeGen/X86/x86-long-double.cpp
  clang/test/CodeGen/X86/x86-soft-float.c
  clang/test/CodeGen/X86/x86-vec-i128.c
  clang/test/CodeGen/X86/x86_32-arguments-darwin.c
  clang/test/CodeGen/X86/x86_32-arguments-iamcu.c
  clang/test/CodeGen/X86/x86_32-arguments-linux.c
  clang/test/CodeGen/X86/x86_32-arguments-nommx.c
  clang/test/CodeGen/X86/x86_32-arguments-realign.c
  clang/test/CodeGen/X86/x86_32-arguments-win32.c
  clang/test/CodeGen/X86/x86_64-arguments-nacl.c
  clang/test/CodeGen/X86/x86_64-arguments-win32.c
  clang/test/CodeGen/X86/x86_64-arguments.c
  clang/test/CodeGen/X86/x86_64-longdouble.c
  clang/test/CodeGen/aapcs-align.cpp
  clang/test/CodeGen/aapcs64-align.cpp
  clang/test/CodeGen/aarch64-args.cpp
  clang/test/CodeGen/aarch64-byval-temp.c
  clang/test/CodeGen/aarch64-neon-3v.c
  clang/test/CodeGen/aarch64-neon-across.c
  clang/test/CodeGen/aarch64-neon-dot-product.c
  clang/test/CodeGen/aarch64-neon-extract.c
  clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
  clang/test/CodeGen/aarch64-neon-fma.c
  clang/test/CodeGen/aarch64-neon-ldst-one.c
  clang/test/CodeGen/aarch64-neon-scalar-copy.c
  clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
  clang/test/CodeGen/aarch64-neon-tbl.c
  clang/test/CodeGen/aarch64-neon-vcombine.c
  clang/test/CodeGen/aarch64-neon-vget-hilo.c
  clang/test/CodeGen/aarch64-neon-vget.c
  clang/test/CodeGen/aarch64-poly128.c
  clang/test/CodeGen/aarch64-poly64.c
  clang/test/CodeGen/aarch64-strictfp-builtins.c
  clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
  clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
  clang/test/CodeGen/aarch64-varargs.c
  clang/test/CodeGen/address-space-field1.c
  clang/test/CodeGen/address-space.c
  clang/test/CodeGen/aix-alignment.c
  clang/test/CodeGen/aix-altivec.c
  clang/test/CodeGen/aix-ignore-xcoff-visibility.cpp
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/alias.c
  clang/test/CodeGen/align_value.cpp
  clang/test/CodeGen/alloc-align-attr.c
  clang/test/CodeGen/alloc-fns-alignment.c
  clang/test/CodeGen/alloc-size-fnptr.c
  clang/test/CodeGen/arc/arguments.c
  clang/test/CodeGen/arithmetic-fence-builtin.c
  clang/test/CodeGen/arm-aapcs-vfp.c
  clang/test/CodeGen/arm-abi-vector.c
  clang/test/CodeGen/arm-arguments.c
  clang/test/CodeGen/arm-bf16-params-returns.c
  clang/test/CodeGen/arm-byval-align.c
  clang/test/CodeGen/arm-cmse-attr.c
  clang/test/CodeGen/arm-cmse-call.c
  clang/test/CodeGen/arm-float-helpers.c
  clang/test/CodeGen/arm-fp16-arguments.c
  clang/test/CodeGen/arm-homogenous.c
  clang/test/CodeGen/arm-mangle-bf16.cpp
  clang/test/CodeGen/arm-neon-directed-rounding.c
  clang/test/CodeGen/arm-neon-dot-product.c
  clang/test/CodeGen/arm-neon-fma.c
  clang/test/CodeGen/arm-neon-numeric-maxmin.c
  clang/test/CodeGen/arm-neon-vcvtX.c
  clang/test/CodeGen/arm-swiftcall.c
  clang/test/CodeGen/arm-varargs.c
  clang/test/CodeGen/arm-vector-arguments.c
  clang/test/CodeGen/arm-vfp16-arguments.c
  clang/test/CodeGen/arm64-aapcs-arguments.c
  clang/test/CodeGen/arm64-abi-vector.c
  clang/test/CodeGen/arm64-arguments.c

[PATCH] D111833: [clang] Fortify warning for scanf calls with field width too big.

2021-10-15 Thread Michael Benfield via Phabricator via cfe-commits

mbenfield added inline comments.



Comment at: clang/lib/Sema/SemaChecking.cpp:662
+if (Index < FD->getNumParams()) {
+  if (const auto *POS =
+  FD->getParamDecl(Index)->getAttr())

enh wrote:
> (stray tabs?)
Not sure what you're referring to. AFAICT there are no tabs in this file. 


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[PATCH] D111371: [Support][ThinLTO] Move ThinLTO caching to LLVM Support library.

2021-10-15 Thread Noah Shutty via Phabricator via cfe-commits

noajshu updated this revision to Diff 380039.
noajshu marked an inline comment as done.
noajshu added a comment.

rebase against main


Repository:
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Files:
  clang/lib/CodeGen/BackendUtil.cpp
  lld/COFF/LTO.cpp
  lld/ELF/LTO.cpp
  lld/MachO/LTO.cpp
  lld/wasm/LTO.cpp
  llvm/include/llvm/LTO/Caching.h
  llvm/include/llvm/LTO/LTO.h
  llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
  llvm/include/llvm/Support/Caching.h
  llvm/lib/LTO/CMakeLists.txt
  llvm/lib/LTO/Caching.cpp
  llvm/lib/LTO/LTOCodeGenerator.cpp
  llvm/lib/Support/CMakeLists.txt
  llvm/lib/Support/Caching.cpp
  llvm/tools/gold/gold-plugin.cpp
  llvm/tools/llvm-lto/llvm-lto.cpp
  llvm/tools/llvm-lto2/llvm-lto2.cpp

Index: llvm/tools/llvm-lto2/llvm-lto2.cpp
===
--- llvm/tools/llvm-lto2/llvm-lto2.cpp
+++ llvm/tools/llvm-lto2/llvm-lto2.cpp
@@ -19,10 +19,10 @@
 #include "llvm/CodeGen/CommandFlags.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/IR/DiagnosticPrinter.h"
-#include "llvm/LTO/Caching.h"
 #include "llvm/LTO/LTO.h"
 #include "llvm/Passes/PassPlugin.h"
 #include "llvm/Remarks/HotnessThresholdParser.h"
+#include "llvm/Support/Caching.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/InitLLVM.h"
@@ -362,14 +362,13 @@
   if (HasErrors)
 return 1;
 
-  auto AddStream =
-  [&](size_t Task) -> std::unique_ptr {
+  auto AddStream = [&](size_t Task) -> std::unique_ptr {
 std::string Path = OutputFilename + "." + utostr(Task);
 
 std::error_code EC;
 auto S = std::make_unique(Path, EC, sys::fs::OF_None);
 check(EC, Path);
-return std::make_unique(std::move(S));
+return std::make_unique(std::move(S));
   };
 
   auto AddBuffer = [&](size_t Task, std::unique_ptr MB) {
@@ -378,7 +377,8 @@
 
   NativeObjectCache Cache;
   if (!CacheDir.empty())
-Cache = check(localCache(CacheDir, AddBuffer), "failed to create cache");
+Cache = check(localCache("ThinLTO", "Thin", CacheDir, AddBuffer),
+  "failed to create cache");
 
   check(Lto.run(AddStream, Cache), "LTO::run failed");
   return 0;
Index: llvm/tools/llvm-lto/llvm-lto.cpp
===
--- llvm/tools/llvm-lto/llvm-lto.cpp
+++ llvm/tools/llvm-lto/llvm-lto.cpp
@@ -1097,8 +1097,7 @@
 error("writing merged module failed.");
 }
 
-auto AddStream =
-[&](size_t Task) -> std::unique_ptr {
+auto AddStream = [&](size_t Task) -> std::unique_ptr {
   std::string PartFilename = OutputFilename;
   if (Parallelism != 1)
 PartFilename += "." + utostr(Task);
@@ -1108,7 +1107,7 @@
   std::make_unique(PartFilename, EC, sys::fs::OF_None);
   if (EC)
 error("error opening the file '" + PartFilename + "': " + EC.message());
-  return std::make_unique(std::move(S));
+  return std::make_unique(std::move(S));
 };
 
 if (!CodeGen.compileOptimized(AddStream, Parallelism))
Index: llvm/tools/gold/gold-plugin.cpp
===
--- llvm/tools/gold/gold-plugin.cpp
+++ llvm/tools/gold/gold-plugin.cpp
@@ -1081,12 +1081,11 @@
   size_t MaxTasks = Lto->getMaxTasks();
   std::vector, bool>> Files(MaxTasks);
 
-  auto AddStream =
-  [&](size_t Task) -> std::unique_ptr {
+  auto AddStream = [&](size_t Task) -> std::unique_ptr {
 Files[Task].second = !SaveTemps;
 int FD = getOutputFileName(Filename, /* TempOutFile */ !SaveTemps,
Files[Task].first, Task);
-return std::make_unique(
+return std::make_unique(
 std::make_unique(FD, true));
   };
 
@@ -1096,7 +1095,7 @@
 
   NativeObjectCache Cache;
   if (!options::cache_dir.empty())
-Cache = check(localCache(options::cache_dir, AddBuffer));
+Cache = check(localCache("ThinLTO", "Thin", options::cache_dir, AddBuffer));
 
   check(Lto->run(AddStream, Cache));
 
Index: llvm/lib/Support/Caching.cpp
===
--- llvm/lib/Support/Caching.cpp
+++ llvm/lib/Support/Caching.cpp
@@ -1,4 +1,4 @@
-//===-Caching.cpp - LLVM Link Time Optimizer Cache Handling ---===//
+//===-Caching.cpp - LLVM File Cache Handling --===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,11 +6,11 @@
 //
 //===--===//
 //
-// This file implements the Caching for ThinLTO.
+// This file implements the Caching used by ThinLTO.
 //
 //===--===//
 
-#include "llvm/LTO/Caching.h"
+#include "llvm/Support/Caching.h"
 #include "llvm/ADT/StringExtras.h"

[PATCH] D111078: [AIX] Enable int128 in 64 bit mode

2021-10-15 Thread Jinsong Ji via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG42eea2b69bb9: [AIX] Enable int128 in 64 bit mode (authored 
by jsji).

Repository:
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Files:
  clang/lib/Basic/Targets/OSTargets.h
  clang/test/AST/ast-print-int128.cpp
  clang/test/Analysis/sval-dump-int128.c
  clang/test/CodeGen/dbg-const-int128.c
  clang/test/CodeGen/debug-info.c
  clang/test/CodeGen/extend-arg-64.c
  clang/test/CodeGen/ppc-varargs-struct.c
  clang/test/CodeGen/uint128_t.c
  clang/test/CodeGenCXX/debug-info-enum-i128.cpp
  clang/test/Driver/types.c
  clang/test/Preprocessor/init-ppc64.c
  clang/test/Sema/128bitint.c
  clang/test/Sema/const-eval.c
  clang/test/Sema/redefine_extname.c
  clang/test/Sema/types.c
  llvm/test/CodeGen/PowerPC/ctrloop-i128.ll
  llvm/test/CodeGen/PowerPC/int128_ldst.ll
  llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll

Index: llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
===
--- llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
+++ llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
@@ -5,9 +5,15 @@
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-BE
 
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-BE
+
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-NOVSX
 
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-NOVSX
+
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-NOVSX \
 ; RUN:   --implicit-check-not xxswapd
@@ -15,6 +21,9 @@
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-BE-NOVSX
 
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-BE-NOVSX
+
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr8 -mattr=-vsx < %s | \
 ; RUN:   FileCheck %s -check-prefix=CHECK-LE-NOVSX --implicit-check-not xxswapd
@@ -23,10 +32,16 @@
 ; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s -check-prefix=CHECK-P9 --implicit-check-not xxswapd
 
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s -check-prefix=CHECK-P9
+
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr9 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-NOVSX \
 ; RUN:   --implicit-check-not xxswapd
 
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN:   -mcpu=pwr9 -mattr=-vsx < %s | FileCheck %s -check-prefix=CHECK-NOVSX
+
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr9 -mattr=-power9-vector -mattr=-direct-move < %s | \
 ; RUN:   FileCheck %s -check-prefix=CHECK-LE --implicit-check-not xxswapd
@@ -208,19 +223,19 @@
 
 ; CHECK-P9-LABEL: @call_v1i128_increment_by_one
 ; CHECK-P9: lxv
-; CHECK-P9: bl v1i128_increment_by_one
+; CHECK-P9: bl {{.?}}v1i128_increment_by_one
 ; CHECK-P9: blr
 
 ; CHECK-BE-LABEL: @call_v1i128_increment_by_one
 ; CHECK-BE: lxvw4x 34, {{[0-9]+}}, {{[0-9]+}}
 ; CHECK-BE-NOT: xxswapd 34, {{[0-9]+}}
-; CHECK-BE: bl v1i128_increment_by_one
+; CHECK-BE: bl {{.?}}v1i128_increment_by_one
 ; CHECK-BE: blr
 
 ; CHECK-NOVSX-LABEL: @call_v1i128_increment_by_one
 ; CHECK-NOVSX: lvx 2, {{[0-9]+}}, {{[0-9]+}}
 ; CHECK-NOVSX-NOT: xxswapd {{[0-9]+}}, {{[0-9]+}}
-; CHECK-NOVSX: bl v1i128_increment_by_one
+; CHECK-NOVSX: bl {{.?}}v1i128_increment_by_one
 ; CHECK-NOVSX: blr
 }
 
@@ -239,7 +254,7 @@
 ; CHECK-P9-LABEL: @call_v1i128_increment_by_val
 ; CHECK-P9-DAG: lxv v2
 ; CHECK-P9-DAG: lxv v3
-; CHECK-P9: bl v1i128_increment_by_val
+; CHECK-P9: bl {{.?}}v1i128_increment_by_val
 ; CHECK-P9: blr
 
 ; CHECK-BE-LABEL: @call_v1i128_increment_by_val
@@ -248,7 +263,7 @@
 ; CHECK-BE-DAG: lxvw4x 35, {{[0-9]+}}, {{[0-9]+}}
 ; CHECK-BE-NOT: xxswapd 34, {{[0-9]+}}
 ; CHECK-BE-NOT: xxswapd 35, {{[0-9]+}}
-; CHECK-BE: bl v1i128_increment_by_val
+; CHECK-BE: bl {{.?}}v1i128_increment_by_val
 ; CHECK-BE: blr
 
 ; CHECK-NOVSX-LABEL: @call_v1i128_increment_by_val
@@ -256,7 +271,7 @@
 ; CHECK-NOVSX-DAG: lvx 3, {{[0-9]+}}, {{[0-9]+}}

[clang] 42eea2b - [AIX] Enable int128 in 64 bit mode

2021-10-15 Thread Jinsong Ji via cfe-commits


Author: Jinsong Ji
Date: 2021-10-15T16:23:04Z
New Revision: 42eea2b69bb99415f5116ca8e28efdd5f836a03b

URL: 
https://github.com/llvm/llvm-project/commit/42eea2b69bb99415f5116ca8e28efdd5f836a03b
DIFF: 
https://github.com/llvm/llvm-project/commit/42eea2b69bb99415f5116ca8e28efdd5f836a03b.diff

LOG: [AIX] Enable int128 in 64 bit mode

This patch remove the override in AIX target,
so the int128 is enabled in 64 bit mode or with ForceEnableInt128.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D111078

Added: 


Modified: 
clang/lib/Basic/Targets/OSTargets.h
clang/test/AST/ast-print-int128.cpp
clang/test/Analysis/sval-dump-int128.c
clang/test/CodeGen/dbg-const-int128.c
clang/test/CodeGen/debug-info.c
clang/test/CodeGen/extend-arg-64.c
clang/test/CodeGen/ppc-varargs-struct.c
clang/test/CodeGen/uint128_t.c
clang/test/CodeGenCXX/debug-info-enum-i128.cpp
clang/test/Driver/types.c
clang/test/Preprocessor/init-ppc64.c
clang/test/Sema/128bitint.c
clang/test/Sema/const-eval.c
clang/test/Sema/redefine_extname.c
clang/test/Sema/types.c
llvm/test/CodeGen/PowerPC/ctrloop-i128.ll
llvm/test/CodeGen/PowerPC/int128_ldst.ll
llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll

Removed: 




diff  --git a/clang/lib/Basic/Targets/OSTargets.h 
b/clang/lib/Basic/Targets/OSTargets.h
index 220290c1bacf..3adb12568eea 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -743,7 +743,6 @@ class AIXTargetInfo : public OSTargetInfo {
 
   // AIX sets FLT_EVAL_METHOD to be 1.
   unsigned getFloatEvalMethod() const override { return 1; }
-  bool hasInt128Type() const override { return false; }
 
   bool defaultsToAIXPowerAlignment() const override { return true; }
 };

diff  --git a/clang/test/AST/ast-print-int128.cpp 
b/clang/test/AST/ast-print-int128.cpp
index 51d15b609f0b..8086ea7c751a 100644
--- a/clang/test/AST/ast-print-int128.cpp
+++ b/clang/test/AST/ast-print-int128.cpp
@@ -1,4 +1,5 @@
 // RUN: %clang_cc1 -ast-print -std=c++20 %s -o - -triple x86_64-linux | 
FileCheck %s
+// RUN: %clang_cc1 -ast-print -std=c++20 %s -o - -triple 
powerpc64-ibm-aix-xcoff | FileCheck %s
 
 template 
 struct enable_if {

diff  --git a/clang/test/Analysis/sval-dump-int128.c 
b/clang/test/Analysis/sval-dump-int128.c
index 3c28f1bd1bb6..82f2fe37c2e8 100644
--- a/clang/test/Analysis/sval-dump-int128.c
+++ b/clang/test/Analysis/sval-dump-int128.c
@@ -1,4 +1,5 @@
 // RUN: %clang_analyze_cc1 -triple x86_64-linux-gnu 
-analyzer-checker=debug.ExprInspection %s -verify
+// RUN: %clang_analyze_cc1 -triple powerpc64-ibm-aix-xcoff 
-analyzer-checker=debug.ExprInspection %s -verify
 
 void clang_analyzer_dump(unsigned __int128 x);
 

diff  --git a/clang/test/CodeGen/dbg-const-int128.c 
b/clang/test/CodeGen/dbg-const-int128.c
index 966c22705500..0af788e26304 100644
--- a/clang/test/CodeGen/dbg-const-int128.c
+++ b/clang/test/CodeGen/dbg-const-int128.c
@@ -1,4 +1,5 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-linux -S -emit-llvm 
-debug-info-kind=limited  %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm 
-debug-info-kind=limited  %s -o - | FileCheck %s
 // CHECK: !DIGlobalVariable({{.*}}
 // CHECK-NOT: expr:
 

diff  --git a/clang/test/CodeGen/debug-info.c b/clang/test/CodeGen/debug-info.c
index 0958f4d0298e..8850ed4a4daa 100644
--- a/clang/test/CodeGen/debug-info.c
+++ b/clang/test/CodeGen/debug-info.c
@@ -1,4 +1,5 @@
 // RUN: %clang_cc1 -triple x86_64-unk-unk -o - -emit-llvm 
-debug-info-kind=limited %s | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -o - -emit-llvm 
-debug-info-kind=limited %s | FileCheck %s
 
 // PR3023
 void convert(void) {

diff  --git a/clang/test/CodeGen/extend-arg-64.c 
b/clang/test/CodeGen/extend-arg-64.c
index 85b70e0238cb..8cdbda8e4ff5 100644
--- a/clang/test/CodeGen/extend-arg-64.c
+++ b/clang/test/CodeGen/extend-arg-64.c
@@ -16,6 +16,12 @@
 // RUN: %s -emit-llvm -o - | FileCheck %s \
 // RUN:--implicit-check-not "ext {{.*}}to i64"
 
+// The option isn't supported on ppc, no effect
+// RUN: %clang_cc1 -DD128 -triple powerpc64-ibm-aix-xcoff 
-fextend-arguments=64 \
+// RUN: %s -emit-llvm -o - | FileCheck %s \
+// RUN:--implicit-check-not "ext {{.*}}to i64"
+
+
 int vararg(int, ...);
 void knr();
 

diff  --git a/clang/test/CodeGen/ppc-varargs-struct.c 
b/clang/test/CodeGen/ppc-varargs-struct.c
index c201074e1fd9..9a54c47a067e 100644
--- a/clang/test/CodeGen/ppc-varargs-struct.c
+++ b/clang/test/CodeGen/ppc-varargs-struct.c
@@ -2,6 +2,7 @@
 // REQUIRES: asserts
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | 
FileCheck %s
 // RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s | 
FileCheck %s --check-prefix=CHECK-PPC
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -emit-llvm -o

[clang] 395e1fe - [clang] Capture Framework when HeaderSearch is resolved via headermap

2021-10-15 Thread Cyndy Ishida via cfe-commits


Author: Cyndy Ishida
Date: 2021-10-15T09:12:31-07:00
New Revision: 395e1fe3057482576eb0bc38d1079fcc1ff29193

URL: 
https://github.com/llvm/llvm-project/commit/395e1fe3057482576eb0bc38d1079fcc1ff29193
DIFF: 
https://github.com/llvm/llvm-project/commit/395e1fe3057482576eb0bc38d1079fcc1ff29193.diff

LOG: [clang] Capture Framework when HeaderSearch is resolved via headermap

When building frameworks, headermaps responsible for mapping angle-included 
headers to their source file location are passed via
`-I` and not `-index-header-map`. Also, `-index-header-map` is only used for 
indexing purposes and not during most builds.
This patch holds on to the framework's name in HeaderFileInfo as this is 
retrieveable for cases outside of IndexHeaderMaps and
still represents the framework that is being built.

resolves: rdar://84046893

Reviewed By: jansvoboda11

Differential Revision: https://reviews.llvm.org/D111468

Added: 


Modified: 
clang/lib/Lex/HeaderSearch.cpp
clang/unittests/Lex/HeaderSearchTest.cpp

Removed: 




diff  --git a/clang/lib/Lex/HeaderSearch.cpp b/clang/lib/Lex/HeaderSearch.cpp
index b2fc2d4eb1a9..866ebb193a54 100644
--- a/clang/lib/Lex/HeaderSearch.cpp
+++ b/clang/lib/Lex/HeaderSearch.cpp
@@ -1005,13 +1005,13 @@ Optional HeaderSearch::LookupFile(
 
 // If this file is found in a header map and uses the framework style of
 // includes, then this header is part of a framework we're building.
-if (CurDir->isIndexHeaderMap()) {
+if (CurDir->isHeaderMap() && isAngled) {
   size_t SlashPos = Filename.find('/');
-  if (SlashPos != StringRef::npos) {
+  if (SlashPos != StringRef::npos)
+HFI.Framework =
+getUniqueFrameworkName(StringRef(Filename.begin(), SlashPos));
+  if (CurDir->isIndexHeaderMap())
 HFI.IndexHeaderMapHeader = 1;
-HFI.Framework = getUniqueFrameworkName(StringRef(Filename.begin(),
- SlashPos));
-  }
 }
 
 if (checkMSVCHeaderSearch(Diags, MSFE ? >getFileEntry() : nullptr,

diff  --git a/clang/unittests/Lex/HeaderSearchTest.cpp 
b/clang/unittests/Lex/HeaderSearchTest.cpp
index 4121a73a52c1..78e2a2ca5e30 100644
--- a/clang/unittests/Lex/HeaderSearchTest.cpp
+++ b/clang/unittests/Lex/HeaderSearchTest.cpp
@@ -18,6 +18,7 @@
 #include "clang/Lex/HeaderSearch.h"
 #include "clang/Lex/HeaderSearchOptions.h"
 #include "clang/Serialization/InMemoryModuleCache.h"
+#include "llvm/Support/MemoryBuffer.h"
 #include "gtest/gtest.h"
 
 namespace clang {
@@ -47,7 +48,8 @@ class HeaderSearchTest : public ::testing::Test {
   }
 
   void addHeaderMap(llvm::StringRef Filename,
-std::unique_ptr Buf) {
+std::unique_ptr Buf,
+bool isAngled = false) {
 VFS->addFile(Filename, 0, std::move(Buf), /*User=*/None, /*Group=*/None,
  llvm::sys::fs::file_type::regular_file);
 auto FE = FileMgr.getFile(Filename, true);
@@ -58,7 +60,7 @@ class HeaderSearchTest : public ::testing::Test {
 HMap = HeaderMap::Create(*FE, FileMgr);
 auto DL =
 DirectoryLookup(HMap.get(), SrcMgr::C_User, /*isFramework=*/false);
-Search.AddSearchPath(DL, /*isAngled=*/false);
+Search.AddSearchPath(DL, isAngled);
   }
 
   IntrusiveRefCntPtr VFS;
@@ -179,5 +181,48 @@ TEST_F(HeaderSearchTest, HeaderMapReverseLookup) {
 "d.h");
 }
 
+TEST_F(HeaderSearchTest, HeaderMapFrameworkLookup) {
+  typedef NullTerminatedFile, char> FileTy;
+  FileTy File;
+  File.init();
+
+  std::string HeaderDirName = "/tmp/Sources/Foo/Headers/";
+  std::string HeaderName = "Foo.h";
+#ifdef _WIN32
+  // Force header path to be absolute on windows.
+  // As headermap content should represent absolute locations.
+  HeaderDirName = "C:" + HeaderDirName;
+#endif /*_WIN32*/
+
+  test::HMapFileMockMaker Maker(File);
+  auto a = Maker.addString("Foo/Foo.h");
+  auto b = Maker.addString(HeaderDirName);
+  auto c = Maker.addString(HeaderName);
+  Maker.addBucket("Foo/Foo.h", a, b, c);
+  addHeaderMap("product-headers.hmap", File.getBuffer(), /*isAngled=*/true);
+
+  VFS->addFile(
+  HeaderDirName + HeaderName, 0,
+  llvm::MemoryBuffer::getMemBufferCopy("", HeaderDirName + HeaderName),
+  /*User=*/None, /*Group=*/None, llvm::sys::fs::file_type::regular_file);
+
+  bool IsMapped = false;
+  const DirectoryLookup *CurDir = nullptr;
+  auto FoundFile = Search.LookupFile(
+  "Foo/Foo.h", SourceLocation(), /*isAngled=*/true, /*FromDir=*/nullptr,
+  CurDir, /*Includers=*/{}, /*SearchPath=*/nullptr,
+  /*RelativePath=*/nullptr, /*RequestingModule=*/nullptr,
+  /*SuggestedModule=*/nullptr, ,
+  /*IsFrameworkFound=*/nullptr);
+
+  EXPECT_TRUE(FoundFile.hasValue());
+  EXPECT_TRUE(IsMapped);
+  auto  = FoundFile.getValue();
+  auto FI = Search.getExistingFileInfo(FE);
+  EXPECT_TRUE(FI);
+  EXPECT_TRUE(FI->IsValid);

[PATCH] D111468: [clang] Capture Framework when HeaderSearch is resolved via headermap

2021-10-15 Thread Cyndy Ishida via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG395e1fe30574: [clang] Capture Framework when HeaderSearch is 
resolved via headermap (authored by cishida).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D111468

Files:
  clang/lib/Lex/HeaderSearch.cpp
  clang/unittests/Lex/HeaderSearchTest.cpp

Index: clang/unittests/Lex/HeaderSearchTest.cpp
===
--- clang/unittests/Lex/HeaderSearchTest.cpp
+++ clang/unittests/Lex/HeaderSearchTest.cpp
@@ -18,6 +18,7 @@
 #include "clang/Lex/HeaderSearch.h"
 #include "clang/Lex/HeaderSearchOptions.h"
 #include "clang/Serialization/InMemoryModuleCache.h"
+#include "llvm/Support/MemoryBuffer.h"
 #include "gtest/gtest.h"
 
 namespace clang {
@@ -47,7 +48,8 @@
   }
 
   void addHeaderMap(llvm::StringRef Filename,
-std::unique_ptr Buf) {
+std::unique_ptr Buf,
+bool isAngled = false) {
 VFS->addFile(Filename, 0, std::move(Buf), /*User=*/None, /*Group=*/None,
  llvm::sys::fs::file_type::regular_file);
 auto FE = FileMgr.getFile(Filename, true);
@@ -58,7 +60,7 @@
 HMap = HeaderMap::Create(*FE, FileMgr);
 auto DL =
 DirectoryLookup(HMap.get(), SrcMgr::C_User, /*isFramework=*/false);
-Search.AddSearchPath(DL, /*isAngled=*/false);
+Search.AddSearchPath(DL, isAngled);
   }
 
   IntrusiveRefCntPtr VFS;
@@ -179,5 +181,48 @@
 "d.h");
 }
 
+TEST_F(HeaderSearchTest, HeaderMapFrameworkLookup) {
+  typedef NullTerminatedFile, char> FileTy;
+  FileTy File;
+  File.init();
+
+  std::string HeaderDirName = "/tmp/Sources/Foo/Headers/";
+  std::string HeaderName = "Foo.h";
+#ifdef _WIN32
+  // Force header path to be absolute on windows.
+  // As headermap content should represent absolute locations.
+  HeaderDirName = "C:" + HeaderDirName;
+#endif /*_WIN32*/
+
+  test::HMapFileMockMaker Maker(File);
+  auto a = Maker.addString("Foo/Foo.h");
+  auto b = Maker.addString(HeaderDirName);
+  auto c = Maker.addString(HeaderName);
+  Maker.addBucket("Foo/Foo.h", a, b, c);
+  addHeaderMap("product-headers.hmap", File.getBuffer(), /*isAngled=*/true);
+
+  VFS->addFile(
+  HeaderDirName + HeaderName, 0,
+  llvm::MemoryBuffer::getMemBufferCopy("", HeaderDirName + HeaderName),
+  /*User=*/None, /*Group=*/None, llvm::sys::fs::file_type::regular_file);
+
+  bool IsMapped = false;
+  const DirectoryLookup *CurDir = nullptr;
+  auto FoundFile = Search.LookupFile(
+  "Foo/Foo.h", SourceLocation(), /*isAngled=*/true, /*FromDir=*/nullptr,
+  CurDir, /*Includers=*/{}, /*SearchPath=*/nullptr,
+  /*RelativePath=*/nullptr, /*RequestingModule=*/nullptr,
+  /*SuggestedModule=*/nullptr, ,
+  /*IsFrameworkFound=*/nullptr);
+
+  EXPECT_TRUE(FoundFile.hasValue());
+  EXPECT_TRUE(IsMapped);
+  auto  = FoundFile.getValue();
+  auto FI = Search.getExistingFileInfo(FE);
+  EXPECT_TRUE(FI);
+  EXPECT_TRUE(FI->IsValid);
+  EXPECT_EQ(FI->Framework.str(), "Foo");
+}
+
 } // namespace
 } // namespace clang
Index: clang/lib/Lex/HeaderSearch.cpp
===
--- clang/lib/Lex/HeaderSearch.cpp
+++ clang/lib/Lex/HeaderSearch.cpp
@@ -1005,13 +1005,13 @@
 
 // If this file is found in a header map and uses the framework style of
 // includes, then this header is part of a framework we're building.
-if (CurDir->isIndexHeaderMap()) {
+if (CurDir->isHeaderMap() && isAngled) {
   size_t SlashPos = Filename.find('/');
-  if (SlashPos != StringRef::npos) {
+  if (SlashPos != StringRef::npos)
+HFI.Framework =
+getUniqueFrameworkName(StringRef(Filename.begin(), SlashPos));
+  if (CurDir->isIndexHeaderMap())
 HFI.IndexHeaderMapHeader = 1;
-HFI.Framework = getUniqueFrameworkName(StringRef(Filename.begin(),
- SlashPos));
-  }
 }
 
 if (checkMSVCHeaderSearch(Diags, MSFE ? >getFileEntry() : nullptr,
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[PATCH] D111755: [ARM] Don't use TARGET_HEADER_BUILTIN in arm_mve_builtins.inc or arm_cde_builtins.inc

2021-10-15 Thread Craig Topper via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc294715e2e0c: [ARM] Dont use TARGET_HEADER_BUILTIN in 
arm_mve_builtins.inc or… (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D111755

Files:
  clang/utils/TableGen/MveEmitter.cpp


Index: clang/utils/TableGen/MveEmitter.cpp
===
--- clang/utils/TableGen/MveEmitter.cpp
+++ clang/utils/TableGen/MveEmitter.cpp
@@ -1941,8 +1941,8 @@
 void MveEmitter::EmitBuiltinDef(raw_ostream ) {
   for (const auto  : ACLEIntrinsics) {
 const ACLEIntrinsic  = *kv.second;
-OS << "TARGET_HEADER_BUILTIN(__builtin_arm_mve_" << Int.fullName()
-   << ", \"\", \"n\", \"arm_mve.h\", ALL_LANGUAGES, \"\")\n";
+OS << "BUILTIN(__builtin_arm_mve_" << Int.fullName()
+   << ", \"\", \"n\")\n";
   }
 
   std::set ShortNamesSeen;
@@ -2151,8 +2151,8 @@
 if (kv.second->headerOnly())
   continue;
 const ACLEIntrinsic  = *kv.second;
-OS << "TARGET_HEADER_BUILTIN(__builtin_arm_cde_" << Int.fullName()
-   << ", \"\", \"ncU\", \"arm_cde.h\", ALL_LANGUAGES, \"\")\n";
+OS << "BUILTIN(__builtin_arm_cde_" << Int.fullName()
+   << ", \"\", \"ncU\")\n";
   }
 }
 


Index: clang/utils/TableGen/MveEmitter.cpp
===
--- clang/utils/TableGen/MveEmitter.cpp
+++ clang/utils/TableGen/MveEmitter.cpp
@@ -1941,8 +1941,8 @@
 void MveEmitter::EmitBuiltinDef(raw_ostream ) {
   for (const auto  : ACLEIntrinsics) {
 const ACLEIntrinsic  = *kv.second;
-OS << "TARGET_HEADER_BUILTIN(__builtin_arm_mve_" << Int.fullName()
-   << ", \"\", \"n\", \"arm_mve.h\", ALL_LANGUAGES, \"\")\n";
+OS << "BUILTIN(__builtin_arm_mve_" << Int.fullName()
+   << ", \"\", \"n\")\n";
   }
 
   std::set ShortNamesSeen;
@@ -2151,8 +2151,8 @@
 if (kv.second->headerOnly())
   continue;
 const ACLEIntrinsic  = *kv.second;
-OS << "TARGET_HEADER_BUILTIN(__builtin_arm_cde_" << Int.fullName()
-   << ", \"\", \"ncU\", \"arm_cde.h\", ALL_LANGUAGES, \"\")\n";
+OS << "BUILTIN(__builtin_arm_cde_" << Int.fullName()
+   << ", \"\", \"ncU\")\n";
   }
 }
 
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[clang] c294715 - [ARM] Don't use TARGET_HEADER_BUILTIN in arm_mve_builtins.inc or arm_cde_builtins.inc

2021-10-15 Thread Craig Topper via cfe-commits


Author: Craig Topper
Date: 2021-10-15T09:11:06-07:00
New Revision: c294715e2e0c90761e69fd3a7db221601289d803

URL: 
https://github.com/llvm/llvm-project/commit/c294715e2e0c90761e69fd3a7db221601289d803
DIFF: 
https://github.com/llvm/llvm-project/commit/c294715e2e0c90761e69fd3a7db221601289d803.diff

LOG: [ARM] Don't use TARGET_HEADER_BUILTIN in arm_mve_builtins.inc or 
arm_cde_builtins.inc

The attributes string doesn't include 'f' or 'h'. I don't think
any code looks at the header name without those.

Reviewed By: simon_tatham

Differential Revision: https://reviews.llvm.org/D111755

Added: 


Modified: 
clang/utils/TableGen/MveEmitter.cpp

Removed: 




diff  --git a/clang/utils/TableGen/MveEmitter.cpp 
b/clang/utils/TableGen/MveEmitter.cpp
index 091af2dc52a1d..f5b6f4f016884 100644
--- a/clang/utils/TableGen/MveEmitter.cpp
+++ b/clang/utils/TableGen/MveEmitter.cpp
@@ -1941,8 +1941,8 @@ void MveEmitter::EmitHeader(raw_ostream ) {
 void MveEmitter::EmitBuiltinDef(raw_ostream ) {
   for (const auto  : ACLEIntrinsics) {
 const ACLEIntrinsic  = *kv.second;
-OS << "TARGET_HEADER_BUILTIN(__builtin_arm_mve_" << Int.fullName()
-   << ", \"\", \"n\", \"arm_mve.h\", ALL_LANGUAGES, \"\")\n";
+OS << "BUILTIN(__builtin_arm_mve_" << Int.fullName()
+   << ", \"\", \"n\")\n";
   }
 
   std::set ShortNamesSeen;
@@ -2151,8 +2151,8 @@ void CdeEmitter::EmitBuiltinDef(raw_ostream ) {
 if (kv.second->headerOnly())
   continue;
 const ACLEIntrinsic  = *kv.second;
-OS << "TARGET_HEADER_BUILTIN(__builtin_arm_cde_" << Int.fullName()
-   << ", \"\", \"ncU\", \"arm_cde.h\", ALL_LANGUAGES, \"\")\n";
+OS << "BUILTIN(__builtin_arm_cde_" << Int.fullName()
+   << ", \"\", \"ncU\")\n";
   }
 }
 



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[PATCH] D109707: [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-15 Thread Yaxun Liu via Phabricator via cfe-commits

yaxunl accepted this revision.
yaxunl added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks.


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[PATCH] D111468: [clang] Capture Framework when HeaderSearch is resolved via headermap

2021-10-15 Thread Cyndy Ishida via Phabricator via cfe-commits

cishida added a comment.

In D111468#3066820 , @jansvoboda11 
wrote:

> LGTM.
>
> As a follow-up, do you think it would make sense to improve the 
> documentation/comments around "index header maps"? Variable names refer to 
> indexing while the documentation talks about building frameworks, which is 
> confusing without referring back to the original Radar.

Makes sense to me. If I understand correctly, the headermap kind was introduced 
to work around a task generation limitation in Xcode which no longer is an 
issue.


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[PATCH] D111078: [AIX] Enable int128 in 64 bit mode

2021-10-15 Thread Jinsong Ji via Phabricator via cfe-commits

jsji added a comment.

In D111078#3065552 , 
@hubert.reinterpretcast wrote:

> In D111078#3063245 , @lkail wrote:
>
>> This LGTM as the start point to support int128 on AIX. We might need more 
>> patches involving libraries in the LLVM monorepo, we can do that 
>> progressively.
>
> Agreed (although I find it slightly odd that the testing doesn't check the 
> edge case where the argument value is split between r10 and the stack).

I can add more test in a follow up patch.


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[PATCH] D106876: Remove non-affecting module maps from PCM files.

2021-10-15 Thread Ilya Kuteev via Phabricator via cfe-commits

ilyakuteev added a comment.

Hello everyone, can somebody please help me commit this patch to trunk?


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[PATCH] D109707: [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols

2021-10-15 Thread Anshil Gandhi via Phabricator via cfe-commits

gandhi21299 added a comment.

ping


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[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

2021-10-15 Thread Bradley Smith via Phabricator via cfe-commits

bsmith updated this revision to Diff 380015.
bsmith added a comment.

- Update sema checking for sve_vector_bits attribute to emit an error when the 
vscale min != max, i.e. when -mvse-vector-bits=+ is used
- Add test to cover the above case


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  clang/include/clang/Driver/Options.td
  clang/lib/AST/ASTContext.cpp
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
  clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
  clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
  clang/test/CodeGen/arm-sve-vector-bits-vscale-range.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-call.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
  clang/test/CodeGenCXX/aarch64-mangle-sve-fixed-vectors.cpp
  clang/test/CodeGenCXX/aarch64-sve-fixedtypeinfo.cpp
  clang/test/Driver/aarch64-sve-vector-bits.c
  clang/test/Sema/aarch64-sve-explicit-casts-fixed-size.c
  clang/test/Sema/aarch64-sve-lax-vector-conversions.c
  clang/test/Sema/attr-arm-sve-vector-bits.c
  clang/test/SemaCXX/aarch64-sve-explicit-casts-fixed-size.cpp
  clang/test/SemaCXX/aarch64-sve-lax-vector-conversions.cpp
  clang/test/SemaCXX/attr-arm-sve-vector-bits.cpp

Index: clang/test/SemaCXX/attr-arm-sve-vector-bits.cpp
===
--- clang/test/SemaCXX/attr-arm-sve-vector-bits.cpp
+++ clang/test/SemaCXX/attr-arm-sve-vector-bits.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -ffreestanding -fsyntax-only -verify -std=c++11 -msve-vector-bits=512 -fallow-half-arguments-and-returns -Wconversion %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -ffreestanding -fsyntax-only -verify -std=c++11 -mvscale-min=4 -mvscale-max=4 -fallow-half-arguments-and-returns -Wconversion %s
 // expected-no-diagnostics
 
 #include 
Index: clang/test/SemaCXX/aarch64-sve-lax-vector-conversions.cpp
===
--- clang/test/SemaCXX/aarch64-sve-lax-vector-conversions.cpp
+++ clang/test/SemaCXX/aarch64-sve-lax-vector-conversions.cpp
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -msve-vector-bits=512 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify=lax-vector-none %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -msve-vector-bits=512 -flax-vector-conversions=integer -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify=lax-vector-integer %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -msve-vector-bits=512 -flax-vector-conversions=all -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify=lax-vector-all %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=4 -mvscale-max=4 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify=lax-vector-none %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=4 -mvscale-max=4 -flax-vector-conversions=integer -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify=lax-vector-integer %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=4 -mvscale-max=4 -flax-vector-conversions=all -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify=lax-vector-all %s
 
 #include 
 
Index: clang/test/SemaCXX/aarch64-sve-explicit-casts-fixed-size.cpp
===
--- clang/test/SemaCXX/aarch64-sve-explicit-casts-fixed-size.cpp
+++ clang/test/SemaCXX/aarch64-sve-explicit-casts-fixed-size.cpp
@@ -1,8 +1,8 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -msve-vector-bits=128 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -msve-vector-bits=256 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -msve-vector-bits=512 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

2021-10-15 Thread Bradley Smith via Phabricator via cfe-commits

bsmith added inline comments.



Comment at: clang/lib/Sema/SemaType.cpp:7916
   // The attribute vector size must match -msve-vector-bits.
-  if (VecSize != S.getLangOpts().ArmSveVectorBits) {
+  if (VecSize != S.getLangOpts().VScaleMin * 128) {
 S.Diag(Attr.getLoc(), diag::err_attribute_bad_sve_vector_size)

bsmith wrote:
> paulwalker-arm wrote:
> > I'm thinking there should be a check for `S.getLangOpts().VScaleMin == 
> > S.getLangOpts().VScaleMax` somewhere, but I guess the current diagnostic 
> > probably doesn't account for two values, nor should it really.  What about 
> > just duplicating this block but using `VScaleMax` in place of `VScaleMin`?
> I think I would rather have a separate check for min == max, and output a 
> diagnostic stating that an exact -msve-vector-bits value must be used, does 
> that sound sensible?
> 
> This could then perhaps be combined with the previous comment to produce 
> sensible output, i.e.:
> 
> !vscale_min -> not supported
> vscale_min != vscale_max -> must be fixed value
Actually, now that I re-read the error message, and the fact that is directly 
refers to the valid values, I think instead there should just be an initial 
check of `min == 0 || min != max`.


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[clang] 096ace5 - [AArch64] Fix failing test target-invalid-cpu-note.c

2021-10-15 Thread Tomas Matheson via cfe-commits


Author: Tomas Matheson
Date: 2021-10-15T16:10:46+01:00
New Revision: 096ace55804d21a187b37448376ecd51c8e810e1

URL: 
https://github.com/llvm/llvm-project/commit/096ace55804d21a187b37448376ecd51c8e810e1
DIFF: 
https://github.com/llvm/llvm-project/commit/096ace55804d21a187b37448376ecd51c8e810e1.diff

LOG: [AArch64] Fix failing test target-invalid-cpu-note.c

Added: 


Modified: 
clang/test/Misc/target-invalid-cpu-note.c

Removed: 




diff  --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-note.c
index 9d0a3df0a38df..800910b749838 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -5,11 +5,11 @@
 
 // RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix AARCH64
 // AARCH64: error: unknown target CPU 'not-a-cpu'
-// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, 
cortex-a53, cortex-a55, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, 
cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, 
cortex-a78c, cortex-r82, cortex-x1, neoverse-e1, neoverse-n1, neoverse-n2, 
neoverse-v1, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, 
apple-a12, apple-a13, apple-a14, apple-m1, apple-s4, apple-s5, exynos-m3, 
exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, 
thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel{{$}}
+// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, 
cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, cortex-a65ae, 
cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, 
cortex-a78, cortex-a78c, cortex-r82, cortex-x1, neoverse-e1, neoverse-n1, 
neoverse-n2, neoverse-v1, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, 
apple-a11, apple-a12, apple-a13, apple-a14, apple-m1, apple-s4, apple-s5, 
exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, 
thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, 
carmel{{$}}
 
 // RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix TUNE_AARCH64
 // TUNE_AARCH64: error: unknown target CPU 'not-a-cpu'
-// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, 
cortex-a35, cortex-a53, cortex-a55, cortex-a57, cortex-a65, cortex-a65ae, 
cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, 
cortex-a78, cortex-a78c, cortex-r82, cortex-x1, neoverse-e1, neoverse-n1, 
neoverse-n2, neoverse-v1, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, 
apple-a11, apple-a12, apple-a13, apple-a14, apple-m1, apple-s4, apple-s5, 
exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, 
thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, 
carmel{{$}}
+// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, 
cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a57, cortex-a65, 
cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, 
cortex-a77, cortex-a78, cortex-a78c, cortex-r82, cortex-x1, neoverse-e1, 
neoverse-n1, neoverse-n2, neoverse-v1, cyclone, apple-a7, apple-a8, apple-a9, 
apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-m1, apple-s4, 
apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, 
thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, 
carmel{{$}}
 
 // RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix X86
 // X86: error: unknown target CPU 'not-a-cpu'



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[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

2021-10-15 Thread Bradley Smith via Phabricator via cfe-commits

bsmith added inline comments.



Comment at: clang/lib/Sema/SemaType.cpp:7916
   // The attribute vector size must match -msve-vector-bits.
-  if (VecSize != S.getLangOpts().ArmSveVectorBits) {
+  if (VecSize != S.getLangOpts().VScaleMin * 128) {
 S.Diag(Attr.getLoc(), diag::err_attribute_bad_sve_vector_size)

paulwalker-arm wrote:
> I'm thinking there should be a check for `S.getLangOpts().VScaleMin == 
> S.getLangOpts().VScaleMax` somewhere, but I guess the current diagnostic 
> probably doesn't account for two values, nor should it really.  What about 
> just duplicating this block but using `VScaleMax` in place of `VScaleMin`?
I think I would rather have a separate check for min == max, and output a 
diagnostic stating that an exact -msve-vector-bits value must be used, does 
that sound sensible?

This could then perhaps be combined with the previous comment to produce 
sensible output, i.e.:

!vscale_min -> not supported
vscale_min != vscale_max -> must be fixed value


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[PATCH] D99484: Use `GNUInstallDirs` to support custom installation dirs.

2021-10-15 Thread John Ericson via Phabricator via cfe-commits

Ericson2314 updated this revision to Diff 379976.
Ericson2314 added a comment.

Rebase again because previous diff changed


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Files:
  clang-tools-extra/clang-doc/tool/CMakeLists.txt
  clang-tools-extra/clang-include-fixer/find-all-symbols/tool/CMakeLists.txt
  clang-tools-extra/clang-include-fixer/tool/CMakeLists.txt
  clang-tools-extra/clang-tidy/CMakeLists.txt
  clang-tools-extra/clang-tidy/tool/CMakeLists.txt
  clang-tools-extra/modularize/CMakeLists.txt
  clang/CMakeLists.txt
  clang/cmake/modules/AddClang.cmake
  clang/tools/c-index-test/CMakeLists.txt
  clang/tools/clang-format/CMakeLists.txt
  clang/tools/clang-rename/CMakeLists.txt
  clang/tools/libclang/CMakeLists.txt
  clang/tools/scan-build-py/CMakeLists.txt
  clang/tools/scan-build/CMakeLists.txt
  clang/tools/scan-view/CMakeLists.txt
  clang/utils/hmaptool/CMakeLists.txt
  compiler-rt/cmake/base-config-ix.cmake
  flang/CMakeLists.txt
  flang/cmake/modules/AddFlang.cmake
  flang/tools/f18/CMakeLists.txt
  flang/tools/flang-driver/CMakeLists.txt
  libc/CMakeLists.txt
  libcxx/CMakeLists.txt
  libcxx/cmake/Modules/HandleLibCXXABI.cmake
  libcxx/include/CMakeLists.txt
  libcxxabi/CMakeLists.txt
  libunwind/CMakeLists.txt
  lld/CMakeLists.txt
  lld/cmake/modules/AddLLD.cmake
  lld/tools/lld/CMakeLists.txt
  lldb/CMakeLists.txt
  lldb/cmake/modules/AddLLDB.cmake
  lldb/cmake/modules/LLDBConfig.cmake
  mlir/CMakeLists.txt
  mlir/cmake/modules/AddMLIR.cmake
  openmp/CMakeLists.txt
  openmp/runtime/src/CMakeLists.txt
  openmp/tools/multiplex/CMakeLists.txt
  polly/CMakeLists.txt
  polly/cmake/CMakeLists.txt
  polly/lib/External/CMakeLists.txt
  pstl/CMakeLists.txt

Index: pstl/CMakeLists.txt
===
--- pstl/CMakeLists.txt
+++ pstl/CMakeLists.txt
@@ -7,6 +7,8 @@
 #===--===##
 cmake_minimum_required(VERSION 3.13.4)
 
+include(GNUInstallDirs)
+
 set(PARALLELSTL_VERSION_FILE "${CMAKE_CURRENT_SOURCE_DIR}/include/pstl/internal/pstl_config.h")
 file(STRINGS "${PARALLELSTL_VERSION_FILE}" PARALLELSTL_VERSION_SOURCE REGEX "#define _PSTL_VERSION .*$")
 string(REGEX REPLACE "#define _PSTL_VERSION (.*)$" "\\1" PARALLELSTL_VERSION_SOURCE "${PARALLELSTL_VERSION_SOURCE}")
@@ -86,10 +88,10 @@
   "${CMAKE_CURRENT_BINARY_DIR}/ParallelSTLConfigVersion.cmake"
 DESTINATION lib/cmake/ParallelSTL)
 install(DIRECTORY include/
-DESTINATION include
+DESTINATION "${CMAKE_INSTALL_INCLUDEDIR}"
 PATTERN "*.in" EXCLUDE)
 install(FILES "${PSTL_CONFIG_SITE_PATH}"
-DESTINATION include)
+DESTINATION "${CMAKE_INSTALL_INCLUDEDIR}")
 
 add_custom_target(install-pstl
   COMMAND "${CMAKE_COMMAND}" -P "${PROJECT_BINARY_DIR}/cmake_install.cmake" -DCOMPONENT=ParallelSTL)
Index: polly/lib/External/CMakeLists.txt
===
--- polly/lib/External/CMakeLists.txt
+++ polly/lib/External/CMakeLists.txt
@@ -290,7 +290,7 @@
 install(DIRECTORY
   ${ISL_SOURCE_DIR}/include/
   ${ISL_BINARY_DIR}/include/
-  DESTINATION include/polly
+  DESTINATION "${CMAKE_INSTALL_INCLUDEDIR}/polly"
   FILES_MATCHING
   PATTERN "*.h"
   PATTERN "CMakeFiles" EXCLUDE
Index: polly/cmake/CMakeLists.txt
===
--- polly/cmake/CMakeLists.txt
+++ polly/cmake/CMakeLists.txt
@@ -83,14 +83,15 @@
 set(POLLY_CONFIG_LLVM_CMAKE_DIR "${LLVM_BINARY_DIR}/${LLVM_INSTALL_PACKAGE_DIR}")
 set(POLLY_CONFIG_CMAKE_DIR "${POLLY_INSTALL_PREFIX}/${POLLY_INSTALL_PACKAGE_DIR}")
 set(POLLY_CONFIG_LIBRARY_DIRS "${POLLY_INSTALL_PREFIX}/lib${LLVM_LIBDIR_SUFFIX}")
+get_filename_component(base_includedir "${CMAKE_INSTALL_INCLUDEDIR}" ABSOLUTE BASE_DIR "${POLLY_INSTALL_PREFIX}")
 if (POLLY_BUNDLED_ISL)
   set(POLLY_CONFIG_INCLUDE_DIRS
-"${POLLY_INSTALL_PREFIX}/include"
-"${POLLY_INSTALL_PREFIX}/include/polly"
+"${base_includedir}"
+"${base_includedir}/polly"
 )
 else()
   set(POLLY_CONFIG_INCLUDE_DIRS
-"${POLLY_INSTALL_PREFIX}/include"
+"${base_includedir}"
 ${ISL_INCLUDE_DIRS}
 )
 endif()
@@ -100,12 +101,12 @@
 foreach(tgt IN LISTS POLLY_CONFIG_EXPORTED_TARGETS)
   get_target_property(tgt_type ${tgt} TYPE)
   if (tgt_type STREQUAL "EXECUTABLE")
-set(tgt_prefix "bin/")
+set(tgt_prefix "${CMAKE_INSTALL_FULL_BINDIR}/")
   else()
-set(tgt_prefix "lib/")
+set(tgt_prefix "${CMAKE_INSTALL_FULL_LIBDIR}/")
   endif()
 
-  set(tgt_path "${CMAKE_INSTALL_PREFIX}/${tgt_prefix}$")
+  set(tgt_path "${tgt_prefix}$")
   file(RELATIVE_PATH tgt_path ${POLLY_CONFIG_CMAKE_DIR} ${tgt_path})
 
   if (NOT tgt_type STREQUAL "INTERFACE_LIBRARY")
Index: polly/CMakeLists.txt
===
---

[PATCH] D33029: [clang-format] add option for dangling parenthesis

2021-10-15 Thread Mike Seese via Phabricator via cfe-commits

seesemichaelj added a comment.

@MyDeveloperDay Great, sounds like this revision, D33029 
, is stale and being superseded by the work in 
D109557 . It doesn't sound like there is 
anyone here that is wanting to keep pushing forward this specific 
implementation at this point. I feel like any debates on naming, and 
implementation can happen over at D109557  
since that is recent and getting pushed forward.

I'm obviously not a maintainer, but I think it's totally fair at this point to 
just close this revision in favor of D109557 
, is this something you can do?


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[PATCH] D109825: [AArch64]Enabling Cortex-A510 Support

2021-10-15 Thread Sam Elliott via Phabricator via cfe-commits

lenary added a comment.

In D109825#3066853 , @jansvoboda11 
wrote:

> This seems to be breaking the macOS bot, can you take a look? 
> https://green.lab.llvm.org/green/job/clang-stage1-RA/24735/

Will do.


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[PATCH] D109557: Adds a BreakBeforeClosingParen option

2021-10-15 Thread Cameron Mulhern via Phabricator via cfe-commits

csmulhern added a comment.

In D109557#3063679 , @MyDeveloperDay 
wrote:

> Do you think this is going to need some other capability to put the break 
> after the  opening paren? e.g. `BreakAfterOpeningParen`
>
>   if (
>   ^

I don't think so. This is already implicitly dealt with based on the 
indentation of the line after the brace (which is affected by e.g. 
AlignAfterOpenBracket::BAS_AlwaysBreak).

In D109557#3063681 , @MyDeveloperDay 
wrote:

> Personally I'm not convinced there wouldn't be people who want this for 
> function declarations and definitions
>
>   Function(
>   param1,
>   param2,
>   param3
>   );
>
> but don't want this
>
>   if (
>  foo()
>   )
>   

To be clear, the if styling above would only occur if `foo()` was long enough 
to line wrap. Not all instances of `if`. However, I agree that could be true, 
and the existing clang-format code clearly treats indentation inside if / for / 
while differently than e.g. function calls. The existing BreakAfterOpeningParen 
options for example do not apply to the former for instance, which is why we 
see the weird indentation in the current revision where the opening brace is 
not followed by a line break, but the closing brace is preceded by one.

In D109557#3066186 , @MyDeveloperDay 
wrote:

> Just as a general pattern what we see is that options start out as `bool`, 
> shortly become `enums`, then as they get more complex become `structs` e.g. 
> `BraceWrapping`
>
>   bool BreakBeforeClosingParen
>
> trying to think ahead a little can make future backwards compatibility a 
> little easier.
>
> It will be a lot more involved but I kind of wonder if we might not see the 
> same here over time. I could foresee a situation where we might have:
>
>   ParenWrapping:
> StartOfIfOpening: true
> EndOfIfExpression: true
> FunctionParameterOpening: true
> FunctionParameterClosing: true
>
>
> of even a struct of enums (to allow special cases like short functions)
>
> I think if we could capture in unit tests the types of situation where we 
> would and wouldn't want to put a newline after `(` and before `)` it might 
> help define a better set of options in the first place.
>
> Otherwise if we are just going to use `BreakBeforeClosingParen` for all uses 
> of `)` less the "short situations like c-style casts, then I kind of feel it 
> should not impact parents around control statements like if,while,for etc... 
> I think in which case I'd prefer we started out with a struct with just:  
> (ignore the actual names used, just something suitable)
>
>   ParenWrapping:
> FunctionParametersClosing: 

Yes, I completely agree. I had decided to propose we leave if / for / while 
outside the scope of BreakBeforeClosingParen for now, given that 
AlignAfterOpenBracket is also not applying to these situations. I've put 
together a revision that does this, but wanted to revisit the configuration 
option, because I can imagine wanting to extend this so that block indenting 
_does_ apply to if / for / while. The other revision that had attempted to do 
this work had landed on extending AlignAfterOpenBracket with a style 
AlwaysBreakAndCloseOnNextLine, which I think is appealing. I like the more 
explicit suggestion of ParenWrapping, but then I'm worried that you have these 
weird interactions between AlignAfterOpenBracket and ParenWrapping, and 
combinations that don't really make sense. What do you think of having 
something like BreakAfterOpeningParen::BlockIndent, which specifies the 
dangling parenthesis style? In the future, we can add a BlockIndentationStyle 
struct that can add finer control to block indentation, e.g. if block 
indentation is applied to if / for / while.

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[PATCH] D109825: [AArch64]Enabling Cortex-A510 Support

2021-10-15 Thread Jan Svoboda via Phabricator via cfe-commits

jansvoboda11 added a comment.

This seems to be breaking the macOS bot, can you take a look? 
https://green.lab.llvm.org/green/job/clang-stage1-RA/24735/


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[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

2021-10-15 Thread Paul Walker via Phabricator via cfe-commits

paulwalker-arm added inline comments.



Comment at: clang/lib/Sema/SemaType.cpp:7893
   // Attribute is unsupported if '-msve-vector-bits=' isn't specified.
-  if (!S.getLangOpts().ArmSveVectorBits) {
+  if (!S.getLangOpts().VScaleMin) {
 S.Diag(Attr.getLoc(), diag::err_attribute_arm_feature_sve_bits_unsupported)

This should be `VScaleMax` as the attribute is only valid when 
`-msve-vector-bits=` is given only a number (i.e. `-msve-vector-bits=128+`  
does not enable the fixed length ACLE extension).

I guess we need tests to cover this scenario.



Comment at: clang/lib/Sema/SemaType.cpp:7916
   // The attribute vector size must match -msve-vector-bits.
-  if (VecSize != S.getLangOpts().ArmSveVectorBits) {
+  if (VecSize != S.getLangOpts().VScaleMin * 128) {
 S.Diag(Attr.getLoc(), diag::err_attribute_bad_sve_vector_size)

I'm thinking there should be a check for `S.getLangOpts().VScaleMin == 
S.getLangOpts().VScaleMax` somewhere, but I guess the current diagnostic 
probably doesn't account for two values, nor should it really.  What about just 
duplicating this block but using `VScaleMax` in place of `VScaleMin`?


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[PATCH] D111805: [Driver][NetBSD] Use T reference instead of getToolChain().getTriple().

2021-10-15 Thread Frederic Cambus via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rGecef0359538c: [Driver][NetBSD] Use Triple reference instead 
of ToolChain.getTriple(). (authored by fcambus).

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Files:
  clang/lib/Driver/ToolChains/NetBSD.cpp


Index: clang/lib/Driver/ToolChains/NetBSD.cpp
===
--- clang/lib/Driver/ToolChains/NetBSD.cpp
+++ clang/lib/Driver/ToolChains/NetBSD.cpp
@@ -32,6 +32,7 @@
   const toolchains::NetBSD  =
 static_cast(getToolChain());
   const Driver  = ToolChain.getDriver();
+  const llvm::Triple  = ToolChain.getTriple();
 
   claimNoWarnArgs(Args);
   ArgStringList CmdArgs;
@@ -48,8 +49,7 @@
   case llvm::Triple::thumbeb: {
 StringRef MArch, MCPU;
 arm::getARMArchCPUFromArgs(Args, MArch, MCPU, /*FromAs*/ true);
-std::string Arch =
-arm::getARMTargetCPU(MCPU, MArch, ToolChain.getTriple());
+std::string Arch = arm::getARMTargetCPU(MCPU, MArch, Triple);
 CmdArgs.push_back(Args.MakeArgString("-mcpu=" + Arch));
 break;
   }
@@ -60,7 +60,7 @@
   case llvm::Triple::mips64el: {
 StringRef CPUName;
 StringRef ABIName;
-mips::getMipsCPUAndABI(Args, ToolChain.getTriple(), CPUName, ABIName);
+mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
 
 CmdArgs.push_back("-march");
 CmdArgs.push_back(CPUName.data());
@@ -68,7 +68,7 @@
 CmdArgs.push_back("-mabi");
 CmdArgs.push_back(mips::getGnuCompatibleMipsABIName(ABIName).data());
 
-if (ToolChain.getTriple().isLittleEndian())
+if (Triple.isLittleEndian())
   CmdArgs.push_back("-EL");
 else
   CmdArgs.push_back("-EB");
@@ -80,18 +80,16 @@
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel: {
 CmdArgs.push_back("-32");
-std::string CPU = getCPUName(D, Args, ToolChain.getTriple());
-CmdArgs.push_back(
-sparc::getSparcAsmModeForCPU(CPU, ToolChain.getTriple()));
+std::string CPU = getCPUName(D, Args, Triple);
+CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, Triple));
 AddAssemblerKPIC(ToolChain, Args, CmdArgs);
 break;
   }
 
   case llvm::Triple::sparcv9: {
 CmdArgs.push_back("-64");
-std::string CPU = getCPUName(D, Args, ToolChain.getTriple());
-CmdArgs.push_back(
-sparc::getSparcAsmModeForCPU(CPU, ToolChain.getTriple()));
+std::string CPU = getCPUName(D, Args, Triple);
+CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, Triple));
 AddAssemblerKPIC(ToolChain, Args, CmdArgs);
 break;
   }
@@ -122,6 +120,8 @@
   const toolchains::NetBSD  =
 static_cast(getToolChain());
   const Driver  = ToolChain.getDriver();
+  const llvm::Triple  = ToolChain.getTriple();
+
   ArgStringList CmdArgs;
 
   if (!D.SysRoot.empty())
@@ -156,7 +156,7 @@
   case llvm::Triple::arm:
   case llvm::Triple::thumb:
 CmdArgs.push_back("-m");
-switch (ToolChain.getTriple().getEnvironment()) {
+switch (Triple.getEnvironment()) {
 case llvm::Triple::EABI:
 case llvm::Triple::GNUEABI:
   CmdArgs.push_back("armelf_nbsd_eabi");
@@ -174,7 +174,7 @@
   case llvm::Triple::thumbeb:
 arm::appendBE8LinkFlag(Args, CmdArgs, ToolChain.getEffectiveTriple());
 CmdArgs.push_back("-m");
-switch (ToolChain.getTriple().getEnvironment()) {
+switch (Triple.getEnvironment()) {
 case llvm::Triple::EABI:
 case llvm::Triple::GNUEABI:
   CmdArgs.push_back("armelfb_nbsd_eabi");
@@ -271,7 +271,7 @@
   }
 
   unsigned Major, Minor, Micro;
-  ToolChain.getTriple().getOSVersion(Major, Minor, Micro);
+  Triple.getOSVersion(Major, Minor, Micro);
   bool useLibgcc = true;
   if (Major >= 7 || Major == 0) {
 switch (ToolChain.getArch()) {


Index: clang/lib/Driver/ToolChains/NetBSD.cpp
===
--- clang/lib/Driver/ToolChains/NetBSD.cpp
+++ clang/lib/Driver/ToolChains/NetBSD.cpp
@@ -32,6 +32,7 @@
   const toolchains::NetBSD  =
 static_cast(getToolChain());
   const Driver  = ToolChain.getDriver();
+  const llvm::Triple  = ToolChain.getTriple();
 
   claimNoWarnArgs(Args);
   ArgStringList CmdArgs;
@@ -48,8 +49,7 @@
   case llvm::Triple::thumbeb: {
 StringRef MArch, MCPU;
 arm::getARMArchCPUFromArgs(Args, MArch, MCPU, /*FromAs*/ true);
-std::string Arch =
-arm::getARMTargetCPU(MCPU, MArch, ToolChain.getTriple());
+std::string Arch = arm::getARMTargetCPU(MCPU, MArch, Triple);
 CmdArgs.push_back(Args.MakeArgString("-mcpu=" + Arch));
 break;
   }
@@ -60,7 +60,7 @@
   case llvm::Triple::mips64el: {
 StringRef CPUName;
 StringRef ABIName;
-mips::getMipsCPUAndABI(Args, ToolChain.getTriple(), CPUName, ABIName);
+mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
 
 CmdArgs.push_back("-march");
 CmdArgs.push_back(CPUName.data());
@@ -68,7 +68,7 @@

[clang] ecef035 - [Driver][NetBSD] Use Triple reference instead of ToolChain.getTriple().

2021-10-15 Thread Frederic Cambus via cfe-commits


Author: Frederic Cambus
Date: 2021-10-15T16:36:19+02:00
New Revision: ecef0359538ca54a5374dbf3547a395adc326bbe

URL: 
https://github.com/llvm/llvm-project/commit/ecef0359538ca54a5374dbf3547a395adc326bbe
DIFF: 
https://github.com/llvm/llvm-project/commit/ecef0359538ca54a5374dbf3547a395adc326bbe.diff

LOG: [Driver][NetBSD] Use Triple reference instead of ToolChain.getTriple().

Differential Revision: https://reviews.llvm.org/D111805

Added: 


Modified: 
clang/lib/Driver/ToolChains/NetBSD.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/NetBSD.cpp 
b/clang/lib/Driver/ToolChains/NetBSD.cpp
index 0a8c254306c6c..b1e01afd0e810 100644
--- a/clang/lib/Driver/ToolChains/NetBSD.cpp
+++ b/clang/lib/Driver/ToolChains/NetBSD.cpp
@@ -32,6 +32,7 @@ void netbsd::Assembler::ConstructJob(Compilation , const 
JobAction ,
   const toolchains::NetBSD  =
 static_cast(getToolChain());
   const Driver  = ToolChain.getDriver();
+  const llvm::Triple  = ToolChain.getTriple();
 
   claimNoWarnArgs(Args);
   ArgStringList CmdArgs;
@@ -48,8 +49,7 @@ void netbsd::Assembler::ConstructJob(Compilation , const 
JobAction ,
   case llvm::Triple::thumbeb: {
 StringRef MArch, MCPU;
 arm::getARMArchCPUFromArgs(Args, MArch, MCPU, /*FromAs*/ true);
-std::string Arch =
-arm::getARMTargetCPU(MCPU, MArch, ToolChain.getTriple());
+std::string Arch = arm::getARMTargetCPU(MCPU, MArch, Triple);
 CmdArgs.push_back(Args.MakeArgString("-mcpu=" + Arch));
 break;
   }
@@ -60,7 +60,7 @@ void netbsd::Assembler::ConstructJob(Compilation , const 
JobAction ,
   case llvm::Triple::mips64el: {
 StringRef CPUName;
 StringRef ABIName;
-mips::getMipsCPUAndABI(Args, ToolChain.getTriple(), CPUName, ABIName);
+mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
 
 CmdArgs.push_back("-march");
 CmdArgs.push_back(CPUName.data());
@@ -68,7 +68,7 @@ void netbsd::Assembler::ConstructJob(Compilation , const 
JobAction ,
 CmdArgs.push_back("-mabi");
 CmdArgs.push_back(mips::getGnuCompatibleMipsABIName(ABIName).data());
 
-if (ToolChain.getTriple().isLittleEndian())
+if (Triple.isLittleEndian())
   CmdArgs.push_back("-EL");
 else
   CmdArgs.push_back("-EB");
@@ -80,18 +80,16 @@ void netbsd::Assembler::ConstructJob(Compilation , const 
JobAction ,
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel: {
 CmdArgs.push_back("-32");
-std::string CPU = getCPUName(D, Args, ToolChain.getTriple());
-CmdArgs.push_back(
-sparc::getSparcAsmModeForCPU(CPU, ToolChain.getTriple()));
+std::string CPU = getCPUName(D, Args, Triple);
+CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, Triple));
 AddAssemblerKPIC(ToolChain, Args, CmdArgs);
 break;
   }
 
   case llvm::Triple::sparcv9: {
 CmdArgs.push_back("-64");
-std::string CPU = getCPUName(D, Args, ToolChain.getTriple());
-CmdArgs.push_back(
-sparc::getSparcAsmModeForCPU(CPU, ToolChain.getTriple()));
+std::string CPU = getCPUName(D, Args, Triple);
+CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, Triple));
 AddAssemblerKPIC(ToolChain, Args, CmdArgs);
 break;
   }
@@ -122,6 +120,8 @@ void netbsd::Linker::ConstructJob(Compilation , const 
JobAction ,
   const toolchains::NetBSD  =
 static_cast(getToolChain());
   const Driver  = ToolChain.getDriver();
+  const llvm::Triple  = ToolChain.getTriple();
+
   ArgStringList CmdArgs;
 
   if (!D.SysRoot.empty())
@@ -156,7 +156,7 @@ void netbsd::Linker::ConstructJob(Compilation , const 
JobAction ,
   case llvm::Triple::arm:
   case llvm::Triple::thumb:
 CmdArgs.push_back("-m");
-switch (ToolChain.getTriple().getEnvironment()) {
+switch (Triple.getEnvironment()) {
 case llvm::Triple::EABI:
 case llvm::Triple::GNUEABI:
   CmdArgs.push_back("armelf_nbsd_eabi");
@@ -174,7 +174,7 @@ void netbsd::Linker::ConstructJob(Compilation , const 
JobAction ,
   case llvm::Triple::thumbeb:
 arm::appendBE8LinkFlag(Args, CmdArgs, ToolChain.getEffectiveTriple());
 CmdArgs.push_back("-m");
-switch (ToolChain.getTriple().getEnvironment()) {
+switch (Triple.getEnvironment()) {
 case llvm::Triple::EABI:
 case llvm::Triple::GNUEABI:
   CmdArgs.push_back("armelfb_nbsd_eabi");
@@ -271,7 +271,7 @@ void netbsd::Linker::ConstructJob(Compilation , const 
JobAction ,
   }
 
   unsigned Major, Minor, Micro;
-  ToolChain.getTriple().getOSVersion(Major, Minor, Micro);
+  Triple.getOSVersion(Major, Minor, Micro);
   bool useLibgcc = true;
   if (Major >= 7 || Major == 0) {
 switch (ToolChain.getArch()) {



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[PATCH] D111062: [RISCV] Rename some assembler mnemonic and intrinsic functions for RVV 1.0.

2021-10-15 Thread Jessica Clarke via Phabricator via cfe-commits

jrtc27 added inline comments.



Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:1372
+(VMANDN_MM VR:$vd, VR:$vs2, VR:$vs1), 0>;
+
+def : InstAlias<"vmornot.mm $vd, $vs2, $vs1",

craig.topper wrote:
> Probably not worth having a blank line between vmandnot and vmornot
This still applies


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[PATCH] D111476: [modules] Make a module map referenced by a system map a system one too.

2021-10-15 Thread Jan Svoboda via Phabricator via cfe-commits

jansvoboda11 accepted this revision.
jansvoboda11 added a comment.
This revision is now accepted and ready to land.

LGTM.


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[PATCH] D111468: [clang] Capture Framework when HeaderSearch is resolved via headermap

2021-10-15 Thread Jan Svoboda via Phabricator via cfe-commits

jansvoboda11 accepted this revision.
jansvoboda11 added a comment.
This revision is now accepted and ready to land.

LGTM.

As a follow-up, do you think it would make sense to improve the 
documentation/comments around "index header maps"? Variable names refer to 
indexing while the documentation talks about building frameworks, which is 
confusing without referring back to the original Radar.


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[clang] f2ea852 - Fix a crash on an invalid templated UDL declaration

2021-10-15 Thread Aaron Ballman via cfe-commits


Author: Aaron Ballman
Date: 2021-10-15T10:00:16-04:00
New Revision: f2ea85255075606563370c9249f61dfad6a3f98b

URL: 
https://github.com/llvm/llvm-project/commit/f2ea85255075606563370c9249f61dfad6a3f98b
DIFF: 
https://github.com/llvm/llvm-project/commit/f2ea85255075606563370c9249f61dfad6a3f98b.diff

LOG: Fix a crash on an invalid templated UDL declaration

We were missing a null pointer check that a template parameter existed
at all.

Added: 


Modified: 
clang/lib/Sema/SemaDeclCXX.cpp
clang/test/SemaCXX/literal-operators.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaDeclCXX.cpp b/clang/lib/Sema/SemaDeclCXX.cpp
index 31eda99089295..2d1fd1b14040f 100644
--- a/clang/lib/Sema/SemaDeclCXX.cpp
+++ b/clang/lib/Sema/SemaDeclCXX.cpp
@@ -15908,7 +15908,7 @@ checkLiteralOperatorTemplateParameterList(Sema ,
 //
 // As a DR resolution, we also allow placeholders for deduced class
 // template specializations.
-if (SemaRef.getLangOpts().CPlusPlus20 &&
+if (SemaRef.getLangOpts().CPlusPlus20 && PmDecl &&
 !PmDecl->isTemplateParameterPack() &&
 (PmDecl->getType()->isRecordType() ||
  PmDecl->getType()->getAs()))

diff  --git a/clang/test/SemaCXX/literal-operators.cpp 
b/clang/test/SemaCXX/literal-operators.cpp
index 834d5ec7923e6..067e151606202 100644
--- a/clang/test/SemaCXX/literal-operators.cpp
+++ b/clang/test/SemaCXX/literal-operators.cpp
@@ -51,3 +51,9 @@ void test_if_2() { "foo"if; } // expected-error {{no matching 
literal operator f
 template void dependent_member_template() {
   T().template operator""_foo(); // expected-error {{'operator""_foo' 
following the 'template' keyword cannot refer to a dependent template}}
 }
+
+namespace PR51142 {
+// This code previously crashed due to a null template parameter declaration.
+template // expected-error {{template parameter list for literal 
operator must be either 'char...' or 'typename T, T...'}}
+constexpr auto operator ""_l();
+}



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[PATCH] D110357: [Analyzer] Extend ConstraintAssignor to handle remainder op

2021-10-15 Thread Gabor Marton via Phabricator via cfe-commits

martong updated this revision to Diff 379988.
martong added a comment.

- Remove the wrong inferrence of `a % b == 0 implies that a == 0` and related 
test cases.


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Files:
  
clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
  clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
  clang/test/Analysis/constraint-assignor.c

Index: clang/test/Analysis/constraint-assignor.c
===
--- /dev/null
+++ clang/test/Analysis/constraint-assignor.c
@@ -0,0 +1,69 @@
+// RUN: %clang_analyze_cc1 %s \
+// RUN:   -analyzer-checker=core \
+// RUN:   -analyzer-checker=debug.ExprInspection \
+// RUN:   -verify
+
+// expected-no-diagnostics
+
+void clang_analyzer_warnIfReached();
+
+void rem_constant_rhs_ne_zero(int x, int y) {
+  if (x % 3 == 0) // x % 3 != 0 -> x != 0
+return;
+  if (x * y != 0) // x * y == 0
+return;
+  if (y != 1) // y == 1 -> x == 0
+return;
+  clang_analyzer_warnIfReached(); // no-warning
+  (void)x; // keep the constraints alive.
+}
+
+void rem_symbolic_rhs_ne_zero(int x, int y, int z) {
+  if (x % z == 0) // x % z != 0 -> x != 0
+return;
+  if (x * y != 0) // x * y == 0
+return;
+  if (y != 1) // y == 1 -> x == 0
+return;
+  clang_analyzer_warnIfReached(); // no-warning
+  (void)x; // keep the constraints alive.
+}
+
+void rem_symbolic_rhs_ne_zero_nested(int w, int x, int y, int z) {
+  if (w % x % z == 0) // w % x % z != 0 -> w % x != 0
+return;
+  if (w % x * y != 0) // w % x * y == 0
+return;
+  if (y != 1) // y == 1 -> w % x == 0
+return;
+  clang_analyzer_warnIfReached(); // no-warning
+  (void)(w * x); // keep the constraints alive.
+}
+
+void rem_constant_rhs_ne_zero_early_contradiction(int x, int y) {
+  if ((x + y) != 0) // (x + y) == 0
+return;
+  if ((x + y) % 3 == 0) // (x + y) % 3 != 0 -> (x + y) != 0 -> contradiction
+return;
+  clang_analyzer_warnIfReached(); // no-warning
+  (void)x; // keep the constraints alive.
+}
+
+void rem_symbolic_rhs_ne_zero_early_contradiction(int x, int y, int z) {
+  if ((x + y) != 0) // (x + y) == 0
+return;
+  if ((x + y) % z == 0) // (x + y) % z != 0 -> (x + y) != 0 -> contradiction
+return;
+  clang_analyzer_warnIfReached(); // no-warning
+  (void)x; // keep the constraints alive.
+}
+
+void internal_unsigned_signed_mismatch(unsigned a) {
+  int d = a;
+  // Implicit casts are not handled, thus the analyzer models `d % 2` as
+  // `(reg_$0) % 2`
+  // However, this should not result in internal signedness mismatch error when
+  // we assign new constraints below.
+  if (d % 2 != 0)
+return;
+}
Index: clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
===
--- clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
+++ clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
@@ -1610,7 +1610,28 @@
 return Assignor.assign(CoS, NewConstraint);
   }
 
+  /// Handle expressions like: a % b != 0.
+  template 
+  bool handleRemainderOp(const SymT *Sym, RangeSet Constraint) {
+if (Sym->getOpcode() != BO_Rem)
+  return true;
+const SymbolRef LHS = Sym->getLHS();
+const llvm::APSInt  =
+Builder.getBasicValueFactory().getValue(0, Sym->getType());
+// a % b != 0 implies that a != 0.
+if (!Constraint.containsZero()) {
+  State = RCM.assumeSymNE(State, LHS, Zero, Zero);
+  if (!State)
+return false;
+}
+return true;
+  }
+
   inline bool assignSymExprToConst(const SymExpr *Sym, Const Constraint);
+  inline bool assignSymIntExprToRangeSet(const SymIntExpr *Sym,
+ RangeSet Constraint) {
+return handleRemainderOp(Sym, Constraint);
+  }
   inline bool assignSymSymExprToRangeSet(const SymSymExpr *Sym,
  RangeSet Constraint);
 
@@ -1688,9 +1709,7 @@
 if (Constraint.getConcreteValue())
   return !Constraint.getConcreteValue()->isZero();
 
-APSIntType T{Constraint.getMinValue()};
-Const Zero = T.getZeroValue();
-if (!Constraint.contains(Zero))
+if (!Constraint.containsZero())
   return true;
 
 return llvm::None;
@@ -1734,6 +1753,9 @@
 
 bool ConstraintAssignor::assignSymSymExprToRangeSet(const SymSymExpr *Sym,
 RangeSet Constraint) {
+  if (!handleRemainderOp(Sym, Constraint))
+return false;
+
   Optional ConstraintAsBool = interpreteAsBool(Constraint);
 
   if (!ConstraintAsBool)
Index: clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
===
--- clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
+++

[PATCH] D110357: [Analyzer] Extend ConstraintAssignor to handle remainder op

2021-10-15 Thread Gabor Marton via Phabricator via cfe-commits

martong added a comment.

After taking a look at the new findings we discovered, there is a logic error 
with this patch, actually `a % b == 0 implies that a == 0` does not hold, one 
counter example is `10 % 2 == 0`. Argh, probably we should be using Z3 next 
time to prove or disprove such things. Or perhaps other reviewers with strong 
math background could have had a look (knock knock @NoQ :).


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[PATCH] D111543: [clang][modules] Stop creating `IdentifierInfo` for names of explicit modules

2021-10-15 Thread Jan Svoboda via Phabricator via cfe-commits

jansvoboda11 added a comment.

In D111543#3062095 , @rsmith wrote:

> I'm concerned that this is adding complexity to paper over a bug elsewhere. 
> Creating an `IdentifierInfo` should never cause unrelated uses of that 
> identifier to change their meaning or behavior. My guess is that there's a 
> bug in how we resolve or merge identifier  information in the AST reader.

Thanks for the information. You're right that the issue is most likely 
somewhere around `ASTReader`, not name resolution.

My understanding is that `Preprocessor::getIdentifierInfo` may trigger AST 
deserialization. The problem here seems to be that we're calling 
`getIdentifierInfo` before the preprocessor's `IdentifierTable` is set up with 
"external identifier info lookup" (aka `ASTReader`). So the call to 
`IdentifierTable::get` creates new `IdentifierInfo` for `"Interface"` instead 
of looking it up in the AST. Further calls to `getIdentifierInfo` resolve to 
this new `IdentifierInfo` and the `ObjCInterfaceDecl` never gets deserialized.

@rsmith, is my understanding correct? If so, I'm not sure there's another bug 
hiding here: it's just an unexpected series of events that should probably be 
prevented (hence this patch).

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[PATCH] D109825: [AArch64]Enabling Cortex-A510 Support

2021-10-15 Thread Sam Elliott via Phabricator via cfe-commits

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG97809c828f8e: [AArch64]Enabling Cortex-A510 Support 
(authored by mubashar_, committed by lenary).

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Files:
  clang/docs/ReleaseNotes.rst
  clang/test/Driver/aarch64-cpus.c
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -898,6 +898,17 @@
  AArch64::AEK_RDM | AArch64::AEK_FP16 |
  AArch64::AEK_DOTPROD | AArch64::AEK_RCPC,
  "8.2-A"),
+ARMCPUTestParams("cortex-a510", "armv9-a", "neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_SVE2 | AArch64::AEK_BF16 |
+ AArch64::AEK_I8MM | AArch64::AEK_SVE2BITPERM |
+ AArch64::AEK_PAUTH | AArch64::AEK_MTE |
+ AArch64::AEK_SSBS | AArch64::AEK_FP16FML |
+ AArch64::AEK_SB,
+ "9-A"),
 ARMCPUTestParams("cortex-a57", "armv8-a", "crypto-neon-fp-armv8",
  AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
  AArch64::AEK_FP | AArch64::AEK_SIMD,
@@ -1178,7 +1189,7 @@
  AArch64::AEK_LSE | AArch64::AEK_RDM,
  "8.2-A")));
 
-static constexpr unsigned NumAArch64CPUArchs = 48;
+static constexpr unsigned NumAArch64CPUArchs = 49;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -50,6 +50,7 @@
 CortexA35,
 CortexA53,
 CortexA55,
+CortexA510,
 CortexA57,
 CortexA65,
 CortexA72,
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -78,6 +78,7 @@
 break;
   case CortexA53:
   case CortexA55:
+  case CortexA510:
 PrefFunctionLogAlignment = 4;
 break;
   case CortexA57:
Index: llvm/lib/Target/AArch64/AArch64.td
===
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -634,6 +634,22 @@
FeatureFuseAddress,
]>;
 
+def ProcA510: SubtargetFeature<"a510", "ARMProcFamily", "CortexA510",
+   "Cortex-A510 ARM processors", [
+   HasV9_0aOps,
+   FeatureNEON,
+   FeaturePerfMon,
+   FeatureMatMulInt8,
+   FeatureBF16,
+   FeatureAM,
+   FeatureMTE,
+   FeatureETE,
+   FeatureSVE2BitPerm,
+   FeatureFP16FML,
+   FeatureFuseAES,
+   FeaturePostRAScheduler
+   ]>;
+
 def ProcA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
"Cortex-A57 ARM processors", [
FeatureBalanceFPOps,
@@ -1190,6 +1206,7 @@
 def : ProcessorModel<"cortex-a34", CortexA53Model, [ProcA35]>;
 def : ProcessorModel<"cortex-a53", CortexA53Model, [ProcA53]>;
 def : ProcessorModel<"cortex-a55", CortexA55Model, [ProcA55]>;
+def : ProcessorModel<"cortex-a510", CortexA55Model, [ProcA510]>;
 def : ProcessorModel<"cortex-a57", CortexA57Model, [ProcA57]>;
 def : ProcessorModel<"cortex-a65", CortexA53Model, [ProcA65]>;
 def : ProcessorModel<"cortex-a65ae", CortexA53Model, [ProcA65]>;
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
---

[clang] 97809c8 - [AArch64]Enabling Cortex-A510 Support

2021-10-15 Thread Archibald Elliott via cfe-commits


Author: Mubashar Ahmad
Date: 2021-10-15T14:31:18+01:00
New Revision: 97809c828f8eb5f5e322ee1cbc20f96fd5ef8649

URL: 
https://github.com/llvm/llvm-project/commit/97809c828f8eb5f5e322ee1cbc20f96fd5ef8649
DIFF: 
https://github.com/llvm/llvm-project/commit/97809c828f8eb5f5e322ee1cbc20f96fd5ef8649.diff

LOG: [AArch64]Enabling Cortex-A510 Support

This patch enables support for Cortex-A510 CPUs.

Reviewed By: MarkMurrayARM, dmgreen

Differential Revision: https://reviews.llvm.org/D109825

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/test/Driver/aarch64-cpus.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/unittests/Support/TargetParserTest.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 950e9fe726285..6501a4870e2a6 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -177,6 +177,12 @@ X86 Support in Clang
 
 - Support for ``AVX512-FP16`` instructions has been added.
 
+Arm and AArch64 Support in Clang
+
+
+- Support has been added for the following processors (command-line 
identifiers in parentheses):
+  - Arm Cortex-A510 (``cortex-a510``)
+
 Internal API Changes
 
 

diff  --git a/clang/test/Driver/aarch64-cpus.c 
b/clang/test/Driver/aarch64-cpus.c
index 59987440c2173..01c1202288d19 100644
--- a/clang/test/Driver/aarch64-cpus.c
+++ b/clang/test/Driver/aarch64-cpus.c
@@ -392,6 +392,15 @@
 // CA55-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"cortex-a55"
 // CA55-BE-TUNE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"generic"
 
+// RUN: %clang -target aarch64 -mcpu=cortex-a510 -### -c %s 2>&1 | FileCheck 
-check-prefix=CORTEX-A510 %s
+// CORTEX-A510: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" 
"cortex-a510"
+// CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sm4"
+// CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sha3"
+// CORTEX-A510-NOT: "-target-feature" "{{[+-]}}aes"
+// CORTEX-A510-SAME: {{$}}
+// RUN: %clang -target aarch64 -mcpu=cortex-a510+crypto -### -c %s 2>&1 | 
FileCheck -check-prefix=CORTEX-A510-CRYPTO %s
+// CORTEX-A510-CRYPTO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" 
"-target-feature" "+aes"
+
 // RUN: %clang -target aarch64_be -mcpu=cortex-a57 -### -c %s 2>&1 | FileCheck 
-check-prefix=CA57-BE %s
 // RUN: %clang -target aarch64 -mbig-endian -mcpu=cortex-a57 -### -c %s 2>&1 | 
FileCheck -check-prefix=CA57-BE %s
 // RUN: %clang -target aarch64_be -mbig-endian -mcpu=cortex-a57 -### -c %s 
2>&1 | FileCheck -check-prefix=CA57-BE %s

diff  --git a/llvm/include/llvm/Support/AArch64TargetParser.def 
b/llvm/include/llvm/Support/AArch64TargetParser.def
index 1e27b0f80dd18..a87d7e83981a6 100644
--- a/llvm/include/llvm/Support/AArch64TargetParser.def
+++ b/llvm/include/llvm/Support/AArch64TargetParser.def
@@ -144,6 +144,10 @@ AARCH64_CPU_NAME("cortex-a53", ARMV8A, 
FK_CRYPTO_NEON_FP_ARMV8, true,
  (AArch64::AEK_CRC))
 AARCH64_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
  (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | 
AArch64::AEK_RCPC))
+AARCH64_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false,
+ (AArch64::AEK_BF16 | AArch64::AEK_I8MM | 
AArch64::AEK_SVE2BITPERM |
+  AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS |
+  AArch64::AEK_SB | AArch64::AEK_FP16FML))
 AARCH64_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
  (AArch64::AEK_CRC))
 AARCH64_CPU_NAME("cortex-a65", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index 4ea1bf2889ba6..d401a9d29bae1 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -634,6 +634,22 @@ def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", 
"CortexA55",
FeatureFuseAddress,
]>;
 
+def ProcA510: SubtargetFeature<"a510", "ARMProcFamily", "CortexA510",
+   "Cortex-A510 ARM processors", [
+   HasV9_0aOps,
+   FeatureNEON,
+   FeaturePerfMon,
+   FeatureMatMulInt8,
+   FeatureBF16,
+   FeatureAM,
+   FeatureMTE,
+   FeatureETE,
+   FeatureSVE2BitPerm,
+   FeatureFP16FML,
+

[PATCH] D111654: [analyzer] Retrieve a value from list initialization of multi-dimensional array declaration.

2021-10-15 Thread Denys Petrov via Phabricator via cfe-commits

ASDenysPetrov added a comment.

In D111654#3060822 , @martong wrote:

> Could you please rebase on top of D111542 ? 
> That would make the changes direct and clear and the review would be easier.

OK. I'll rebase.


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[PATCH] D111542: [analyzer] Retrieve incomplete array extent from its redeclaration.

2021-10-15 Thread Denys Petrov via Phabricator via cfe-commits

ASDenysPetrov added inline comments.



Comment at: clang/lib/StaticAnalyzer/Core/RegionStore.cpp:1669-1711
   // The array index has to be known.
   if (auto CI = R->getIndex().getAs()) {
-// If it is not an array, return Undef.
-QualType T = VD->getType();
-const ConstantArrayType *CAT = Ctx.getAsConstantArrayType(T);
-if (!CAT)
-  return UndefinedVal();
-
-// Support one-dimensional array.
-// C++20 [expr.add] 7.6.6.4 (excerpt):
-//   If P points to an array element i of an array object x with n
-//   elements, where i < 0 or i > n, the behavior is undefined.
-//   Dereferencing is not allowed on the "one past the last
-//   element", when i == n.
-// Example:
-//   const int arr[4] = {1, 2};
-//   const int *ptr = arr;
-//   int x0 = ptr[0]; // 1
-//   int x1 = ptr[1]; // 2
-//   int x2 = ptr[2]; // 0
-//   int x3 = ptr[3]; // 0
-//   int x4 = ptr[4]; // UB
-// TODO: Support multidimensional array.
-if (!isa(CAT->getElementType())) {
-  // One-dimensional array.
-  const llvm::APSInt  = CI->getValue();
-  const auto I = static_cast(Idx.getExtValue());
-  // Use `getZExtValue` because array extent can not be negative.
-  const uint64_t Extent = CAT->getSize().getZExtValue();
-  // Check for `Idx < 0`, NOT for `I < 0`, because `Idx` CAN be
-  // negative, but `I` can NOT.
-  if (Idx < 0 || I >= Extent)
-return UndefinedVal();
-
-  // C++20 [expr.add] 9.4.17.5 (excerpt):
-  //   i-th array element is value-initialized for each k < i ≤ n,
-  //   where k is an expression-list size and n is an array extent.
-  if (I >= InitList->getNumInits())
-return svalBuilder.makeZeroVal(R->getElementType());
-
-  // Return a constant value, if it is presented.
-  // FIXME: Support other SVals.
-  const Expr *E = InitList->getInit(I);
-  if (Optional V = svalBuilder.getConstantVal(E))
-return *V;
+// We treat only ConstantArrayType.
+const QualType T = VD->getType();
+if (const ConstantArrayType *CAT = Ctx.getAsConstantArrayType(T)) {
+  // Support one-dimensional array.
+  // C++20 [expr.add] 7.6.6.4 (excerpt):

martong wrote:
> Denys, I suppose we could replace the whole inner block with a function? 
> Similarly to `getSValFromStringLiteralByIndex` from D107339 . That could 
> greatly increase readability.
Make sense. I'll carry this block out.



Comment at: clang/test/Analysis/initialization.c:101-102
+
+const int glob_arr3[];  // Incomplete array declaration
+const int glob_arr3[4] = {1, 2, 3}; // Incomplete Array redeclaration
+void foo() {

steakhal wrote:
> ASDenysPetrov wrote:
> > martong wrote:
> > > I'd like to see some more elaborate test cases. Notably
> > > ```
> > > const int glob_arr3[];  // Incomplete array declaration
> > > const int glob_arr3[4] = {1, 2, 3}; // Incomplete Array redeclaration
> > > const int glob_arr3[];  // Incomplete array redeclaration
> > > ```
> > > here neither the canonical nor the most recent decl have the initexpr.
> > > And I think this is what @balazske tried to point out.
> > Exactly. I'll add this particular case, but I should mention that **AST** 
> > surprisingly shows the third redeclaration as `ConstantArrayType` with the 
> > extent. Thus, it works for the current fix.
> > ```
> > |-VarDecl 0xc0725b0  col:11 glob_arr3 'const int []'
> > |-VarDecl 0xc072700 prev 0xc0725b0  col:11 glob_arr3 
> > 'const int [4]' cinit
> > | `-InitListExpr 0xc072830  'const int [4]'
> > |   |-array_filler: ImplicitValueInitExpr 0xc0728a8 <> 'const 
> > int'
> > |   |-IntegerLiteral 0xc072768  'int' 1
> > |   |-IntegerLiteral 0xc072788  'int' 2
> > |   `-IntegerLiteral 0xc0727a8  'int' 3
> > `-VarDecl 0xc0728e0 prev 0xc072700  col:11 glob_arr3 
> > 'const int [4]'
> > ```
> So, the redeclaration actually changed the type to `ConstantArrayType`. If 
> so, you should probably mention this in the comment.
OK, I'll mention.


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[PATCH] D110357: [Analyzer] Extend ConstraintAssignor to handle remainder op

2021-10-15 Thread Balázs Benics via Phabricator via cfe-commits

steakhal added a comment.

Additionally to my previous observation, a surprising amount of the new 
findings are of `deadcode` detections, and most of them there are loops.

Other than that, I've seen a true-positive report as well:
F19624854: image.png 
At line 'A', on the path where `valid_modulus` is assumed to be `true`, we now 
correctly constrain `spec->modulus` to zero. The only problem is that we never 
mention this in the bugreport xD
That being said, I would recommend introducing a bug-report visitor to 
complement this surprising behavior, OR somehow add a NoteTag to this 
transition where this operation gets evaluated.

I suspect we will need to tune the trackExpressionValue stuff to keep up, 
whenever we extend `ConstraintAssignor`.


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[PATCH] D111883: [Parse] Improve diagnostic and recoveryy when there is an extra override in the outline method definition.

2021-10-15 Thread Haojian Wu via Phabricator via cfe-commits

hokein created this revision.
hokein added a reviewer: sammccall.
hokein requested review of this revision.
Herald added a project: clang.

The clang behavior was poor before this patch:

  void B::foo() override {}
  // Before: clang emited "expcted function body after function
  // declarator", and skiped all contents until it hits a ";", the
  // following function f() is discarded.
  
  // VS
  
  // Nnow "override is not allowed" with a remove fixit, and following f()
  // is retained.
  void f();


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Files:
  clang/include/clang/Basic/DiagnosticParseKinds.td
  clang/lib/Parse/ParseDecl.cpp
  clang/test/Parser/cxx-extra-virtual-specifiers.cpp


Index: clang/test/Parser/cxx-extra-virtual-specifiers.cpp
===
--- /dev/null
+++ clang/test/Parser/cxx-extra-virtual-specifiers.cpp
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -fdiagnostics-parseable-fixits %s
+
+class A {
+  virtual void foo();
+};
+class B : public A {
+  void foo() override;
+};
+
+void B::foo() override {} // expected-error {{'override' virt-specifier is not 
allowed outside a class definition}}
+  // CHECK: 
fix-it:"{{.*}}":{[[@LINE-1]]:15-[[@LINE-1]]:24}:""
+
+void f1() override; // expected-error {{'override' virt-specifier is not 
allowed}}
+
+void f2() override {} // expected-error {{'override' virt-specifier is not 
allowed}}
+
+void test() {
+  void f() override; // expected-error {{'override' virt-specifier is not 
allowed}}
+}
Index: clang/lib/Parse/ParseDecl.cpp
===
--- clang/lib/Parse/ParseDecl.cpp
+++ clang/lib/Parse/ParseDecl.cpp
@@ -2021,6 +2021,18 @@
   Actions.CodeCompleteAfterFunctionEquals(D);
   return nullptr;
 }
+// We're at the point where the parsing of function declarator is finished.
+//
+// A common error is that users accidently add a virtual specifier
+// (e.g. override) in an out-line method definition.
+// We attempt to recover by stripping all these specifiers coming after
+// the declarator.
+while (auto Specifier = isCXX11VirtSpecifier()) {
+  Diag(Tok, diag::err_virt_specifier_outside_class)
+  << VirtSpecifiers::getSpecifierName(Specifier)
+  << FixItHint::CreateRemoval(Tok.getLocation());
+  ConsumeToken();
+}
 // Look at the next token to make sure that this isn't a function
 // declaration.  We have to check this because __attribute__ might be the
 // start of a function definition in GCC-extended K C.
Index: clang/include/clang/Basic/DiagnosticParseKinds.td
===
--- clang/include/clang/Basic/DiagnosticParseKinds.td
+++ clang/include/clang/Basic/DiagnosticParseKinds.td
@@ -944,6 +944,9 @@
 def err_duplicate_virt_specifier : Error<
   "class member already marked '%0'">;
 
+def err_virt_specifier_outside_class : Error<
+  "'%0' virt-specifier is not allowed outside a class definition">;
+
 def err_expected_parameter_pack : Error<
   "expected the name of a parameter pack">;
 def err_paren_sizeof_parameter_pack : Error<


Index: clang/test/Parser/cxx-extra-virtual-specifiers.cpp
===
--- /dev/null
+++ clang/test/Parser/cxx-extra-virtual-specifiers.cpp
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -fdiagnostics-parseable-fixits %s
+
+class A {
+  virtual void foo();
+};
+class B : public A {
+  void foo() override;
+};
+
+void B::foo() override {} // expected-error {{'override' virt-specifier is not allowed outside a class definition}}
+  // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:15-[[@LINE-1]]:24}:""
+
+void f1() override; // expected-error {{'override' virt-specifier is not allowed}}
+
+void f2() override {} // expected-error {{'override' virt-specifier is not allowed}}
+
+void test() {
+  void f() override; // expected-error {{'override' virt-specifier is not allowed}}
+}
Index: clang/lib/Parse/ParseDecl.cpp
===
--- clang/lib/Parse/ParseDecl.cpp
+++ clang/lib/Parse/ParseDecl.cpp
@@ -2021,6 +2021,18 @@
   Actions.CodeCompleteAfterFunctionEquals(D);
   return nullptr;
 }
+// We're at the point where the parsing of function declarator is finished.
+//
+// A common error is that users accidently add a virtual specifier
+// (e.g. override) in an out-line method definition.
+// We attempt to recover by stripping all these specifiers coming after
+// the declarator.
+while (auto Specifier = isCXX11VirtSpecifier()) {
+  Diag(Tok, diag::err_virt_specifier_outside_class)
+  << VirtSpecifiers::getSpecifierName(Specifier)
+  << FixItHint::CreateRemoval(Tok.getLocation());
+  ConsumeToken();
+}
 // Look at the

[PATCH] D110614: [clang-tidy] Fix false positives in cppcoreguidelines-virtual-class-destructor

2021-10-15 Thread Aaron Ballman via Phabricator via cfe-commits

aaron.ballman accepted this revision.
aaron.ballman added a comment.
This revision is now accepted and ready to land.

LGTM, unless @whisperity sees something else of concern.




Comment at: 
clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-virtual-class-destructor.cpp:208
+// Forward declarations
+// CHECK-MESSAGES-NOT: :[[@LINE+1]]:8: warning: destructor of 
'ForwardDeclaredStruct' is public and non-virtual 
[cppcoreguidelines-virtual-class-destructor]
+struct ForwardDeclaredStruct;

carlosgalvezp wrote:
> whisperity wrote:
> > What does this prefix do? (I've never seen this before! )
> I got the tip from @aaron.ballman :) Most likely it's not technically needed 
> (the tests would catch unexpected warnings) but it expresses more clearly the 
> expectations.
It's a feature of `%check_clang_tidy` from the test file -- it explicitly 
checks that no such message was produced in output (otherwise, if a diagnostic 
was emitted, we wouldn't fail the test unless it failed one of the `CHECK` 
lines).


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[PATCH] D110357: [Analyzer] Extend ConstraintAssignor to handle remainder op

2021-10-15 Thread Balázs Benics via Phabricator via cfe-commits

steakhal accepted this revision.
steakhal added a comment.

In D110357#3066207 , @ASDenysPetrov 
wrote:

> Ok. Let's see what the benefits it brings.

According to our measurements, it has some effects but is probably difficult to 
draw clear conclusions.
By using the github/martong/constraint_assignor_rem 
,
 it seems like the runtime is within measurable errors, and the memory 
consumption and the total result count remained approximately the same.

F19624597: image.png 
F19624602: image.png 
F19624615: image.png 

It seems like we have more results since we more often have more concrete 
values instead of unsimplified symbols, which makes the analyzer 'smarter' and 
reports more problems. At least, that's my theory.
Sorry for not sharing directly the csa-testbench summary HTML, but that could 
contain sensitive information.
If you require, I could repeat the test and publish the results to the publicly 
reachable demo server to let you all inspect and verify my theory.


Repository:
  rG LLVM Github Monorepo

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