Author: Thomas Lively Date: 2020-05-19T12:50:44-07:00 New Revision: 3181273be73ac798c3d5b9081dd53d87a31c91b3
URL: https://github.com/llvm/llvm-project/commit/3181273be73ac798c3d5b9081dd53d87a31c91b3 DIFF: https://github.com/llvm/llvm-project/commit/3181273be73ac798c3d5b9081dd53d87a31c91b3.diff LOG: [WebAssembly] Implement i64x2.mul and remove i8x16.mul Summary: This reflects changes in the spec proposal made since basic arithmetic was first implemented. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D80174 Added: Modified: clang/lib/Headers/wasm_simd128.h llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td llvm/test/CodeGen/WebAssembly/simd-arith.ll llvm/test/CodeGen/WebAssembly/simd-unsupported.ll llvm/test/MC/WebAssembly/simd-encodings.s Removed: ################################################################################ diff --git a/clang/lib/Headers/wasm_simd128.h b/clang/lib/Headers/wasm_simd128.h index d79b83b21c0e..580aa1e85c1b 100644 --- a/clang/lib/Headers/wasm_simd128.h +++ b/clang/lib/Headers/wasm_simd128.h @@ -637,11 +637,6 @@ wasm_u8x16_sub_saturate(v128_t __a, v128_t __b) { (__i8x16)__b); } -static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_mul(v128_t __a, - v128_t __b) { - return (v128_t)((__u8x16)__a * (__u8x16)__b); -} - static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min(v128_t __a, v128_t __b) { return (v128_t)__builtin_wasm_min_s_i8x16((__i8x16)__a, (__i8x16)__b); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 2ad2ae6413d5..bf4a0da31062 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -153,9 +153,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( MVT::v2f64}) setOperationAction(Op, T, Custom); - // There is no i64x2.mul instruction - // TODO: Actually, there is now. Implement it. - setOperationAction(ISD::MUL, MVT::v2i64, Expand); + // There is no i8x16.mul instruction + setOperationAction(ISD::MUL, MVT::v16i8, Expand); // There are no vector select instructions for (auto Op : {ISD::VSELECT, ISD::SELECT_CC, ISD::SELECT}) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 4236d9095c97..7faae22424fb 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -673,6 +673,12 @@ def : Pat<(v2i64 (shifts[0] (v2i64 V128:$vec), I32:$x)), // Integer binary arithmetic //===----------------------------------------------------------------------===// +multiclass SIMDBinaryIntNoI8x16<SDNode node, string name, bits<32> baseInst> { + defm "" : SIMDBinary<v8i16, "i16x8", node, name, !add(baseInst, 32)>; + defm "" : SIMDBinary<v4i32, "i32x4", node, name, !add(baseInst, 64)>; + defm "" : SIMDBinary<v2i64, "i64x2", node, name, !add(baseInst, 96)>; +} + multiclass SIMDBinaryIntSmall<SDNode node, string name, bits<32> baseInst> { defm "" : SIMDBinary<v16i8, "i8x16", node, name, baseInst>; defm "" : SIMDBinary<v8i16, "i16x8", node, name, !add(baseInst, 32)>; @@ -704,7 +710,7 @@ defm SUB_SAT_U : // Integer multiplication: mul let isCommutable = 1 in -defm MUL : SIMDBinaryIntNoI64x2<mul, "mul", 117>; +defm MUL : SIMDBinaryIntNoI8x16<mul, "mul", 117>; // Integer min_s / min_u / max_s / max_u let isCommutable = 1 in { diff --git a/llvm/test/CodeGen/WebAssembly/simd-arith.ll b/llvm/test/CodeGen/WebAssembly/simd-arith.ll index d616828c51e3..c56566991a8c 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-arith.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-arith.ll @@ -37,11 +37,12 @@ define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) { ret <16 x i8> %a } +; i8x16.mul is not in spec ; CHECK-LABEL: mul_v16i8: ; NO-SIMD128-NOT: i8x16 -; SIMD128-NEXT: .functype mul_v16i8 (v128, v128) -> (v128){{$}} -; SIMD128-NEXT: i8x16.mul $push[[R:[0-9]+]]=, $0, $1{{$}} -; SIMD128-NEXT: return $pop[[R]]{{$}} +; SIMD128-NOT: i8x16.mul +; SIMD128: i8x16.extract_lane_u +; SIMD128: i32.mul define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = mul <16 x i8> %x, %y ret <16 x i8> %a @@ -956,12 +957,11 @@ define <2 x i64> @sub_v2i64(<2 x i64> %x, <2 x i64> %y) { ret <2 x i64> %a } -; v2i64.mul is not in spec ; CHECK-LABEL: mul_v2i64: ; NO-SIMD128-NOT: i64x2 -; SIMD128-NOT: i64x2.mul -; SIMD128: i64x2.extract_lane -; SIMD128: i64.mul +; SIMD128-NEXT: .functype mul_v2i64 (v128, v128) -> (v128){{$}} +; SIMD128: i64x2.mul $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @mul_v2i64(<2 x i64> %x, <2 x i64> %y) { %a = mul <2 x i64> %x, %y ret <2 x i64> %a diff --git a/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll b/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll index ae2b7a11fb4c..dbe426b07515 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll @@ -308,7 +308,8 @@ define <2 x i64> @cttz_v2i64_undef(<2 x i64> %x) { } ; CHECK-LABEL: ctpop_v2i64: -; CHECK: i64.popcnt +; Note: expansion does not use i64.popcnt +; CHECK: v128.and declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) define <2 x i64> @ctpop_v2i64(<2 x i64> %x) { %v = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %x) diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s index d9fa969eeaee..fc06e5c0ae45 100644 --- a/llvm/test/MC/WebAssembly/simd-encodings.s +++ b/llvm/test/MC/WebAssembly/simd-encodings.s @@ -328,9 +328,6 @@ main: # CHECK: i8x16.sub_saturate_u # encoding: [0xfd,0x73] i8x16.sub_saturate_u - # CHECK: i8x16.mul # encoding: [0xfd,0x75] - i8x16.mul - # CHECK: i8x16.min_s # encoding: [0xfd,0x76] i8x16.min_s @@ -508,6 +505,9 @@ main: # CHECK: i64x2.sub # encoding: [0xfd,0xd1,0x01] i64x2.sub + # CHECK: i64x2.mul # encoding: [0xfd,0xd5,0x01] + i64x2.mul + # CHECK: f32x4.abs # encoding: [0xfd,0xe0,0x01] f32x4.abs _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits