Re: [PATCH 1/5 v2] i2c/gpio: add DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 15:20 Wed 29 Feb , Jean-Christophe PLAGNIOL-VILLARD wrote:
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 Cc: Nicolas Ferre nicolas.fe...@atmel.com
 Cc: linux-...@vger.kernel.org
 Cc: devicetree-discuss@lists.ozlabs.org
 ---
 v2:
 
   use devm_kzalloc
   use i2c-gpio
   use time name in the properties
 is ok?

I need this for 3.4

Best Regars,
J.
  .../devicetree/bindings/gpio/gpio_i2c.txt  |   32 +++
  drivers/i2c/busses/i2c-gpio.c  |   95 +++
  2 files changed, 107 insertions(+), 20 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/gpio/gpio_i2c.txt
 
 diff --git a/Documentation/devicetree/bindings/gpio/gpio_i2c.txt 
 b/Documentation/devicetree/bindings/gpio/gpio_i2c.txt
 new file mode 100644
 index 000..27e1b1a
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/gpio/gpio_i2c.txt
 @@ -0,0 +1,32 @@
 +Device-Tree bindings for i2c gpio driver
 +
 +Required properties:
 + - compatible = i2c-gpio;
 + - gpios: sda and scl gpio
 +
 +
 +Optional properties:
 + - i2c-gpio,sda-open-drain: sda as open drain
 + - i2c-gpio,scl-open-drain: scl as open drain
 + - i2c-gpio,scl-output-only: scl as output only
 + - udelay: delay between GPIO operations (may depend on each platform)
 + - i2c-algo-bit,timeout-milliseconds: timeout to get data
 +
 +Example nodes:
 +
 +i2c-gpio@0 {
 + compatible = i2c-gpio;
 + gpios = pioA 23 0 /* sda */
 +  pioA 24 0 /* scl */
 + ;
 + i2c-gpio,sda-open-drain;
 + i2c-gpio,scl-open-drain;
 + udelay = 2;   /* ~100 kHz */
 + #address-cells = 1;
 + #size-cells = 0;
 +
 + rv3029c2@56 {
 + compatible = rv3029c2;
 + reg = 0x56;
 + };
 +};
 diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
 index a651779..71adba5 100644
 --- a/drivers/i2c/busses/i2c-gpio.c
 +++ b/drivers/i2c/busses/i2c-gpio.c
 @@ -14,8 +14,15 @@
  #include linux/module.h
  #include linux/slab.h
  #include linux/platform_device.h
 +#include linux/gpio.h
 +#include linux/of_gpio.h
 +#include linux/of_i2c.h
  
 -#include asm/gpio.h
 +struct i2c_gpio_private_data {
 + struct i2c_adapter adap;
 + struct i2c_algo_bit_data bit_data;
 + struct i2c_gpio_platform_data pdata;
 +};
  
  /* Toggle SDA by changing the direction of the pin */
  static void i2c_gpio_setsda_dir(void *data, int state)
 @@ -78,24 +85,63 @@ static int i2c_gpio_getscl(void *data)
   return gpio_get_value(pdata-scl_pin);
  }
  
 +static int __devinit of_i2c_gpio_probe(struct device_node *np,
 +  struct i2c_gpio_platform_data *pdata)
 +{
 + u32 reg;
 +
 + if (of_gpio_count(np)  2)
 + return -ENODEV;
 +
 + pdata-sda_pin = of_get_gpio(np, 0);
 + pdata-scl_pin = of_get_gpio(np, 1);
 +
 + if (pdata-sda_pin  0 || pdata-scl_pin  0) {
 + pr_err(%s: invalid GPIO pins, sda=%d/scl=%d\n,
 +np-full_name, pdata-sda_pin, pdata-scl_pin);
 + return -ENODEV;
 + }
 +
 + if (of_property_read_u32(np, udelay, reg))
 + pdata-udelay = reg;
 +
 + if (of_property_read_u32(np, i2c-algo-bit,timeout-milliseconds, reg))
 + pdata-timeout = msecs_to_jiffies(reg);
 +
 + pdata-sda_is_open_drain =
 + !!of_property_read_bool(np, i2c-gpio,sda-open-drain);
 + pdata-scl_is_open_drain =
 + !!of_property_read_bool(np, i2c-gpio,scl-open-drain);
 + pdata-scl_is_output_only =
 + !!of_property_read_bool(np, i2c-gpio,scl-output-only);
 +
 + return 0;
 +}
 +
  static int __devinit i2c_gpio_probe(struct platform_device *pdev)
  {
 + struct i2c_gpio_private_data *priv;
   struct i2c_gpio_platform_data *pdata;
   struct i2c_algo_bit_data *bit_data;
   struct i2c_adapter *adap;
   int ret;
  
 - pdata = pdev-dev.platform_data;
 - if (!pdata)
 - return -ENXIO;
 + priv = devm_kzalloc(pdev-dev, sizeof(*priv), GFP_KERNEL);
 + if (!priv)
 + return -ENOMEM;
 + adap = priv-adap;
 + bit_data = priv-bit_data;
 + pdata = priv-pdata;
  
 - ret = -ENOMEM;
 - adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
 - if (!adap)
 - goto err_alloc_adap;
 - bit_data = kzalloc(sizeof(struct i2c_algo_bit_data), GFP_KERNEL);
 - if (!bit_data)
 - goto err_alloc_bit_data;
 + if (pdev-dev.of_node) {
 + ret = of_i2c_gpio_probe(pdev-dev.of_node, pdata);
 + if (ret)
 + return ret;
 + } else {
 + if (!pdev-dev.platform_data)
 + return -ENXIO;
 + memcpy(pdata, pdev-dev.platform_data, sizeof(*pdata));
 + }
  
   ret = gpio_request(pdata-sda_pin, sda);
   if (ret)
 @@ -143,6 +189,7 @@ static int __devinit i2c_gpio_probe(struct 
 platform_device *pdev)
   

Re: [PULL] of nand generic binding

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 16:25 Wed 29 Feb , Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 16:57 Fri 17 Feb , Jean-Christophe PLAGNIOL-VILLARD wrote:
  HI,
  
  please find attached the generic binding for the MTD nand
  
  This will add boolean and nand helpers
 is it ok?
I need this for 3.4

will you apply it or can I apply it via AT91

Best Regards,
J.
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[PATCH 0/9 v2] at91 USB DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
HI,

this is a second version of the patch series to add DT suport for
usb host and device on at91


The following changes since commit 3370718be26d86e7f8587390eee563c289542ee7:

  ARM: at91/dt: add Calao DAB-MMX daugther board support for USB-A9G20 
(2012-03-02 00:46:21 +0800)

are available in the git repository at:
  g...@github.com:at91linux/linux-at91.git ..BRANCH.NOT.VERIFIED..

Jean-Christophe PLAGNIOL-VILLARD (9):
  ARM: at91: usb ohci add dt support
  ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5
  ARM: at91: usb ehci add dt support
  ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5
  USB: at91: Device udc add dt support
  ARM: at91: sam9g20 udc add dt support
  usb: add Atmel USBA UDC DT support
  ARM: at91: sam9g45 add udc DT support
  ARM: at91: sam9x5 add udc DT support

 .../devicetree/bindings/usb/atmel-usb.txt  |  135 +
 arch/arm/boot/dts/at91sam9g20.dtsi |   14 ++
 arch/arm/boot/dts/at91sam9g25ek.dts|   17 ++
 arch/arm/boot/dts/at91sam9g45.dtsi |   80 
 arch/arm/boot/dts/at91sam9m10g45ek.dts |   15 ++
 arch/arm/boot/dts/at91sam9x5.dtsi  |   81 
 arch/arm/boot/dts/usb_a9g20.dts|   10 +
 arch/arm/mach-at91/at91sam9260.c   |1 +
 arch/arm/mach-at91/at91sam9g45.c   |4 +
 arch/arm/mach-at91/at91sam9x5.c|7 +-
 drivers/usb/Kconfig|2 +-
 drivers/usb/gadget/Kconfig |4 +-
 drivers/usb/gadget/at91_udc.c  |   40 -
 drivers/usb/gadget/atmel_usba_udc.c|  209 +++-
 drivers/usb/gadget/atmel_usba_udc.h|1 +
 drivers/usb/host/ehci-atmel.c  |   24 +++-
 drivers/usb/host/ohci-at91.c   |  101 ++-
 17 files changed, 688 insertions(+), 57 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/atmel-usb.txt

Best Regards,
J.
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[PATCH 3/9 v2] ARM: at91: usb ehci add dt support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
Cc: linux-...@vger.kernel.org
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org
---
 .../devicetree/bindings/usb/atmel-usb.txt  |   12 ++
 drivers/usb/host/ehci-atmel.c  |   24 +++-
 2 files changed, 35 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt 
b/Documentation/devicetree/bindings/usb/atmel-usb.txt
index 6c7f728..0143d7c 100644
--- a/Documentation/devicetree/bindings/usb/atmel-usb.txt
+++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
@@ -17,3 +17,15 @@ usb0: ohci@0050 {
interrupts = 20 4;
num-ports = 2;
 };
+
+EHCI
+
+Required properties:
+ - compatible: Should be atmel,at91sam9g45-ehci for USB controllers
+   used in host mode.
+
+usb1: ehci@0080 {
+   compatible = atmel,at91sam9g45-ehci, usb-ehci;
+   reg = 0x0080 0x10;
+   interrupts = 22 4;
+};
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index a5a3ef1..19f318a 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -13,6 +13,7 @@
 
 #include linux/clk.h
 #include linux/platform_device.h
+#include linux/of_platform.h
 
 /* interface and function clocks */
 static struct clk *iclk, *fclk;
@@ -115,6 +116,8 @@ static const struct hc_driver ehci_atmel_hc_driver = {
.clear_tt_buffer_complete   = ehci_clear_tt_buffer_complete,
 };
 
+static u64 at91_ehci_dma_mask = DMA_BIT_MASK(32);
+
 static int __devinit ehci_atmel_drv_probe(struct platform_device *pdev)
 {
struct usb_hcd *hcd;
@@ -137,6 +140,13 @@ static int __devinit ehci_atmel_drv_probe(struct 
platform_device *pdev)
goto fail_create_hcd;
}
 
+   /* Right now device-tree probed devices don't get dma_mask set.
+* Since shared usb code relies on it, set it here for now.
+* Once we have dma capability bindings this can go away.
+*/
+   if (!pdev-dev.dma_mask)
+   pdev-dev.dma_mask = at91_ehci_dma_mask;
+
hcd = usb_create_hcd(driver, pdev-dev, dev_name(pdev-dev));
if (!hcd) {
retval = -ENOMEM;
@@ -225,9 +235,21 @@ static int __devexit ehci_atmel_drv_remove(struct 
platform_device *pdev)
return 0;
 }
 
+#ifdef CONFIG_OF
+static const struct of_device_id atmel_ehci_dt_ids[] = {
+   { .compatible = atmel,at91sam9g45-ehci },
+   { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, atmel_ehci_dt_ids);
+#endif
+
 static struct platform_driver ehci_atmel_driver = {
.probe  = ehci_atmel_drv_probe,
.remove = __devexit_p(ehci_atmel_drv_remove),
.shutdown   = usb_hcd_platform_shutdown,
-   .driver.name= atmel-ehci,
+   .driver = {
+   .name   = atmel-ehci,
+   .of_match_table = of_match_ptr(atmel_ehci_dt_ids),
+   },
 };
-- 
1.7.7

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[PATCH 2/9 v2] ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
---
 arch/arm/boot/dts/at91sam9g20.dtsi |7 +++
 arch/arm/boot/dts/at91sam9g25ek.dts|8 
 arch/arm/boot/dts/at91sam9g45.dtsi |7 +++
 arch/arm/boot/dts/at91sam9m10g45ek.dts |6 ++
 arch/arm/boot/dts/at91sam9x5.dtsi  |7 +++
 arch/arm/boot/dts/usb_a9g20.dts|5 +
 arch/arm/mach-at91/at91sam9260.c   |1 +
 arch/arm/mach-at91/at91sam9g45.c   |1 +
 arch/arm/mach-at91/at91sam9x5.c|4 +++-
 9 files changed, 45 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi 
b/arch/arm/boot/dts/at91sam9g20.dtsi
index f803f31..8c5c175 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -188,6 +188,13 @@
;
status = disabled;
};
+
+   usb0: ohci@0050 {
+   compatible = atmel,at91rm9200-ohci, usb-ohci;
+   reg = 0x0050 0x10;
+   interrupts = 20 4;
+   status = disabled;
+   };
};
 
i2c-gpio@0 {
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts 
b/arch/arm/boot/dts/at91sam9g25ek.dts
index c7596bf..93d5e36 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -33,5 +33,13 @@
status = okay;
};
};
+
+   usb0: ohci@0060 {
+   status = okay;
+   num-ports = 2;
+   atmel,vbus-gpio = pioD 19 0
+  pioD 20 0
+ ;
+   };
};
 };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi 
b/arch/arm/boot/dts/at91sam9g45.dtsi
index 93e095b..db9a51a 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -196,6 +196,13 @@
;
status = disabled;
};
+
+   usb0: ohci@0070 {
+   compatible = atmel,at91rm9200-ohci, usb-ohci;
+   reg = 0x0070 0x10;
+   interrupts = 22 4;
+   status = disabled;
+   };
};
 
i2c-gpio@0 {
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts 
b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 62ceffe..ce4640e 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -57,7 +57,13 @@
label = data;
reg = 0x400 0xC00;
};
+   };
 
+   usb0: ohci@0070 {
+   status = okay;
+   num-ports = 2;
+   atmel,vbus-gpio = pioD 1 0
+  pioD 3 0;
};
};
 
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi 
b/arch/arm/boot/dts/at91sam9x5.dtsi
index ad9570b..7b43014 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -187,6 +187,13 @@
;
status = disabled;
};
+
+   usb0: ohci@0060 {
+   compatible = atmel,at91rm9200-ohci, usb-ohci;
+   reg = 0x0060 0x10;
+   interrupts = 22 4;
+   status = disabled;
+   };
};
 
i2c-gpio@0 {
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index 07012ca..55d0e54 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -73,6 +73,11 @@
reg = 0x7ca 0x836;
};
};
+
+   usb0: ohci@0050 {
+   num-ports = 2;
+   status = okay;
+   };
};
 
leds {
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 14b5a9c..d1e5750 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -216,6 +216,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(t0_clk, fffdc000.timer, tc3_clk),
CLKDEV_CON_DEV_ID(t1_clk, fffdc000.timer, tc4_clk),
CLKDEV_CON_DEV_ID(t2_clk, fffdc000.timer, tc5_clk),
+   CLKDEV_CON_DEV_ID(hclk, 50.ohci, ohci_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID(hclk, at91_ohci, ohci_clk),
CLKDEV_CON_ID(pioA, pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 0014573..f58775e 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ 

[PATCH 6/9] ARM: at91: sam9g20 udc add dt support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
---
 arch/arm/boot/dts/at91sam9g20.dtsi |7 +++
 arch/arm/boot/dts/usb_a9g20.dts|5 +
 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi 
b/arch/arm/boot/dts/at91sam9g20.dtsi
index 8c5c175..c030703 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -171,6 +171,13 @@
interrupts = 21 4;
status = disabled;
};
+
+   usb1: gadget@fffa4000 {
+   compatible = atmel,at91rm9200-udc;
+   reg = 0xfffa4000 0x4000;
+   interrupts = 10 4;
+   status = disabled;
+   };
};
 
nand0: nand@4000 {
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index 55d0e54..e4a732f 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -30,6 +30,11 @@
phy-mode = rmii;
status = okay;
};
+
+   usb1: gadget@fffa4000 {
+   atmel,vbus-gpio = pioC 5 0;
+   status = okay;
+   };
};
 
nand0: nand@4000 {
-- 
1.7.7

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[PATCH 1/9 v2] ARM: at91: usb ohci add dt support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
Cc: linux-...@vger.kernel.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org
---
 .../devicetree/bindings/usb/atmel-usb.txt  |   19 
 drivers/usb/host/ohci-at91.c   |  101 +++-
 2 files changed, 119 insertions(+), 1 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/atmel-usb.txt

diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt 
b/Documentation/devicetree/bindings/usb/atmel-usb.txt
new file mode 100644
index 000..6c7f728
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
@@ -0,0 +1,19 @@
+Atmel SOC USB controllers
+
+OHCI
+
+Required properties:
+ - compatible: Should be atmel,at91rm9200-ohci for USB controllers
+   used in host mode.
+ - num-ports: Number of ports.
+ - atmel,vbus-gpio: If present, specifies a gpio that needs to be
+   activated for the bus to be powered.
+ - atmel,oc-gpio: If present, specifies a gpio that needs to be
+   activated for the overcurrent detection.
+
+usb0: ohci@0050 {
+   compatible = atmel,at91rm9200-ohci, usb-ohci;
+   reg = 0x0050 0x10;
+   interrupts = 20 4;
+   num-ports = 2;
+};
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 8e855eb..db8963f 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -14,6 +14,8 @@
 
 #include linux/clk.h
 #include linux/platform_device.h
+#include linux/of_platform.h
+#include linux/of_gpio.h
 
 #include mach/hardware.h
 #include asm/gpio.h
@@ -477,13 +479,109 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int 
irq, void *data)
return IRQ_HANDLED;
 }
 
+#ifdef CONFIG_OF
+static const struct of_device_id at91_ohci_dt_ids[] = {
+   { .compatible = atmel,at91rm9200-ohci },
+   { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, at91_ohci_dt_ids);
+
+static u64 at91_ohci_dma_mask = DMA_BIT_MASK(32);
+
+static int __devinit ohci_at91_of_init(struct platform_device *pdev)
+{
+   struct device_node *np = pdev-dev.of_node;
+   int i, ret, gpio;
+   enum of_gpio_flags flags;
+   struct at91_usbh_data   *pdata;
+   u32 ports;
+
+   if (!np)
+   return 0;
+
+   /* Right now device-tree probed devices don't get dma_mask set.
+* Since shared usb code relies on it, set it here for now.
+* Once we have dma capability bindings this can go away.
+*/
+   if (!pdev-dev.dma_mask)
+   pdev-dev.dma_mask = at91_ohci_dma_mask;
+
+   pdata = devm_kzalloc(pdev-dev, sizeof(*pdata), GFP_KERNEL);
+   if (!pdata)
+   return -ENOMEM;
+
+   if (!of_property_read_u32(np, num-ports, ports))
+   pdata-ports = ports;
+
+   for (i = 0; i  2; i++) {
+   gpio = of_get_named_gpio_flags(np, atmel,vbus-gpio, i, 
flags);
+   pdata-vbus_pin[i] = gpio;
+   if (!gpio_is_valid(gpio))
+   continue;
+   pdata-vbus_pin_active_low[i] = flags  OF_GPIO_ACTIVE_LOW;
+   ret = gpio_request(gpio, ohci_vbus);
+   if (ret) {
+   dev_warn(pdev-dev, can't request vbus gpio %d, 
gpio);
+   continue;
+   }
+   ret = gpio_direction_output(gpio, !(flags  OF_GPIO_ACTIVE_LOW) 
^ 1);
+   if (ret)
+   dev_warn(pdev-dev, can't put vbus gpio %d as output 
%d,
+!(flags  OF_GPIO_ACTIVE_LOW) ^ 1, gpio);
+   }
+
+   for (i = 0; i  2; i++) {
+   gpio = of_get_named_gpio_flags(np, atmel,oc-gpio, i, flags);
+   pdata-overcurrent_pin[i] = gpio;
+   if (!gpio_is_valid(gpio))
+   continue;
+   ret = gpio_request(gpio, ohci_overcurrent);
+   if (ret) {
+   dev_err(pdev-dev, can't request overcurrent gpio 
%d, gpio);
+   continue;
+   }
+
+   ret = gpio_direction_input(gpio);
+   if (ret) {
+   dev_err(pdev-dev, can't configure overcurrent gpio 
%d as input, gpio);
+   continue;
+   }
+
+   ret = request_irq(gpio_to_irq(gpio),
+ ohci_hcd_at91_overcurrent_irq,
+ IRQF_SHARED, ohci_overcurrent, pdev);
+   if (ret) {
+   gpio_free(gpio);
+   dev_warn( pdev-dev, cannot get GPIO IRQ for 
overcurrent\n);
+   }
+   }
+
+   pdev-dev.platform_data = pdata;
+
+   return 0;
+}
+#else
+static int __devinit ohci_at91_of_init(struct platform_device *pdev)
+{
+   return 0;
+}
+#endif
+
 

[PATCH 4/9] ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
---
 arch/arm/boot/dts/at91sam9g25ek.dts|4 
 arch/arm/boot/dts/at91sam9g45.dtsi |7 +++
 arch/arm/boot/dts/at91sam9m10g45ek.dts |4 
 arch/arm/boot/dts/at91sam9x5.dtsi  |7 +++
 arch/arm/mach-at91/at91sam9g45.c   |1 +
 arch/arm/mach-at91/at91sam9x5.c|1 +
 drivers/usb/Kconfig|2 +-
 7 files changed, 25 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts 
b/arch/arm/boot/dts/at91sam9g25ek.dts
index 93d5e36..ac0dc00 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -41,5 +41,9 @@
   pioD 20 0
  ;
};
+
+   usb1: ehci@0070 {
+   status = okay;
+   };
};
 };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi 
b/arch/arm/boot/dts/at91sam9g45.dtsi
index db9a51a..4b54424 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -203,6 +203,13 @@
interrupts = 22 4;
status = disabled;
};
+
+   usb1: ehci@0080 {
+   compatible = atmel,at91sam9g45-ehci, usb-ehci;
+   reg = 0x0080 0x10;
+   interrupts = 22 4;
+   status = disabled;
+   };
};
 
i2c-gpio@0 {
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts 
b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index ce4640e..4b1eb36 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -65,6 +65,10 @@
atmel,vbus-gpio = pioD 1 0
   pioD 3 0;
};
+
+   usb1: ehci@0080 {
+   status = okay;
+   };
};
 
leds {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi 
b/arch/arm/boot/dts/at91sam9x5.dtsi
index 7b43014..ac3c96c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -194,6 +194,13 @@
interrupts = 22 4;
status = disabled;
};
+
+   usb1: ehci@0070 {
+   compatible = atmel,at91sam9g45-ehci, usb-ehci;
+   reg = 0x0070 0x10;
+   interrupts = 22 4;
+   status = disabled;
+   };
};
 
i2c-gpio@0 {
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index f58775e..df3bcea 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -233,6 +233,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(t0_clk, fff7c000.timer, tcb0_clk),
CLKDEV_CON_DEV_ID(t0_clk, fffd4000.timer, tcb0_clk),
CLKDEV_CON_DEV_ID(hclk, 70.ohci, uhphs_clk),
+   CLKDEV_CON_DEV_ID(ehci_clk, 80.ehci, uhphs_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID(hclk, at91_ohci, uhphs_clk),
CLKDEV_CON_ID(pioA, pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 40888ab..7333276 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -232,6 +232,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(hclk, f803.ethernet, macb1_clk),
CLKDEV_CON_DEV_ID(hclk, 60.ohci, uhphs_clk),
CLKDEV_CON_DEV_ID(ohci_clk, 60.ohci, uhphs_clk),
+   CLKDEV_CON_DEV_ID(ehci_clk, 70.ehci, uhphs_clk),
 };
 
 /*
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 75823a1..afee052 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -65,7 +65,7 @@ config USB_ARCH_HAS_EHCI
default y if PPC_MPC512x
default y if ARCH_IXP4XX
default y if ARCH_W90X900
-   default y if ARCH_AT91SAM9G45
+   default y if ARCH_AT91SAM9G45 || ARCH_AT91SAM9X5
default y if ARCH_MXC
default y if ARCH_OMAP3
default y if ARCH_CNS3XXX
-- 
1.7.7

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[PATCH 7/9] usb: add Atmel USBA UDC DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Allow to compile the driver all the time if AT91 enabled.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
Cc: linux-...@vger.kernel.org
---
Hi Greg

if it's ok with you I apply with the rest of the USB patch series via
at91

Best Regards,
J. .../devicetree/bindings/usb/atmel-usb.txt  |   86 
 drivers/usb/gadget/Kconfig |2 +-
 drivers/usb/gadget/atmel_usba_udc.c|  209 +++-
 drivers/usb/gadget/atmel_usba_udc.h|1 +
 4 files changed, 248 insertions(+), 50 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt 
b/Documentation/devicetree/bindings/usb/atmel-usb.txt
index 60bd215..b44f87e 100644
--- a/Documentation/devicetree/bindings/usb/atmel-usb.txt
+++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
@@ -47,3 +47,89 @@ usb1: gadget@fffa4000 {
interrupts = 10 4;
atmel,vbus-gpio = pioC 5 0;
 };
+
+Atmel High-Speed USB device controller
+
+Required properties:
+ - compatible: Should be atmel,at91sam9rl-udc
+ - reg: Address and length of the register set for the device
+ - interrupts: Should contain macb interrupt
+ - ep childnode: To specifiy the number of endpoints and their properties.
+
+Optional properties:
+ - atmel,vbus-gpio: If present, specifies a gpio that needs to be
+   activated for the bus to be powered.
+
+Required child node properties:
+ - name: Name of the endpoint.
+ - reg: Num of the endpoint.
+ - atmel,fifo-size: Size of the fifo.
+ - atmel,nb-banks: Number of banks.
+ - atmel,can-dma: Boolean to specify if the endpoint support DMA.
+ - atmel,can-isoc: Boolean to specify if the endpoint support ISOC.
+
+usb2: gadget@fff78000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = atmel,at91sam9rl-udc;
+   reg = 0x0060 0x8
+  0xfff78000 0x400;
+   interrupts = 27 4;
+   atmel,vbus-gpio = pioB 19 0;
+
+   ep0 {
+   reg = 0;
+   atmel,fifo-size = 64;
+   atmel,nb-banks = 1;
+   atmel,can-dma = 0;
+   atmel,can-isoc = 0;
+   };
+
+   ep1 {
+   reg = 1;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 2;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep2 {
+   reg = 2;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 2;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep3 {
+   reg = 3;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 0;
+   };
+
+   ep4 {
+   reg = 4;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 0;
+   };
+
+   ep5 {
+   reg = 5;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep6 {
+   reg = 6;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+};
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index edf1144..1dbba6c 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -150,7 +150,7 @@ config USB_AT91
 config USB_ATMEL_USBA
tristate Atmel USBA
select USB_GADGET_DUALSPEED
-   depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
+   depends on AVR32 || ARCH_AT91
help
  USBA is the integrated high-speed USB Device controller on
  the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
diff --git a/drivers/usb/gadget/atmel_usba_udc.c 
b/drivers/usb/gadget/atmel_usba_udc.c
index ce9dffb..234eabb 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -21,6 +21,8 @@
 #include linux/usb/gadget.h
 #include linux/usb/atmel_usba_udc.h
 #include linux/delay.h
+#include linux/of.h
+#include linux/of_gpio.h
 
 #include asm/gpio.h
 #include mach/board.h
@@ -1885,9 +1887,143 @@ static int atmel_usba_stop(struct usb_gadget_driver 
*driver)
return 0;
 }
 
-static int __init usba_udc_probe(struct platform_device *pdev)
+#ifdef CONFIG_OF
+static struct usba_ep * __devinit atmel_udc_of_init(struct platform_device 
*pdev,
+   struct usba_udc *udc)
+{
+   u32 val;
+   const char *name;
+   enum of_gpio_flags flags;
+   struct device_node *np = pdev-dev.of_node;
+   struct device_node *pp;
+   int i, ret;
+   struct usba_ep *eps, *ep;
+
+   udc-num_ep = 0;
+
+   udc-vbus_pin = 

[PATCH 9/9] ARM: at91: sam9x5 add udc DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
---
 arch/arm/boot/dts/at91sam9g25ek.dts |5 +++
 arch/arm/boot/dts/at91sam9x5.dtsi   |   67 +++
 arch/arm/mach-at91/at91sam9x5.c |2 +
 3 files changed, 74 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts 
b/arch/arm/boot/dts/at91sam9g25ek.dts
index ac0dc00..8e949d3 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -32,6 +32,11 @@
phy-mode = rmii;
status = okay;
};
+
+   usb2: gadget@f803c000 {
+   atmel,vbus-gpio = pioB 16 0;
+   status = okay;
+   };
};
 
usb0: ohci@0060 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi 
b/arch/arm/boot/dts/at91sam9x5.dtsi
index ac3c96c..0579698 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -171,6 +171,73 @@
interrupts = 27 4;
status = disabled;
};
+
+   usb2: gadget@f803c000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = atmel,at91sam9rl-udc;
+   reg = 0x0050 0x8
+  0xf803c000 0x400;
+   interrupts = 23 4;
+   status = disabled;
+
+   ep0 {
+   reg = 0;
+   atmel,fifo-size = 64;
+   atmel,nb-banks = 1;
+   atmel,can-dma = 0;
+   atmel,can-isoc = 0;
+   };
+
+   ep1 {
+   reg = 1;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 2;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep2 {
+   reg = 2;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 2;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep3 {
+   reg = 3;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 0;
+   };
+
+   ep4 {
+   reg = 4;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 0;
+   };
+
+   ep5 {
+   reg = 5;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep6 {
+   reg = 6;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+   };
+
};
 
nand0: nand@4000 {
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 7333276..66f2cb5 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -233,6 +233,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(hclk, 60.ohci, uhphs_clk),
CLKDEV_CON_DEV_ID(ohci_clk, 60.ohci, uhphs_clk),
CLKDEV_CON_DEV_ID(ehci_clk, 70.ehci, uhphs_clk),
+   CLKDEV_CON_DEV_ID(hclk, 50.gadget, utmi_clk),
+   CLKDEV_CON_DEV_ID(pclk, 50.gadget, udphs_clk),
 };
 
 /*
-- 
1.7.7

___

[PATCH 8/9] ARM: at91: sam9g45 add udc DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Nicolas Ferre nicolas.fe...@atmel.com
---
 arch/arm/boot/dts/at91sam9g45.dtsi |   66 
 arch/arm/boot/dts/at91sam9m10g45ek.dts |5 ++
 arch/arm/mach-at91/at91sam9g45.c   |2 +
 3 files changed, 73 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi 
b/arch/arm/boot/dts/at91sam9g45.dtsi
index 4b54424..98407c7 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -179,6 +179,72 @@
interrupts = 25 4;
status = disabled;
};
+
+   usb2: gadget@fff78000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = atmel,at91sam9rl-udc;
+   reg = 0x0060 0x8
+  0xfff78000 0x400;
+   interrupts = 27 4;
+   status = disabled;
+
+   ep0 {
+   reg = 0;
+   atmel,fifo-size = 64;
+   atmel,nb-banks = 1;
+   atmel,can-dma = 0;
+   atmel,can-isoc = 0;
+   };
+
+   ep1 {
+   reg = 1;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 2;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep2 {
+   reg = 2;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 2;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep3 {
+   reg = 3;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 0;
+   };
+
+   ep4 {
+   reg = 4;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 0;
+   };
+
+   ep5 {
+   reg = 5;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+
+   ep6 {
+   reg = 6;
+   atmel,fifo-size = 1024;
+   atmel,nb-banks = 3;
+   atmel,can-dma = 1;
+   atmel,can-isoc = 1;
+   };
+   };
};
 
nand0: nand@4000 {
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts 
b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 4b1eb36..6dd2044 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -35,6 +35,11 @@
phy-mode = rmii;
status = okay;
};
+
+   usb2: gadget@fff78000 {
+   atmel,vbus-gpio = pioB 19 0;
+   status = okay;
+   };
};
 
nand0: nand@4000 {
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index df3bcea..da80f0c 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -234,6 +234,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(t0_clk, fffd4000.timer, tcb0_clk),
CLKDEV_CON_DEV_ID(hclk, 70.ohci, uhphs_clk),
CLKDEV_CON_DEV_ID(ehci_clk, 80.ehci, uhphs_clk),
+   CLKDEV_CON_DEV_ID(hclk, 60.gadget, utmi_clk),
+   CLKDEV_CON_DEV_ID(pclk, 60.gadget, udphs_clk),
/* fake hclk clock */

Re: [PATCH 1/9 v2] ARM: at91: usb ohci add dt support

2012-03-07 Thread Russell King - ARM Linux
On Wed, Mar 07, 2012 at 10:15:38AM +0100, Jean-Christophe PLAGNIOL-VILLARD 
wrote:
 +static u64 at91_ohci_dma_mask = DMA_BIT_MASK(32);
 +
 +static int __devinit ohci_at91_of_init(struct platform_device *pdev)
 +{
 + struct device_node *np = pdev-dev.of_node;
 + int i, ret, gpio;
 + enum of_gpio_flags flags;
 + struct at91_usbh_data   *pdata;
 + u32 ports;
 +
 + if (!np)
 + return 0;
 +
 + /* Right now device-tree probed devices don't get dma_mask set.
 +  * Since shared usb code relies on it, set it here for now.
 +  * Once we have dma capability bindings this can go away.
 +  */
 + if (!pdev-dev.dma_mask)
 + pdev-dev.dma_mask = at91_ohci_dma_mask;

That sounds like a rather big omission from DT - what's happening to
address this (before we end up with lots of drivers with this).  Pretty
much any device which does DMA needs both this and the coherent DMA mask
set properly.

We really don't want this kind of workaround scattered in every driver
which has been converted to DT.
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[PATCH 1/1] of: add dma-mask binding

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
This will allow each device to specify its dma-mask
The microblaze architecture hook is keep temporary if no dma-mask is specified
int the DT

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
 drivers/of/platform.c |   26 +-
 1 files changed, 25 insertions(+), 1 deletions(-)

diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index cae9477..bb22194 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -121,6 +121,26 @@ void of_device_make_bus_id(struct device *dev)
dev_set_name(dev, %s.%d, node-name, magic - 1);
 }
 
+static u64* of_get_dma_mask(struct device_node *np)
+{
+   const __be32 *prop;
+   int len;
+   u64 *dma_mask;
+
+   prop = of_get_property(np, dma-mask, len);
+
+   if (!prop)
+   return NULL;
+
+   dma_mask = kzalloc(sizeof(u64), GFP_KERNEL);
+   if (!dma_mask)
+   return NULL;
+
+   *dma_mask = of_read_number(prop, len / 4);
+
+   return dma_mask;
+}
+
 /**
  * of_device_alloc - Allocate and initialize an of_device
  * @np: device node to assign to device
@@ -161,10 +181,14 @@ struct platform_device *of_device_alloc(struct 
device_node *np,
WARN_ON(of_irq_to_resource_table(np, res, num_irq) != num_irq);
}
 
+   dev-dev.dma_mask = of_get_dma_mask(np);
dev-dev.of_node = of_node_get(np);
+
 #if defined(CONFIG_MICROBLAZE)
-   dev-dev.dma_mask = dev-archdata.dma_mask;
+   if (!dev-dev.dma_mask)
+   dev-dev.dma_mask = dev-archdata.dma_mask;
 #endif
+
dev-dev.parent = parent;
 
if (bus_id)
-- 
1.7.7

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[PATCH 2/4 v4] spi/atmel: add DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
The atmel_spi use only gpio for chip select.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: devicetree-discuss@lists.ozlabs.org
Cc: spi-devel-gene...@lists.sourceforge.net
---
 .../devicetree/bindings/spi/spi_atmel.txt  |6 +
 drivers/spi/spi-atmel.c|   21 ---
 2 files changed, 23 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi_atmel.txt

diff --git a/Documentation/devicetree/bindings/spi/spi_atmel.txt 
b/Documentation/devicetree/bindings/spi/spi_atmel.txt
new file mode 100644
index 000..7ec3d8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi_atmel.txt
@@ -0,0 +1,6 @@
+Atmel SPI device
+
+Required properties:
+- compatible : should be atmel,at91rm9200-spi.
+- reg: Address and length of the register set for the device
+- interrupts: Should contain macb interrupt
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 16d6a83..efbc5f8 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -19,6 +19,7 @@
 #include linux/interrupt.h
 #include linux/spi/spi.h
 #include linux/slab.h
+#include linux/of.h
 
 #include asm/io.h
 #include mach/board.h
@@ -695,7 +696,7 @@ static int atmel_spi_setup(struct spi_device *spi)
u32 scbr, csr;
unsigned intbits = spi-bits_per_word;
unsigned long   bus_hz;
-   unsigned intnpcs_pin;
+   int npcs_pin;
int ret;
 
as = spi_master_get_devdata(spi-master);
@@ -767,7 +768,9 @@ static int atmel_spi_setup(struct spi_device *spi)
csr |= SPI_BF(DLYBCT, 0);
 
/* chipselect must have been muxed as GPIO (e.g. in board setup) */
-   npcs_pin = (unsigned int)spi-controller_data;
+   if (!gpio_is_valid(spi-cs_gpio))
+   spi-cs_gpio = (int)spi-controller_data;
+   npcs_pin = spi-cs_gpio;
asd = spi-controller_state;
if (!asd) {
asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL);
@@ -887,7 +890,7 @@ static void atmel_spi_cleanup(struct spi_device *spi)
 {
struct atmel_spi*as = spi_master_get_devdata(spi-master);
struct atmel_spi_device *asd = spi-controller_state;
-   unsignedgpio = (unsigned) spi-controller_data;
+   unsignedgpio = spi-cs_gpio;
unsigned long   flags;
 
if (!asd)
@@ -938,7 +941,8 @@ static int __devinit atmel_spi_probe(struct platform_device 
*pdev)
master-mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
 
master-bus_num = pdev-id;
-   master-num_chipselect = 4;
+   master-dev.of_node = pdev-dev.of_node;
+   master-num_chipselect = master-dev.of_node ? 0 : 4;
master-setup = atmel_spi_setup;
master-transfer = atmel_spi_transfer;
master-cleanup = atmel_spi_cleanup;
@@ -1064,11 +1068,20 @@ static int atmel_spi_resume(struct platform_device 
*pdev)
 #defineatmel_spi_resumeNULL
 #endif
 
+#if defined(CONFIG_OF)
+static const struct of_device_id atmel_spi_dt_ids[] = {
+   { .compatible = atmel,at91rm9200-spi },
+   { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, atmel_spi_dt_ids);
+#endif
 
 static struct platform_driver atmel_spi_driver = {
.driver = {
.name   = atmel_spi,
.owner  = THIS_MODULE,
+   .of_match_table = of_match_ptr(atmel_spi_dt_ids),
},
.suspend= atmel_spi_suspend,
.resume = atmel_spi_resume,
-- 
1.7.7

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Re: [PULL] of nand generic binding

2012-03-07 Thread Rob Herring
On 03/07/2012 02:29 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 16:25 Wed 29 Feb , Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 16:57 Fri 17 Feb , Jean-Christophe PLAGNIOL-VILLARD wrote:
 HI,

 please find attached the generic binding for the MTD nand

 This will add boolean and nand helpers
 is it ok?
 I need this for 3.4
 
 will you apply it or can I apply it via AT91

Looks fine to me and Grant acked it, so go ahead and take with your at91
branch.

Rob

 
 Best Regards,
 J.
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Re: [PATCH] mach-kirkwood: Support for DLink DNS-320 DNS-325 NAS

2012-03-07 Thread Jason
On Wed, Mar 07, 2012 at 02:25:10PM +, Jamie Lentin wrote:
 On Thu, 1 Mar 2012, Jason wrote:
 
 On Wed, Feb 29, 2012 at 02:40:10PM +, Arnd Bergmann wrote:
 On Sunday 12 February 2012, Jamie Lentin wrote:
 This patch adds support for the D-Link DNS-320  DNS-325 NAS. 
 Kirkwood-based
 successors to the DNS-323.
 
 Signed-off-by: Jamie Lentin j...@lentin.co.uk
 ---
 My previous patch supported just the DNS-325, the DNS-320 is a very similar
 device and so I've combined the support for both devices into one board 
 support
 file. The main difference with the DNS-320 is that the temperature sensor
 is accessed via ttyS1 instead of I2C (I have a userland script to do this).
 
 I appreciate board support files like this are old hat and should be using
 device tree instead. If I should be focusing on that instead of getting 
 this
 merged, some pointers would be very useful.
 
 Hi Jamie,
 
 I just saw this patch going through the mailing list and noticed that you
 had sent it out another time before without getting any reply.
 
 I'm sorry that you did not get any feedback on this. Jason Cooper had a
 similar patch and he ended up a bit more fortunate than you, since he
 got support for the kirkwood based dreamplug into the arm-soc tree
 and is working on converting that to device tree now.
 
 I would suggest that you two team up and put DNS-32x support into the new
 common board-dt.c file as well.
 
 Jamie,
 
 Take a look at the dreamplug initial support patch series, latest here
 [1].  Make a kirkwood-dns-320.dts and a kirkwood-dns-325.dts file
 mimicing kirkwood-dreamplug.dts.  All you should need to start out is
 the compatible property and memory.
 
 [1] http://www.spinics.net/lists/arm-kernel/msg161696.html
 
 Excellent, thank you both! This is definitely enough to get me
 going. All the patches seem to be in staging/kirkwood/dt, is
 submitting based on this tree reasonable too?

newest version is here:

git://git.infradead.org/users/jcooper/linux-kirkwood.git kirkwood_dt

 Will try to use CONFIG_ARM_APPENDED_DTB to get it booting, as
 D-Link's u-boot is probably not devicetree aware. Or is there a
 better approach (apart from a JTAG programmer and replacing u-boot)?

That's fine for testing, but upgrading u-boot is definitely advised.  I
have yet to find a commercially distributed u-boot binary worth a d*mn.

 Some more comments:
 
 diff --git a/arch/arm/mach-kirkwood/dnskw-setup.c 
 b/arch/arm/mach-kirkwood/dnskw-setup.c
 new file mode 100644
 index 000..25ea0fa
 --- /dev/null
 +++ b/arch/arm/mach-kirkwood/dnskw-setup.c
 @@ -0,0 +1,431 @@
 +/*
 + * arch/arm/mach-kirkwood/dnskw-setup.c
 
 All future boards should ideally go through a single board file, and the 
 plan
 is to work on minimizing the non-generic contents of that over time.
 Right now, it only contains support for the dreamplug, but there is no
 reason why this one couldn't get merged into it as well.
 
 
 Definitely do-able, although I'm tempted to leave out anything
 non-essential to avoid board-dt.c becoming too unweildy. The MPP
 config and it's comments summarise my research, the rest is C+P code
 that could be reconstructed.

As more drivers are converted to DT, board-dt.c will shrink.  If pinmux
becomes too unwieldy, we can break it out into a separate file(s).

 +static struct mtd_partition dnskw_nand_parts[] = {
 +  {
 +  .name   = u-boot,
 +  .offset = 0,
 +  .size   = SZ_1M,
 +  .mask_flags = MTD_WRITEABLE
 +  }, {
 +  .name   = uImage,
 +  .offset = MTDPART_OFS_NXTBLK,
 +  .size   = 5 * SZ_1M
 +  }, {
 +  .name   = ramdisk,
 +  .offset = MTDPART_OFS_NXTBLK,
 +  .size   = 5 * SZ_1M
 +  }, {
 +  .name   = image,
 +  .offset = MTDPART_OFS_NXTBLK,
 +  .size   = 102 * SZ_1M
 +  }, {
 +  .name   = mini firmware,
 +  .offset = MTDPART_OFS_NXTBLK,
 +  .size   = 10 * SZ_1M
 +  }, {
 +  .name   = config,
 +  .offset = MTDPART_OFS_NXTBLK,
 +  .size   = 5 * SZ_1M
 +  },
 +};
 
 Jason already has a patch for NAND partitions through the SPI attachment,
 I would suggest that you do the same for the nand controller, the patch
 should be fairly similar.
 
 
 Found this and can see what needs doing. Will attempt this after
 getting the basic devicetree support sorted.
 
 +/*
 + * Power controls
 + 
 /
 +
 +static void dnskw_power_off(void)
 +{
 +  gpio_set_value(DNSKW_GPIO_POWER, 1);
 +}
 ... snip -- lots of gpio stuff
 
 The entire gpio setup is rather complex, and I don't know how much of it
 can be handled with the existing gpio device tree bindings. I hope someone
 else can comment here.
 
 
 

Re: [PATCH 1/9 v2] ARM: at91: usb ohci add dt support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 11:33 Wed 07 Mar , Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 09:34 Wed 07 Mar , Russell King - ARM Linux wrote:
  On Wed, Mar 07, 2012 at 10:15:38AM +0100, Jean-Christophe PLAGNIOL-VILLARD 
  wrote:
   +static u64 at91_ohci_dma_mask = DMA_BIT_MASK(32);
   +
   +static int __devinit ohci_at91_of_init(struct platform_device *pdev)
   +{
   + struct device_node *np = pdev-dev.of_node;
   + int i, ret, gpio;
   + enum of_gpio_flags flags;
   + struct at91_usbh_data   *pdata;
   + u32 ports;
   +
   + if (!np)
   + return 0;
   +
   + /* Right now device-tree probed devices don't get dma_mask set.
   +  * Since shared usb code relies on it, set it here for now.
   +  * Once we have dma capability bindings this can go away.
   +  */
   + if (!pdev-dev.dma_mask)
   + pdev-dev.dma_mask = at91_ohci_dma_mask;
  
  That sounds like a rather big omission from DT - what's happening to
  address this (before we end up with lots of drivers with this).  Pretty
  much any device which does DMA needs both this and the coherent DMA mask
  set properly.
  
  We really don't want this kind of workaround scattered in every driver
  which has been converted to DT.
 Tegra do it also
 I do yet found a good generic way in DT
 
 Today only usb need I do plan to drop it for 3.5 can we have for 3.4
I send a patch to propose a binding for both dma-mask and coherent dma mask

If it does not got for 3.4 can this temporary fix up go?

Best Regards,
J.
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[PATCH 1/1] of: add coherent dma-mask binding

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
This will allow each device to specify its coherent-dma-mask
The default behavior the set it to DMA_BIT_MASK(32) if none specified
is keeped.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
 drivers/of/platform.c |   15 ++-
 1 files changed, 14 insertions(+), 1 deletions(-)

diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index bb22194..d2a2ea02 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -141,6 +141,19 @@ static u64* of_get_dma_mask(struct device_node *np)
return dma_mask;
 }
 
+static u64 of_get_coherent_dma_mask(struct device_node *np)
+{
+   const __be32 *prop;
+   int len;
+
+   prop = of_get_property(np, coherent-dma-mask, len);
+
+   if (!prop)
+   return DMA_BIT_MASK(32);
+
+   return of_read_number(prop, len / 4);
+}
+
 /**
  * of_device_alloc - Allocate and initialize an of_device
  * @np: device node to assign to device
@@ -228,7 +241,7 @@ struct platform_device *of_platform_device_create_pdata(
 #if defined(CONFIG_MICROBLAZE)
dev-archdata.dma_mask = 0xUL;
 #endif
-   dev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
+   dev-dev.coherent_dma_mask = of_get_coherent_dma_mask(np);
dev-dev.bus = platform_bus_type;
dev-dev.platform_data = platform_data;
 
-- 
1.7.7

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Re: [PATCH v8 15/21] tegra: fdt: Add function to return peripheral/clock ID

2012-03-07 Thread Stephen Warren
On 03/06/2012 08:10 PM, Simon Glass wrote:
 A common requirement is to find the clock ID for a peripheral. This is the
 second cell of the 'clocks' property (the first being the phandle itself).
 
 Signed-off-by: Simon Glass s...@chromium.org
...
 Changes in v8:
 - Only include clock_decode_periph_id() when CONFIG_OF_CONTROL defined

Acked-by: Stephen Warren swar...@wwwdotorg.org
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Re: [PATCH v8 21/21] tegra: fdt: Enable FDT support for Ventana

2012-03-07 Thread Stephen Warren
On 03/06/2012 08:10 PM, Simon Glass wrote:
 From: Tom Warren twar...@nvidia.com
 
 This switches Ventana over to use FDT for run-time config instead of
 CONFIG options.
 
 At present Ventana does not have its own device tree file - it just uses
 the Seaboard one.

But there's a Ventana-specific tegra-ventana.dts in the kernel...

 Signed-off-by: Tom Warren twar...@nvidia.com
 Signed-off-by: Simon Glass s...@chromium.org
 Acked-by: Simon Glass s...@chromium.org

Have you tested this on Ventana in mainline U-Boot?
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Re: [PATCH v8 21/21] tegra: fdt: Enable FDT support for Ventana

2012-03-07 Thread Simon Glass
Hi Stephen,

On Wed, Mar 7, 2012 at 9:10 AM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 03/06/2012 08:10 PM, Simon Glass wrote:
 From: Tom Warren twar...@nvidia.com

 This switches Ventana over to use FDT for run-time config instead of
 CONFIG options.

 At present Ventana does not have its own device tree file - it just uses
 the Seaboard one.

 But there's a Ventana-specific tegra-ventana.dts in the kernel...

Yes, that's right. Perhaps we should drop this patch for now? Ventana
will still build, just not have USB support.


 Signed-off-by: Tom Warren twar...@nvidia.com
 Signed-off-by: Simon Glass s...@chromium.org
 Acked-by: Simon Glass s...@chromium.org

 Have you tested this on Ventana in mainline U-Boot?

I have not, but I think Tom has - maybe Tom you can reply Tested-by here if so?

Regards,
Simon
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Re: [PATCH 1/5 v2] i2c/gpio: add DT support

2012-03-07 Thread Rob Herring
On 02/29/2012 08:20 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 Cc: Nicolas Ferre nicolas.fe...@atmel.com
 Cc: linux-...@vger.kernel.org
 Cc: devicetree-discuss@lists.ozlabs.org
 ---
 v2:
 
   use devm_kzalloc
   use i2c-gpio
   use time name in the properties
 
 Best Regars,
 J.
  .../devicetree/bindings/gpio/gpio_i2c.txt  |   32 +++
  drivers/i2c/busses/i2c-gpio.c  |   95 +++
  2 files changed, 107 insertions(+), 20 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/gpio/gpio_i2c.txt
 
 diff --git a/Documentation/devicetree/bindings/gpio/gpio_i2c.txt 
 b/Documentation/devicetree/bindings/gpio/gpio_i2c.txt
 new file mode 100644
 index 000..27e1b1a
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/gpio/gpio_i2c.txt
 @@ -0,0 +1,32 @@
 +Device-Tree bindings for i2c gpio driver
 +
 +Required properties:
 + - compatible = i2c-gpio;
 + - gpios: sda and scl gpio
 +
 +
 +Optional properties:
 + - i2c-gpio,sda-open-drain: sda as open drain
 + - i2c-gpio,scl-open-drain: scl as open drain
 + - i2c-gpio,scl-output-only: scl as output only
 + - udelay: delay between GPIO operations (may depend on each platform)

i2c-gpio,delay-us

 + - i2c-algo-bit,timeout-milliseconds: timeout to get data

i2c-gpio,timeout-ms

 +
 +Example nodes:
 +
 +i2c-gpio@0 {

Should be i2c@0

 + compatible = i2c-gpio;
 + gpios = pioA 23 0 /* sda */
 +  pioA 24 0 /* scl */
 + ;
 + i2c-gpio,sda-open-drain;
 + i2c-gpio,scl-open-drain;
 + udelay = 2;   /* ~100 kHz */
 + #address-cells = 1;
 + #size-cells = 0;
 +
 + rv3029c2@56 {
 + compatible = rv3029c2;
 + reg = 0x56;
 + };
 +};
 diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
 index a651779..71adba5 100644
 --- a/drivers/i2c/busses/i2c-gpio.c
 +++ b/drivers/i2c/busses/i2c-gpio.c
 @@ -14,8 +14,15 @@
  #include linux/module.h
  #include linux/slab.h
  #include linux/platform_device.h
 +#include linux/gpio.h
 +#include linux/of_gpio.h
 +#include linux/of_i2c.h
  
 -#include asm/gpio.h
 +struct i2c_gpio_private_data {
 + struct i2c_adapter adap;
 + struct i2c_algo_bit_data bit_data;
 + struct i2c_gpio_platform_data pdata;
 +};
  
  /* Toggle SDA by changing the direction of the pin */
  static void i2c_gpio_setsda_dir(void *data, int state)
 @@ -78,24 +85,63 @@ static int i2c_gpio_getscl(void *data)
   return gpio_get_value(pdata-scl_pin);
  }
  
 +static int __devinit of_i2c_gpio_probe(struct device_node *np,
 +  struct i2c_gpio_platform_data *pdata)
 +{
 + u32 reg;
 +
 + if (of_gpio_count(np)  2)
 + return -ENODEV;
 +
 + pdata-sda_pin = of_get_gpio(np, 0);
 + pdata-scl_pin = of_get_gpio(np, 1);
 +
 + if (pdata-sda_pin  0 || pdata-scl_pin  0) {
 + pr_err(%s: invalid GPIO pins, sda=%d/scl=%d\n,
 +np-full_name, pdata-sda_pin, pdata-scl_pin);
 + return -ENODEV;
 + }
 +
 + if (of_property_read_u32(np, udelay, reg))
 + pdata-udelay = reg;

Why not of_property_read_u32(np, udelay, pdata-udelay)?

Also, reg may not be initialized here.

 +
 + if (of_property_read_u32(np, i2c-algo-bit,timeout-milliseconds, reg))
 + pdata-timeout = msecs_to_jiffies(reg);
 +
 + pdata-sda_is_open_drain =
 + !!of_property_read_bool(np, i2c-gpio,sda-open-drain);
 + pdata-scl_is_open_drain =
 + !!of_property_read_bool(np, i2c-gpio,scl-open-drain);
 + pdata-scl_is_output_only =
 + !!of_property_read_bool(np, i2c-gpio,scl-output-only);
 +
 + return 0;
 +}
 +
  static int __devinit i2c_gpio_probe(struct platform_device *pdev)
  {
 + struct i2c_gpio_private_data *priv;
   struct i2c_gpio_platform_data *pdata;
   struct i2c_algo_bit_data *bit_data;
   struct i2c_adapter *adap;
   int ret;
  
 - pdata = pdev-dev.platform_data;
 - if (!pdata)
 - return -ENXIO;
 + priv = devm_kzalloc(pdev-dev, sizeof(*priv), GFP_KERNEL);
 + if (!priv)
 + return -ENOMEM;
 + adap = priv-adap;
 + bit_data = priv-bit_data;
 + pdata = priv-pdata;
  
 - ret = -ENOMEM;
 - adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
 - if (!adap)
 - goto err_alloc_adap;
 - bit_data = kzalloc(sizeof(struct i2c_algo_bit_data), GFP_KERNEL);
 - if (!bit_data)
 - goto err_alloc_bit_data;
 + if (pdev-dev.of_node) {
 + ret = of_i2c_gpio_probe(pdev-dev.of_node, pdata);
 + if (ret)
 + return ret;
 + } else {
 + if (!pdev-dev.platform_data)
 + return -ENXIO;
 + memcpy(pdata, pdev-dev.platform_data, sizeof(*pdata));
 + }
  
   ret = gpio_request(pdata-sda_pin, 

Re: [PATCH 1/5 v2] i2c/gpio: add DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 11:16 Wed 07 Mar , Rob Herring wrote:
 On 02/29/2012 08:20 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
  Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
  Cc: Nicolas Ferre nicolas.fe...@atmel.com
  Cc: linux-...@vger.kernel.org
  Cc: devicetree-discuss@lists.ozlabs.org
  ---
  v2:
  
  use devm_kzalloc
  use i2c-gpio
  use time name in the properties
  
  Best Regars,
  J.
   .../devicetree/bindings/gpio/gpio_i2c.txt  |   32 +++
   drivers/i2c/busses/i2c-gpio.c  |   95 
  +++
   2 files changed, 107 insertions(+), 20 deletions(-)
   create mode 100644 Documentation/devicetree/bindings/gpio/gpio_i2c.txt
  
  diff --git a/Documentation/devicetree/bindings/gpio/gpio_i2c.txt 
  b/Documentation/devicetree/bindings/gpio/gpio_i2c.txt
  new file mode 100644
  index 000..27e1b1a
  --- /dev/null
  +++ b/Documentation/devicetree/bindings/gpio/gpio_i2c.txt
  @@ -0,0 +1,32 @@
  +Device-Tree bindings for i2c gpio driver
  +
  +Required properties:
  +   - compatible = i2c-gpio;
  +   - gpios: sda and scl gpio
  +
  +
  +Optional properties:
  +   - i2c-gpio,sda-open-drain: sda as open drain
  +   - i2c-gpio,scl-open-drain: scl as open drain
  +   - i2c-gpio,scl-output-only: scl as output only
  +   - udelay: delay between GPIO operations (may depend on each platform)
 
 i2c-gpio,delay-us
 
  +   - i2c-algo-bit,timeout-milliseconds: timeout to get data
 
 i2c-gpio,timeout-ms
it's algo-bit speficic no i2c-gpio that's why I use i2c-algo-bit
 
  +
  +Example nodes:
  +
  +i2c-gpio@0 {
 
 Should be i2c@0
ok
 
  +   compatible = i2c-gpio;
  +   gpios = pioA 23 0 /* sda */
  +pioA 24 0 /* scl */
  +   ;
  +   i2c-gpio,sda-open-drain;
  +   i2c-gpio,scl-open-drain;
  +   udelay = 2;   /* ~100 kHz */
  +   #address-cells = 1;
  +   #size-cells = 0;
  +
  +   rv3029c2@56 {
  +   compatible = rv3029c2;
  +   reg = 0x56;
  +   };
  +};
  diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
  index a651779..71adba5 100644
  --- a/drivers/i2c/busses/i2c-gpio.c
  +++ b/drivers/i2c/busses/i2c-gpio.c
  @@ -14,8 +14,15 @@
   #include linux/module.h
   #include linux/slab.h
   #include linux/platform_device.h
  +#include linux/gpio.h
  +#include linux/of_gpio.h
  +#include linux/of_i2c.h
   
  -#include asm/gpio.h
  +struct i2c_gpio_private_data {
  +   struct i2c_adapter adap;
  +   struct i2c_algo_bit_data bit_data;
  +   struct i2c_gpio_platform_data pdata;
  +};
   
   /* Toggle SDA by changing the direction of the pin */
   static void i2c_gpio_setsda_dir(void *data, int state)
  @@ -78,24 +85,63 @@ static int i2c_gpio_getscl(void *data)
  return gpio_get_value(pdata-scl_pin);
   }
   
  +static int __devinit of_i2c_gpio_probe(struct device_node *np,
  +struct i2c_gpio_platform_data *pdata)
  +{
  +   u32 reg;
  +
  +   if (of_gpio_count(np)  2)
  +   return -ENODEV;
  +
  +   pdata-sda_pin = of_get_gpio(np, 0);
  +   pdata-scl_pin = of_get_gpio(np, 1);
  +
  +   if (pdata-sda_pin  0 || pdata-scl_pin  0) {
  +   pr_err(%s: invalid GPIO pins, sda=%d/scl=%d\n,
  +  np-full_name, pdata-sda_pin, pdata-scl_pin);
  +   return -ENODEV;
  +   }
  +
  +   if (of_property_read_u32(np, udelay, reg))
  +   pdata-udelay = reg;
 
 Why not of_property_read_u32(np, udelay, pdata-udelay)?
 
 Also, reg may not be initialized here.
if udelay have any error we keep udelay as 0

Best Regards,
J.
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Re: [PATCH 1/1] of: add dma-mask binding

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 10:59 Wed 07 Mar , Rob Herring wrote:
 On 03/07/2012 05:26 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
  This will allow each device to specify its dma-mask
  The microblaze architecture hook is keep temporary if no dma-mask is 
  specified
  int the DT
  
  Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
  ---
   drivers/of/platform.c |   26 +-
   1 files changed, 25 insertions(+), 1 deletions(-)
  
  diff --git a/drivers/of/platform.c b/drivers/of/platform.c
  index cae9477..bb22194 100644
  --- a/drivers/of/platform.c
  +++ b/drivers/of/platform.c
  @@ -121,6 +121,26 @@ void of_device_make_bus_id(struct device *dev)
  dev_set_name(dev, %s.%d, node-name, magic - 1);
   }
   
  +static u64* of_get_dma_mask(struct device_node *np)
  +{
  +   const __be32 *prop;
  +   int len;
  +   u64 *dma_mask;
  +
  +   prop = of_get_property(np, dma-mask, len);
 
 This would need some documentation. There is already dma-ranges
 defined for OF which nay do what's needed.
what is dma-ranges I see no doc about it
but I don't think it could be used for the dma mask
 
  +
  +   if (!prop)
  +   return NULL;
  +
  +   dma_mask = kzalloc(sizeof(u64), GFP_KERNEL);
 
 This seems kind of wasteful for 1 u64.
no choice dma_mask must be a pointer
 
  +   if (!dma_mask)
  +   return NULL;
  +
  +   *dma_mask = of_read_number(prop, len / 4);
  +
  +   return dma_mask;
  +}
  +
   /**
* of_device_alloc - Allocate and initialize an of_device
* @np: device node to assign to device
  @@ -161,10 +181,14 @@ struct platform_device *of_device_alloc(struct 
  device_node *np,
  WARN_ON(of_irq_to_resource_table(np, res, num_irq) != num_irq);
  }
   
  +   dev-dev.dma_mask = of_get_dma_mask(np);
  dev-dev.of_node = of_node_get(np);
  +
   #if defined(CONFIG_MICROBLAZE)
  -   dev-dev.dma_mask = dev-archdata.dma_mask;
 
 And doing it this way for didn't get a warm reception either:
 
 http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-April/005285.html
 
 Do you really need this to be something other than ~0UL and if so does
 it need to be per device or system wide?
 
 You can solve this with bus notifiers in your at91 code. Here's an
 example which I did (but no longer need):
 
 static u64 highbank_dma_mask = DMA_BIT_MASK(32);
IIRC on at91 all of them that need it have a DMA_BIT_MASK(32)


 
 static int highbank_platform_notifier(struct notifier_block *nb,
 unsigned long event, void *__dev)
 {
   struct device *dev = __dev;
 
   if (event != BUS_NOTIFY_ADD_DEVICE)
   return NOTIFY_DONE;
 
   if (of_device_is_compatible(dev-of_node, calxeda,hb-nfc))
   dev-dma_mask = highbank_dma_mask;
execpt as example today I need it on 2 node (OHCI  EHCI)

and if more device need I don't want to end up with more fixup

I really prefer to set it via DT

Best Regards,
J.
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Re: [PATCH 6/6] ARM: at91: add Shutdown Controller (SHDWC) DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 20:24 Fri 02 Mar , Arnd Bergmann wrote:
 On Friday 02 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
  +   }
  +
  +   if (of_device_is_compatible(np, atmel,at91sam9x5-shdwc)) {
  +   have_rtt = false;
  +   have_rtc = true;
  +   } else if (of_device_is_compatible(np, atmel,at91sam9rl-shdwc)) {
  +   have_rtt = true;
  +   have_rtc = true;
  +   } else {
  +   have_rtt = true;
  +   have_rtc = false;
  +   }
  +
  +   if (have_rtc  of_property_read_bool(np, atmel,wakeup-rtc-timer))
  +   mode |= AT91_SHDW_RTCWKEN;
  +
  +   if (have_rtt  of_property_read_bool(np, atmel,wakeup-rtt-timer))
  +   mode |= AT91_SHDW_RTTWKEN;
  +
  +   at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
  +
 
 Hi Jean-Christophe,
 
 I don't understand why you check the specific part here. Isn't it enough to
 check the property when you already mandate that they can only be present
 on devices that support the specific wakeup?
 
 If there is a good explanation for that, maybe add a code comment why it's
 required.
some wake update source exist on few soc and we are not supposed to set the
bit otherwise

Ill put a comment.

Best Regards,
J.
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Re: [PATCH 0/6] AT91 more DT bindings

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
Hi,

Rob is ok for you?

Best Regards,
J.
On 20:28 Fri 02 Mar , Jean-Christophe PLAGNIOL-VILLARD wrote:
 HI,
 
   The following patch series add the bindings for:
- PMC
- SDRAM/DDR Controller
- Reset Controller
- Shutdown Controller
 
 The following changes since commit c5ec01650adb1976f928177cd7e71afcb82026c5:
 
   ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5 (2012-03-02 00:46:37 
 +0800)
 
 are available in the git repository at:
   git://github.com/at91linux/linux-at91.git ..BRANCH.NOT.VERIFIED..
 
 Jean-Christophe PLAGNIOL-VILLARD (6):
   ARM: at91/dt: add specific DT soc init
   ARM: at91: add pmc DT support
   ARM: at91: always enable sam9 restart
   ARM: at91: add RSTC (Reset Controller) dt support
   ARM: at91: add ram controller DT support
   ARM: at91: add Shutdown Controller (SHDWC) DT support
 
  .../devicetree/bindings/arm/atmel-at91.txt |   60 
  .../devicetree/bindings/arm/atmel-pmc.txt  |   11 ++
  arch/arm/boot/dts/at91sam9g20.dtsi |   20 +++
  arch/arm/boot/dts/at91sam9g45.dtsi |   21 +++
  arch/arm/boot/dts/at91sam9m10g45ek.dts |   11 ++
  arch/arm/boot/dts/at91sam9x5.dtsi  |   20 +++
  arch/arm/boot/dts/at91sam9x5cm.dtsi|   11 ++
  arch/arm/boot/dts/usb_a9g20.dts|   11 ++
  arch/arm/mach-at91/Kconfig |   10 +-
  arch/arm/mach-at91/at91sam9x5.c|7 -
  arch/arm/mach-at91/board-dt.c  |8 +-
  arch/arm/mach-at91/clock.c |   54 ++-
  arch/arm/mach-at91/generic.h   |2 +
  arch/arm/mach-at91/include/mach/at91_shdwc.h   |4 +-
  arch/arm/mach-at91/include/mach/at91sam9x5.h   |5 -
  arch/arm/mach-at91/setup.c |  158 
 
  16 files changed, 380 insertions(+), 33 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/arm/atmel-pmc.txt
 
 Best Regards,
 J.
 
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RE: [PATCH v8 21/21] tegra: fdt: Enable FDT support for Ventana

2012-03-07 Thread Tom Warren
Simon/Stephen,

 -Original Message-
 From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
 Sent: Wednesday, March 07, 2012 10:15 AM
 To: Stephen Warren
 Cc: U-Boot Mailing List; Tom Warren; linux-te...@vger.kernel.org; Jerry Van
 Baren; Devicetree Discuss
 Subject: Re: [PATCH v8 21/21] tegra: fdt: Enable FDT support for Ventana
 
 Hi Stephen,
 
 On Wed, Mar 7, 2012 at 9:10 AM, Stephen Warren swar...@wwwdotorg.org
 wrote:
  On 03/06/2012 08:10 PM, Simon Glass wrote:
  From: Tom Warren twar...@nvidia.com
 
  This switches Ventana over to use FDT for run-time config instead of
  CONFIG options.
 
  At present Ventana does not have its own device tree file - it just
  uses the Seaboard one.
 
  But there's a Ventana-specific tegra-ventana.dts in the kernel...
 
 Yes, that's right. Perhaps we should drop this patch for now? Ventana will
 still build, just not have USB support.
 
 
  Signed-off-by: Tom Warren twar...@nvidia.com
  Signed-off-by: Simon Glass s...@chromium.org
  Acked-by: Simon Glass s...@chromium.org
 
  Have you tested this on Ventana in mainline U-Boot?
 
 I have not, but I think Tom has - maybe Tom you can reply Tested-by here if
 so?
I haven't tested on Ventana yet (just got my board last week), but I will when 
I apply these patches and report back. If you want to drop the patch for now 
until you can get a tegra-ventana.dts prepped, that's fine by me, too.

Tom

-- 
nvpublic
 
 Regards,
 Simon
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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Jason Cooper wrote:
 +   serial@f1012000 {
 +   compatible = ns16550a;
 +   reg = 0xf1012000 0xff;
 +   reg-shift = 2;
 +   interrupts = 33;
 +   clock-frequency = 2;
 +   };

I just noticed that the length here should be inclusive, i.e. 0x100 not 0xff.
This is different from the way we define resources in Linux.

Arnd
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Re: [PATCH 08/14] ARM: kirkwood: use devicetree for rtc-mv

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Jason Cooper wrote:
 +
 +   rtc@f1010300 {
 +   compatible = mrvl,kirkwood-rtc, mrvl,orion-rtc;
 +   reg = 0xf1010300 0x1f;
 +   interrupts = 53;
 +   };
  };

Same as with the uart, this length should be 0x20 instead of 0x1f.

Arnd
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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Jason
On Wed, Mar 07, 2012 at 06:31:31PM +, Arnd Bergmann wrote:
 On Wednesday 07 March 2012, Jason Cooper wrote:
  +   serial@f1012000 {
  +   compatible = ns16550a;
  +   reg = 0xf1012000 0xff;
  +   reg-shift = 2;
  +   interrupts = 33;
  +   clock-frequency = 2;
  +   };
 
 I just noticed that the length here should be inclusive, i.e. 0x100 not 0xff.
 This is different from the way we define resources in Linux.

I was maintaining form with plat-orion/common.c:66 (0xff)  I'll fix it
to inclusive.

thx,

Jason.
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Re: [PATCH 14/14] ARM: kirkwood: use devicetree to init sata_mv

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Jason Cooper wrote:
 @@ -504,6 +504,16 @@ static int __init kirkwood_clock_gate(void)
 kirkwood_clk_ctrl |= CGC_USB0;
 of_node_put(np);
 }
 +
 +   np = of_find_compatible_node(NULL, NULL, mrvl,orion-sata);
 +   if (np  of_device_is_available(np)) {
 +   int nr_ports;
 +   kirkwood_clk_ctrl |= CGC_SATA0;
 +   of_property_read_u32(np, nr-ports, nr_ports);
 +   if (nr_ports  1)
 +   kirkwood_clk_ctrl |= CGC_SATA1;
 +   of_node_put(np);
 +   }
  #endif
  
 /* For SATA: first shutdown the phy */

Is it guaranteed that it's always the first port that gets used if there
is only one? If not, this might turn on the wrong one.

Arnd
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Re: [PATCH 14/14] ARM: kirkwood: use devicetree to init sata_mv

2012-03-07 Thread Jason
On Wed, Mar 07, 2012 at 06:40:09PM +, Arnd Bergmann wrote:
 On Wednesday 07 March 2012, Jason Cooper wrote:
  @@ -504,6 +504,16 @@ static int __init kirkwood_clock_gate(void)
  kirkwood_clk_ctrl |= CGC_USB0;
  of_node_put(np);
  }
  +
  +   np = of_find_compatible_node(NULL, NULL, mrvl,orion-sata);
  +   if (np  of_device_is_available(np)) {
  +   int nr_ports;
  +   kirkwood_clk_ctrl |= CGC_SATA0;
  +   of_property_read_u32(np, nr-ports, nr_ports);
  +   if (nr_ports  1)
  +   kirkwood_clk_ctrl |= CGC_SATA1;
  +   of_node_put(np);
  +   }
   #endif
   
  /* For SATA: first shutdown the phy */
 
 Is it guaranteed that it's always the first port that gets used if there
 is only one? If not, this might turn on the wrong one.

This is the same logic as mach-kirkwood/common.c:176

void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
{
kirkwood_clk_ctrl |= CGC_SATA0;
if (sata_data-n_ports  1)
kirkwood_clk_ctrl |= CGC_SATA1;

orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
}

So, I don't think I'm introducing a regression.

thx,

Jason.
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Re: [PATCH 6/6] ARM: at91: add Shutdown Controller (SHDWC) DT support

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 20:24 Fri 02 Mar , Arnd Bergmann wrote:
  On Friday 02 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
   +   }
   +
   +   if (of_device_is_compatible(np, atmel,at91sam9x5-shdwc)) {
   +   have_rtt = false;
   +   have_rtc = true;
   +   } else if (of_device_is_compatible(np, atmel,at91sam9rl-shdwc)) 
   {
   +   have_rtt = true;
   +   have_rtc = true;
   +   } else {
   +   have_rtt = true;
   +   have_rtc = false;
   +   }
   +
   +   if (have_rtc  of_property_read_bool(np, 
   atmel,wakeup-rtc-timer))
   +   mode |= AT91_SHDW_RTCWKEN;
   +
   +   if (have_rtt  of_property_read_bool(np, 
   atmel,wakeup-rtt-timer))
   +   mode |= AT91_SHDW_RTTWKEN;
   +
   +   at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
   +
  
  Hi Jean-Christophe,
  
  I don't understand why you check the specific part here. Isn't it enough to
  check the property when you already mandate that they can only be present
  on devices that support the specific wakeup?
  
  If there is a good explanation for that, maybe add a code comment why it's
  required.
 some wake update source exist on few soc and we are not supposed to set the
 bit otherwise
 

I still don't understand: Doesn't the property already give the information?
In general, you should try to encode these things in specific properties 
instead of
checking the compatible property.

Arnd
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Re: [PATCH 14/14] ARM: kirkwood: use devicetree to init sata_mv

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Jason wrote:
  Is it guaranteed that it's always the first port that gets used if there
  is only one? If not, this might turn on the wrong one.
 
 This is the same logic as mach-kirkwood/common.c:176
 
 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 {
 kirkwood_clk_ctrl |= CGC_SATA0;
 if (sata_data-n_ports  1)
 kirkwood_clk_ctrl |= CGC_SATA1;
 
 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 }
 
 So, I don't think I'm introducing a regression.

Ok, good point. I was wondering whether the individual ports should
be modeled in the device tree, but I guess it's not necessary if nobody
needed this so far.

Arnd
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Re: [PATCH 6/6] ARM: at91: add Shutdown Controller (SHDWC) DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 18:49 Wed 07 Mar , Arnd Bergmann wrote:
 On Wednesday 07 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
  On 20:24 Fri 02 Mar , Arnd Bergmann wrote:
   On Friday 02 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
+   }
+
+   if (of_device_is_compatible(np, atmel,at91sam9x5-shdwc)) {
+   have_rtt = false;
+   have_rtc = true;
+   } else if (of_device_is_compatible(np, 
atmel,at91sam9rl-shdwc)) {
+   have_rtt = true;
+   have_rtc = true;
+   } else {
+   have_rtt = true;
+   have_rtc = false;
+   }
+
+   if (have_rtc  of_property_read_bool(np, 
atmel,wakeup-rtc-timer))
+   mode |= AT91_SHDW_RTCWKEN;
+
+   if (have_rtt  of_property_read_bool(np, 
atmel,wakeup-rtt-timer))
+   mode |= AT91_SHDW_RTTWKEN;
+
+   at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
+
   
   Hi Jean-Christophe,
   
   I don't understand why you check the specific part here. Isn't it enough 
   to
   check the property when you already mandate that they can only be present
   on devices that support the specific wakeup?
   
   If there is a good explanation for that, maybe add a code comment why it's
   required.
  some wake update source exist on few soc and we are not supposed to set the
  bit otherwise
  
 
 I still don't understand: Doesn't the property already give the information?
Yes
 In general, you should try to encode these things in specific properties 
 instead of
 checking the compatible property.
But I check that no mistake is done in the DT as the source of wakeup is
availlable on different version of the IP

Just more cautious

Best Regards,
J.
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Re: [PATCH 1/4] fdtget: Fix multiple arg bug and add test for it

2012-03-07 Thread Jon Loeliger
 There is a rather unfortunate bug in fdtget in that if multiple argument
 sets are provided, it just repeats displaying the first set ones for
 each set.
 
 Fix this bug and add a test for it.
 
 Signed-off-by: Simon Glass s...@chromium.org

Applied.

Thanks,
jdl
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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Jason
On Wed, Mar 07, 2012 at 06:31:31PM +, Arnd Bergmann wrote:
 On Wednesday 07 March 2012, Jason Cooper wrote:
  +   serial@f1012000 {
  +   compatible = ns16550a;
  +   reg = 0xf1012000 0xff;
  +   reg-shift = 2;
  +   interrupts = 33;
  +   clock-frequency = 2;
  +   };
 
 I just noticed that the length here should be inclusive, i.e. 0x100 not 0xff.
 This is different from the way we define resources in Linux.

Grrr.  Now I'm getting frustrated.  I'm trying to boot without
earlyprintk.  Evidently, something is wrong with the above, because the
device boots all the way up (blinky lights come on), but I get no
messages after the usual Uncompressing Linux... done, booting the
kernel.

Here's my most recent attempt:

serial@f1012000 {
device_type = serial;
compatible = ns16550a;
reg = 0xf1012000 0x100; /*phys addr*/
virt-reg = 0xfed12000;  /*virt addr*/
reg-shift = 2;
reg-io-width = 1;
interrupts = 33;
current-speed = 115200;
interrupt-parent = intc;
clock-frequency = 2;
};

I've looked at what is done in the powerpc dt's, but, no luck.  When
earlyprintk is enabled, I see no error messages, just:

bootconsole [earlycon0] enabled
debug: skip boot console de-registration.
...
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled

Any pointers?

thx,

Jason.
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Re: [PATCH 3/4] fdtget: Add -l to list the children of a node

2012-03-07 Thread Jon Loeliger
 This option lists the children of each node given as a parameter, one
 child per line.
 
 Signed-off-by: Simon Glass s...@chromium.org

I'll wait for the respin here.

jdl
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Re: [PATCH 2/4] fdtget: Add -p to list the properties of a node

2012-03-07 Thread Jon Loeliger
 This option lists the properties of each node given as a parameter, one
 property per line.
 
 Signed-off-by: Simon Glass s...@chromium.org

Applied.

Thanks,
jdl
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Re: [PATCH 1/1] of: add dma-mask binding

2012-03-07 Thread Rob Herring
On 03/07/2012 11:34 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 10:59 Wed 07 Mar , Rob Herring wrote:
 On 03/07/2012 05:26 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
 This will allow each device to specify its dma-mask
 The microblaze architecture hook is keep temporary if no dma-mask is 
 specified
 int the DT

 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 ---
  drivers/of/platform.c |   26 +-
  1 files changed, 25 insertions(+), 1 deletions(-)

 diff --git a/drivers/of/platform.c b/drivers/of/platform.c
 index cae9477..bb22194 100644
 --- a/drivers/of/platform.c
 +++ b/drivers/of/platform.c
 @@ -121,6 +121,26 @@ void of_device_make_bus_id(struct device *dev)
 dev_set_name(dev, %s.%d, node-name, magic - 1);
  }
  
 +static u64* of_get_dma_mask(struct device_node *np)
 +{
 +   const __be32 *prop;
 +   int len;
 +   u64 *dma_mask;
 +
 +   prop = of_get_property(np, dma-mask, len);

 This would need some documentation. There is already dma-ranges
 defined for OF which nay do what's needed.
 what is dma-ranges I see no doc about it
 but I don't think it could be used for the dma mask

See the ePAPR spec. It's a PowerPC doc, but parts still apply.

https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.1.pdf

There may also be something in OpenFirmware specs.


 +
 +   if (!prop)
 +   return NULL;
 +
 +   dma_mask = kzalloc(sizeof(u64), GFP_KERNEL);

 This seems kind of wasteful for 1 u64.
 no choice dma_mask must be a pointer

 +   if (!dma_mask)
 +   return NULL;
 +
 +   *dma_mask = of_read_number(prop, len / 4);
 +
 +   return dma_mask;
 +}
 +
  /**
   * of_device_alloc - Allocate and initialize an of_device
   * @np: device node to assign to device
 @@ -161,10 +181,14 @@ struct platform_device *of_device_alloc(struct 
 device_node *np,
 WARN_ON(of_irq_to_resource_table(np, res, num_irq) != num_irq);
 }
  
 +   dev-dev.dma_mask = of_get_dma_mask(np);
 dev-dev.of_node = of_node_get(np);
 +
  #if defined(CONFIG_MICROBLAZE)
 -   dev-dev.dma_mask = dev-archdata.dma_mask;

 And doing it this way for didn't get a warm reception either:

 http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-April/005285.html

 Do you really need this to be something other than ~0UL and if so does
 it need to be per device or system wide?

 You can solve this with bus notifiers in your at91 code. Here's an
 example which I did (but no longer need):

 static u64 highbank_dma_mask = DMA_BIT_MASK(32);
 IIRC on at91 all of them that need it have a DMA_BIT_MASK(32)
 
 

 static int highbank_platform_notifier(struct notifier_block *nb,
unsigned long event, void *__dev)
 {
  struct device *dev = __dev;

  if (event != BUS_NOTIFY_ADD_DEVICE)
  return NOTIFY_DONE;

  if (of_device_is_compatible(dev-of_node, calxeda,hb-nfc))
  dev-dma_mask = highbank_dma_mask;
 execpt as example today I need it on 2 node (OHCI  EHCI)

I don't think there is any reason you can't point to a single value if a
system wide setting fits. If not, using a per device value here is
easily doable.

 
 and if more device need I don't want to end up with more fixup
 
 I really prefer to set it via DT

You don't have any h/w restrictions here and most ARM platforms don't,
so really this doesn't need to be solved with DT for the default case.

Rob
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Re: [PATCH 6/6] ARM: at91: add Shutdown Controller (SHDWC) DT support

2012-03-07 Thread Rob Herring
On 03/07/2012 12:49 PM, Arnd Bergmann wrote:
 On Wednesday 07 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
 On 20:24 Fri 02 Mar , Arnd Bergmann wrote:
 On Friday 02 March 2012, Jean-Christophe PLAGNIOL-VILLARD wrote:
 +   }
 +
 +   if (of_device_is_compatible(np, atmel,at91sam9x5-shdwc)) {
 +   have_rtt = false;
 +   have_rtc = true;
 +   } else if (of_device_is_compatible(np, atmel,at91sam9rl-shdwc)) {
 +   have_rtt = true;
 +   have_rtc = true;
 +   } else {
 +   have_rtt = true;
 +   have_rtc = false;
 +   }
 +
 +   if (have_rtc  of_property_read_bool(np, 
 atmel,wakeup-rtc-timer))
 +   mode |= AT91_SHDW_RTCWKEN;
 +
 +   if (have_rtt  of_property_read_bool(np, 
 atmel,wakeup-rtt-timer))
 +   mode |= AT91_SHDW_RTTWKEN;
 +
 +   at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
 +

 Hi Jean-Christophe,

 I don't understand why you check the specific part here. Isn't it enough to
 check the property when you already mandate that they can only be present
 on devices that support the specific wakeup?

 If there is a good explanation for that, maybe add a code comment why it's
 required.
 some wake update source exist on few soc and we are not supposed to set the
 bit otherwise

 
 I still don't understand: Doesn't the property already give the information?
 In general, you should try to encode these things in specific properties 
 instead of
 checking the compatible property.
 

Or vice-versa, the compatible properties distinguish things enough that
the property is not needed. If it is fixed in the SOC design, then you
should distinguish things with the compatible property.

Rob

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Re: [PATCH 5/6] ARM: at91: add ram controller DT support

2012-03-07 Thread Rob Herring
On 03/02/2012 01:54 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
 We can now drop the call to ioremap_registers() as we have the binding for the
 SDRAM/DDR Controller.
 
 Drop ioremap_registers() for sam9x5 too.
 
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
 ---
  .../devicetree/bindings/arm/atmel-at91.txt |   19 ++
  arch/arm/boot/dts/at91sam9g20.dtsi |5 +++
  arch/arm/boot/dts/at91sam9g45.dtsi |6 
  arch/arm/boot/dts/at91sam9x5.dtsi  |5 +++
  arch/arm/mach-at91/at91sam9x5.c|6 
  arch/arm/mach-at91/include/mach/at91sam9x5.h   |5 ---
  arch/arm/mach-at91/setup.c |   27 +--
  7 files changed, 59 insertions(+), 14 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt 
 b/Documentation/devicetree/bindings/arm/atmel-at91.txt
 index a64f867..1f87820 100644
 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
 +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
 @@ -42,3 +42,22 @@ Example:
   compatible = atmel,at91sam9260-rstc;
   reg = 0xfd00 0x10;
   };
 +
 +RAMC SDRAM/DDR Controller required properties:
 +- compatible: Should be atmel,at91sam9260-sdramc,
 + atmel,at91sam9g45-ddramc,
 +- reg: Should contain registers location and length
 +  For at91sam9263 and at91sam9g45 you must specify 2 entries.
 +
 +Examples:
 +
 + ramc0: ramc@e800 {
 + compatible = atmel,at91sam9g45-ddramc;
 + reg = 0xe800 0x200;
 + };
 +
 + ramc0: ramc@e400 {
 + compatible = atmel,at91sam9g45-ddramc;
 + reg = 0xe400 0x200
 +0xe600 0x200;
 + };
 diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi 
 b/arch/arm/boot/dts/at91sam9g20.dtsi
 index 5414347..573ac5a 100644
 --- a/arch/arm/boot/dts/at91sam9g20.dtsi
 +++ b/arch/arm/boot/dts/at91sam9g20.dtsi
 @@ -59,6 +59,11 @@
   reg = 0xf000 0x200;
   };
  
 + ramc0: ramc@ea00 {
 + compatible = atmel,at91sam9260-sdramc;
 + reg = 0xea00 0x200;
 + };
 +
   pmc: pmc@fc00 {
   compatible = atmel,at91rm9200-pmc;
   reg = 0xfc00 0x100;
 diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi 
 b/arch/arm/boot/dts/at91sam9g45.dtsi
 index e2ccba5..6da07a9 100644
 --- a/arch/arm/boot/dts/at91sam9g45.dtsi
 +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
 @@ -60,6 +60,12 @@
   reg = 0xf000 0x200;
   };
  
 + ramc0: ramc@e400 {
 + compatible = atmel,at91sam9g45-ddramc;
 + reg = 0xe400 0x200
 +0xe600 0x200;
 + };
 +
   pmc: pmc@fc00 {
   compatible = atmel,at91rm9200-pmc;
   reg = 0xfc00 0x100;
 diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi 
 b/arch/arm/boot/dts/at91sam9x5.dtsi
 index 54e3030..09bc806 100644
 --- a/arch/arm/boot/dts/at91sam9x5.dtsi
 +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
 @@ -58,6 +58,11 @@
   reg = 0xf000 0x200;
   };
  
 + ramc0: ramc@e800 {
 + compatible = atmel,at91sam9g45-ddramc;
 + reg = 0xe800 0x200;
 + };
 +
   pmc: pmc@fc00 {
   compatible = atmel,at91rm9200-pmc;
   reg = 0xfc00 0x100;
 diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
 index 0b82c34..b6831ee 100644
 --- a/arch/arm/mach-at91/at91sam9x5.c
 +++ b/arch/arm/mach-at91/at91sam9x5.c
 @@ -302,11 +302,6 @@ static void __init at91sam9x5_map_io(void)
   at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
  }
  
 -static void __init at91sam9x5_ioremap_registers(void)
 -{
 - at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512);
 -}
 -
  void __init at91sam9x5_initialize(void)
  {
   at91_extern_irq = (1  AT91SAM9X5_ID_IRQ0);
 @@ -359,7 +354,6 @@ static unsigned int 
 at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = {
  struct at91_init_soc __initdata at91sam9x5_soc = {
   .map_io = at91sam9x5_map_io,
   .default_irq_priority = at91sam9x5_default_irq_priority,
 - .ioremap_registers = at91sam9x5_ioremap_registers,
   .register_clocks = at91sam9x5_register_clocks,
   .init = at91sam9x5_initialize,
  };
 diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h 
 

Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Andrew Lunn
On Wed, Mar 07, 2012 at 02:27:23PM -0500, Jason wrote:
 On Wed, Mar 07, 2012 at 06:31:31PM +, Arnd Bergmann wrote:
  On Wednesday 07 March 2012, Jason Cooper wrote:
   +   serial@f1012000 {
   +   compatible = ns16550a;
   +   reg = 0xf1012000 0xff;
   +   reg-shift = 2;
   +   interrupts = 33;
   +   clock-frequency = 2;
   +   };
  
  I just noticed that the length here should be inclusive, i.e. 0x100 not 
  0xff.
  This is different from the way we define resources in Linux.
 
 Grrr.  Now I'm getting frustrated.  I'm trying to boot without
 earlyprintk.  Evidently, something is wrong with the above, because the
 device boots all the way up (blinky lights come on), but I get no
 messages after the usual Uncompressing Linux... done, booting the
 kernel.

Hi Jason

What do you see in /proc/iomem?

You should expect:

f1012000-f10120ff : serial8250.0
  f1012000-f101201f : serial
f1012100-f10121ff : serial8250.1
  f1012100-f101211f : serial

or probably just the first, if your device only has one serial port.

How about /proc/interrupts?

 33:195  orion_irq  serial


Anything like this in dmesg?

[   17.189397] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
[   17.210023] serial8250.0: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
[   17.624748] console [ttyS0] enabled
[   17.648555] serial8250.1: ttyS1 at MMIO 0xf1012100 (irq = 34) is a 16550A

Comparing your system to the above might help you track down which
property is wrong.

 Andrew
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Re: [PATCH v4 4/9] tegra: fdt: i2c: Add extra I2C bindings for U-Boot

2012-03-07 Thread Stephen Warren
On 03/06/2012 09:22 PM, Simon Glass wrote:
 Hi Stephen,
 
 On Wed, Feb 29, 2012 at 12:36 PM, Stephen Warren swar...@nvidia.com wrote:
 On 02/29/2012 01:32 PM, Simon Glass wrote:
 Hi Stephen,

 On Wed, Feb 29, 2012 at 12:21 PM, Stephen Warren swar...@nvidia.com wrote:
 On 02/29/2012 10:31 AM, Simon Glass wrote:
 Add U-Boot's peripheral clock information to the Tegra20 device tree file.

 diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi

   compatible = nvidia,tegra20-i2c;
   reg = 0x7000C000 0x100;
   interrupts =  70 ;
 + clocks = tegra_car 12;   /* PERIPH_ID_I2C1 */
   };

 The I2C modules all require 2 clocks; the one you've added in this patch
 and a second reference to pll_p_out3. Can you please list both of these
 here, and update the I2C binding to describe the set of clocks that it
 requires. Thanks.

 OK - do you have a pointer to the kernel commit please? I always seem
 to have trouble tracking this stuff down.

 The clock stuff isn't in the kernel yet, so there's no commit to point
 to. The commit I asked you to create would update the bindings to define
 which clocks the I2C node needs, and would then go into U-Boot and the
 kernel.
 
 Which binding should I update? I have had a look through Olof's trees at:

Oh, it looks like we don't have any binding documentation for the Tegra
I2C controller at all yet.

So, there's nothing in the kernel to update. Sorry about that. If you
want, you could submit a kernel patch to add such a binding, but since
there isn't one already I won't hold you to it. I see you added a rough
placeholder binding doc in the U-Boot tree in your updated U-Boot patch
which is probably fine for now if you want.
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Re: [PATCH v5 4/9] tegra: fdt: i2c: Add extra I2C bindings for U-Boot

2012-03-07 Thread Stephen Warren
On 03/06/2012 10:00 PM, Simon Glass wrote:
 Add U-Boot's peripheral clock information to the Tegra20 device tree file.
 
 Signed-off-by: Simon Glass s...@chromium.org
...
 diff --git a/doc/device-tree-bindings/i2c/tegra20-i2c.txt 
 b/doc/device-tree-bindings/i2c/tegra20-i2c.txt
...
 +Required properties:
 + - clocks : Two clocks must be given, each as a phandle to the Tegra's
 +CAR node and the clock number as a parameter:

I'd rather rely on the common clock binding documentation for the format
of the clock specifiers than duplicate the information here. True, that
document isn't in U-Boot (nor is it final). I.e.:

Two clocks must be specified:

But I think this is fine for now (I might care more if submitting a doc
file for the kernel tree), so

Acked-by: Stephen Warren swar...@wwwdotorg.org

 + - the I2C clock to use for the peripheral
 + - the pll_p_out3 clock, which can be used for fast operation. This
 +  does not change and is the same for all I2C nodes.
 +
 +Example:
 +(TODO: merge with existing example):
 +
 + i2c@7000c400 {
 + #address-cells = 1;
 + #size-cells = 0;
 + compatible = nvidia,tegra20-i2c;
 + reg = 0x7000C400 0x100;
 + interrupts =  116 ;
 + /* PERIPH_ID_I2C2, PLL_P_OUT3 */
 + clocks = tegra_car 54, tegra_car 124;
 + };
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Re: [RESEND PATCH 0/3] arm: tegra: dts: USB Updates for Tegra legacy mode / OTG

2012-03-07 Thread Stephen Warren
On 03/06/2012 10:04 PM, Simon Glass wrote:
 This little series brings in some bindings that seem useful for U-Boot.
 
 I am working mostly in U-Boot, but since there is no shared .dts repo
 I was asked to commit these changes to the kernel. I do not propose to
 update the Linux USB drivers to match.
 
 
 Simon Glass (3):
   arm: tegra: dts: Support host/device selection and legacy mode
   arm: tegra: dts: Add legacy mode support to Tegra2x USB1 port
   arm: tegra: dts: Mark USB1 as an OTG port on Seaboard

I ack'd this before, but just in case it got lost: The series,

Acked-by: Stephen Warren swar...@wwwdotorg.org
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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Jason wrote:
 Grrr.  Now I'm getting frustrated.  I'm trying to boot without
 earlyprintk.  Evidently, something is wrong with the above, because the
 device boots all the way up (blinky lights come on), but I get no
 messages after the usual Uncompressing Linux... done, booting the
 kernel.
 
 Here's my most recent attempt:
 
 serial@f1012000 {
 device_type = serial;
 compatible = ns16550a;
 reg = 0xf1012000 0x100; /*phys addr*/
 virt-reg = 0xfed12000;  /*virt addr*/
 reg-shift = 2;
 reg-io-width = 1;
 interrupts = 33;
 current-speed = 115200;
 interrupt-parent = intc;
 clock-frequency = 2;
 };
 
 I've looked at what is done in the powerpc dt's, but, no luck.  When
 earlyprintk is enabled, I see no error messages, just:
 
 bootconsole [earlycon0] enabled
 debug: skip boot console de-registration.
 ...
 Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
 
 Any pointers?

My first guess was that clock-frequency is wrong, but it seems that
this one actually is correct, at least it's the same thing that
the platform code sets.

You should never need to pass the virtual address to a device,
most of all because it cannot be known to the device tree at all.
The of_serial driver (you did enable that one in Kconfig, right?)
sets UPF_IOREMAP for this reason, which means membase gets 
overwritten anyway.

You should also not need to set interrupt-parent in the device itself,
as long as it's set in the root node. This one should not hurt though.

Regarting the compatible value, you should check what 
/proc/tty/driver/serial contains when the system is up and running.
If you can log into the system through the network after booting it
up, you can also compare the contents of that file and the 'setserial'
output with what you got before the device tree conversion.

Finally, something could be wrong with the interrupt controller.
AFAICT, you register it through the device tree now, but it's also
getting initialized through kirkwood_init_irq, so the numbers
would all be wrong.

Arnd
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Re: [PATCH 6/6] ARM: at91: add Shutdown Controller (SHDWC) DT support

2012-03-07 Thread Arnd Bergmann
On Wednesday 07 March 2012, Rob Herring wrote:
  
  I still don't understand: Doesn't the property already give the information?
  In general, you should try to encode these things in specific properties 
  instead of
  checking the compatible property.
  
 
 Or vice-versa, the compatible properties distinguish things enough that
 the property is not needed. If it is fixed in the SOC design, then you
 should distinguish things with the compatible property.

Well, one of the two, basically. I would suggest using special properties
in order to be prepared when other SOCs have the same requirement. If you
know for certain that each one will only ever be needed in one specific
SOC, then the compatible property is enough, but if it's likely that others
will have the same requirement in the future, I think it's much better
to have just a single check rather than a list of SOCs.

Arnd
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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Michael Walle
Am Mittwoch 07 März 2012, 20:27:23 schrieb Jason:
 On Wed, Mar 07, 2012 at 06:31:31PM +, Arnd Bergmann wrote:
  On Wednesday 07 March 2012, Jason Cooper wrote:
   +   serial@f1012000 {
   +   compatible = ns16550a;
   +   reg = 0xf1012000 0xff;
   +   reg-shift = 2;
   +   interrupts = 33;
   +   clock-frequency = 2;
   +   };
  
  I just noticed that the length here should be inclusive, i.e. 0x100 not
  0xff. This is different from the way we define resources in Linux.
 
 Grrr.  Now I'm getting frustrated.  I'm trying to boot without
 earlyprintk.  Evidently, something is wrong with the above, because the
 device boots all the way up (blinky lights come on), but I get no
 messages after the usual Uncompressing Linux... done, booting the
 kernel.
 
 Here's my most recent attempt:
 
 serial@f1012000 {
 device_type = serial;
 compatible = ns16550a;
 reg = 0xf1012000 0x100; /*phys addr*/
 virt-reg = 0xfed12000;  /*virt addr*/
 reg-shift = 2;
 reg-io-width = 1;
 interrupts = 33;
 current-speed = 115200;
 interrupt-parent = intc;
 clock-frequency = 2;
 };
 
 I've looked at what is done in the powerpc dt's, but, no luck.  When
 earlyprintk is enabled, I see no error messages, just:
 
 bootconsole [earlycon0] enabled
 debug: skip boot console de-registration.
 ...
 Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
 
 Any pointers?

dunno if that helps a lot but the following was working for me with my 
linkstation:

serial0: serial@f1012000 {
cell-index = 0;
device_type = serial;
compatible = ns16550a;
reg = 0xf1012000 0x20;
reg-shift = 2;
clock-frequency = 2;
interrupts = 33;
};

-- 
michael
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Re: [PATCH v2 3/4] fdtget: Add -l to list the subnodes of a node

2012-03-07 Thread Jon Loeliger
 This option lists the subnodes of each node given as a parameter, one
 subnode per line.
 
 Signed-off-by: Simon Glass s...@chromium.org

Applied.

Thanks,
jdl
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Re: [PATCH v2 4/4] fdtget: Add -d to provide a default value

2012-03-07 Thread Jon Loeliger
 Sometimes the requested node or property is not present in the device
 tree. This option provides a way of reporting a default value in this
 case, rather than halting with an error.
 
 Signed-off-by: Simon Glass s...@chromium.org
 Acked-by: David Gibson da...@gibson.dropbear.id.au
 ---
 Changes in v2:
 - Rebased on top of changes to the -l patch

Applied.

Thanks,
jdl
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Re: [PATCH 2/4] fdtget: Add -p to list the properties of a node

2012-03-07 Thread David Gibson
On Wed, Mar 07, 2012 at 01:27:59PM -0600, Jon Loeliger wrote:
  This option lists the properties of each node given as a parameter, one
  property per line.
  
  Signed-off-by: Simon Glass s...@chromium.org
 
 Applied.

But not pushed out by the looks of it?

-- 
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david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Jason
On Wed, Mar 07, 2012 at 09:05:15PM +0100, Andrew Lunn wrote:
 On Wed, Mar 07, 2012 at 02:27:23PM -0500, Jason wrote:
  On Wed, Mar 07, 2012 at 06:31:31PM +, Arnd Bergmann wrote:
   On Wednesday 07 March 2012, Jason Cooper wrote:
+   serial@f1012000 {
+   compatible = ns16550a;
+   reg = 0xf1012000 0xff;
+   reg-shift = 2;
+   interrupts = 33;
+   clock-frequency = 2;
+   };
   
   I just noticed that the length here should be inclusive, i.e. 0x100 not 
   0xff.
   This is different from the way we define resources in Linux.
  
  Grrr.  Now I'm getting frustrated.  I'm trying to boot without
  earlyprintk.  Evidently, something is wrong with the above, because the
  device boots all the way up (blinky lights come on), but I get no
  messages after the usual Uncompressing Linux... done, booting the
  kernel.
 
 Hi Jason
 
 What do you see in /proc/iomem?
 
 You should expect:
 
 f1012000-f10120ff : serial8250.0
   f1012000-f101201f : serial
 f1012100-f10121ff : serial8250.1
   f1012100-f101211f : serial
 
 or probably just the first, if your device only has one serial port.
 
 How about /proc/interrupts?
 
  33:195  orion_irq  serial
 
 
 Anything like this in dmesg?
 
 [   17.189397] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled

 [   17.210023] serial8250.0: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
 [   17.624748] console [ttyS0] enabled

These two lines  are what I'm missing.  Some probe by printk shows
it's getting all the way through tty/serial/8250/8250.c:3263
serial8250_init() okay... then nothing.

 [   17.648555] serial8250.1: ttyS1 at MMIO 0xf1012100 (irq = 34) is a 16550A
 
 Comparing your system to the above might help you track down which
 property is wrong.
 
Andrew
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[GIT PULL v4] ARM: kirkwood: fdt conversion progress

2012-03-07 Thread Jason Cooper
The following changes since commit d65b4e98d7ea3038b767b70fe8be959b2913f16d:

  Linux 3.3-rc3 (2012-02-08 19:21:53 -0800)

are available in the git repository at:
  git://git.infradead.org/users/jcooper/linux-kirkwood.git kirkwood_dt

---
Arnd,

My first two should match up with what you have already, the only
outlier is that Jean-Christophe's patch is needed, but I don't think
everyone agrees on it yet.

thx,

Jason.

Andrew Lunn (2):
  ARM: orion: spi: remove enable_clock_fix which is not used
  ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.

Jason Cooper (10):
  ARM: kirkwood: add dreamplug (fdt) support.
  ARM: kirkwood: convert uart0 to devicetree.
  ARM: kirkwood: fdt: use mrvl ticker symbol
  ARM: kirkwood: fdt: absorb kirkwood_init()
  ARM: kirkwood: add interrupt controller to devicetree.
  ARM: kirkwood: rtc-mv devicetree bindings
  ARM: kirkwood: use devicetree for rtc-mv
  ARM: kirkwood: mv_cesa devicetree support.
  ARM: kirkwood: use devicetree for orion-ehci
  ARM: kirkwood: use devicetree to init sata_mv

Jean-Christophe PLAGNIOL-VILLARD (1):
  of: add dma-mask binding

Michael Walle (3):
  ARM: kirkwood: mv_cesa devicetree bindings
  ARM: kirkwood: ehci-orion: add device tree binding
  ARM: kirkwood: sata_mv: add device tree binding

 .../devicetree/bindings/crypto/mv_cesa.txt |   18 ++
 .../devicetree/bindings/usb/ehci-orion.txt |5 +
 arch/arm/boot/dts/kirkwood-dreamplug.dts   |   41 
 arch/arm/boot/dts/kirkwood.dtsi|   26 +++
 arch/arm/mach-kirkwood/Kconfig |   14 ++
 arch/arm/mach-kirkwood/Makefile|1 +
 arch/arm/mach-kirkwood/Makefile.boot   |2 +
 arch/arm/mach-kirkwood/board-dt.c  |  206 
 arch/arm/mach-kirkwood/common.c|   41 -
 arch/arm/mach-kirkwood/common.h|6 +
 arch/arm/plat-orion/include/plat/audio.h   |1 -
 drivers/ata/sata_mv.c  |   18 ++-
 drivers/crypto/mv_cesa.c   |   13 ++
 drivers/of/platform.c  |   26 +++-
 drivers/rtc/rtc-mv.c   |9 +
 drivers/spi/spi-orion.c|5 -
 drivers/usb/host/ehci-orion.c  |   50 +-
 include/linux/spi/orion_spi.h  |1 -
 18 files changed, 464 insertions(+), 19 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/crypto/mv_cesa.txt
 create mode 100644 Documentation/devicetree/bindings/usb/ehci-orion.txt
 create mode 100644 arch/arm/boot/dts/kirkwood-dreamplug.dts
 create mode 100644 arch/arm/boot/dts/kirkwood.dtsi
 create mode 100644 arch/arm/mach-kirkwood/board-dt.c

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Re: [PATCH 06/14] ARM: kirkwood: convert uart0 to devicetree.

2012-03-07 Thread Jason
On Wed, Mar 07, 2012 at 09:13:04PM +, Arnd Bergmann wrote:
 On Wednesday 07 March 2012, Jason wrote:
  Grrr.  Now I'm getting frustrated.  I'm trying to boot without
  earlyprintk.  Evidently, something is wrong with the above, because the
  device boots all the way up (blinky lights come on), but I get no
  messages after the usual Uncompressing Linux... done, booting the
  kernel.
  
  Here's my most recent attempt:
  
  serial@f1012000 {
  device_type = serial;
  compatible = ns16550a;
  reg = 0xf1012000 0x100; /*phys addr*/
  virt-reg = 0xfed12000;  /*virt addr*/
  reg-shift = 2;
  reg-io-width = 1;
  interrupts = 33;
  current-speed = 115200;
  interrupt-parent = intc;
  clock-frequency = 2;
  };
  
  I've looked at what is done in the powerpc dt's, but, no luck.  When
  earlyprintk is enabled, I see no error messages, just:
  
  bootconsole [earlycon0] enabled
  debug: skip boot console de-registration.
  ...
  Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
  
  Any pointers?

 The of_serial driver (you did enable that one in Kconfig, right?)

Wow.  I can't believe I missed that.  I now get:

Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
f1012000.serial: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
console [ttyS0] enabled

without earlyprintk.

Thanks, Arnd.

Jason.

PS - the only change from your code is the 0x100.  I'm going to do some
more testing...
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Re: [PATCH 2/4] fdtget: Add -p to list the properties of a node

2012-03-07 Thread Jon Loeliger
 On Wed, Mar 07, 2012 at 01:27:59PM -0600, Jon Loeliger wrote:
   This option lists the properties of each node given as a parameter, one
   property per line.
   
   Signed-off-by: Simon Glass s...@chromium.org
  
  Applied.
 
 But not pushed out by the looks of it?

I thought it was

$ git log --oneline | head -6
7fcbef2 fdtget: Add -d to provide a default value
16c99ee fdtget: Add -l to list the subnodes of a node
30eb201 fdtget: Add -p to list the properties of a node
097ec97 fdtget: Fix multiple arg bug and add test for it
a6e6c60 dtc: Fix zero-length input segfault
e280442 Fix uninitialized access bug in utilfdt_decode_type

jdl
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Re: [PATCH 2/4] fdtget: Add -p to list the properties of a node

2012-03-07 Thread David Gibson
On Wed, Mar 07, 2012 at 07:25:03PM -0600, Jon Loeliger wrote:
  On Wed, Mar 07, 2012 at 01:27:59PM -0600, Jon Loeliger wrote:
This option lists the properties of each node given as a parameter, one
property per line.

Signed-off-by: Simon Glass s...@chromium.org
   
   Applied.
  
  But not pushed out by the looks of it?
 
 I thought it was
 
 $ git log --oneline | head -6
 7fcbef2 fdtget: Add -d to provide a default value
 16c99ee fdtget: Add -l to list the subnodes of a node
 30eb201 fdtget: Add -p to list the properties of a node
 097ec97 fdtget: Fix multiple arg bug and add test for it
 a6e6c60 dtc: Fix zero-length input segfault
 e280442 Fix uninitialized access bug in utilfdt_decode_type

Duh, sorry.  Forgetting the differences between fetches and pulls.

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david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [PATCH v2 1/4] mmc: omap_hsmmc: Convert hsmmc driver to use device tree

2012-03-07 Thread Rajendra Nayak

Hi Rob/Grant,

On Thursday 23 February 2012 05:31 PM, Rajendra Nayak wrote:

Define dt bindings for the ti-omap-hsmmc, and adapt
the driver to extract data (which was earlier passed as
platform_data) from device tree.


Any comments on these bindings for omap hsmmc? All the dependent
patches/series on which this series was based have now made it to
the respective -next of Mark and Chris.

regards,
Rajendra



Signed-off-by: Rajendra Nayakrna...@ti.com
---
  .../devicetree/bindings/mmc/ti-omap-hsmmc.txt  |   31 +
  drivers/mmc/host/omap_hsmmc.c  |   68 
  2 files changed, 99 insertions(+), 0 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt

diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt 
b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
new file mode 100644
index 000..e4fa8f0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -0,0 +1,31 @@
+* TI Highspeed MMC host controller for OMAP
+
+The Highspeed MMC Host Controller on TI OMAP family
+provides an interface for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+- compatible:
+ Should be ti,omap2-hsmmc, for OMAP2/3 controllers
+ Should be ti,omap4-hsmmc, for OMAP4 controllers
+- ti,hwmods: Must be mmcn, n is controller instance starting 1
+- reg : should contain hsmmc registers location and length
+
+Optional properties:
+ti,dual-volt: boolean, supports dual voltage cards
+supply-name-supply: phandle to the regulator device tree node
+supply-name examples are vmmc, vmmc_aux etc
+ti,bus-width: Number of data lines, default assumed is 1 if the property is 
missing.
+cd-gpios: GPIOs for card detection
+wp-gpios: GPIOs for write protection
+ti,non-removable: non-removable slot (like eMMC)
+
+Example:
+   mmc1: mmc@0x4809c000 {
+   compatible = ti,omap4-hsmmc;
+   reg =0x4809c000 0x400;
+   ti,hwmods = mmc1;
+   ti,dual-volt;
+   ti,bus-width =4;
+   vmmc-supply =vmmc; /* phandle to regulator node */
+   ti,non-removable;
+   };
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 35f6dc1..0c93d58 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -26,6 +26,9 @@
  #includelinux/platform_device.h
  #includelinux/timer.h
  #includelinux/clk.h
+#includelinux/of.h
+#includelinux/of_gpio.h
+#includelinux/of_device.h
  #includelinux/mmc/host.h
  #includelinux/mmc/core.h
  #includelinux/mmc/mmc.h
@@ -1718,6 +1721,46 @@ static void omap_hsmmc_debugfs(struct mmc_host *mmc)

  #endif

+#ifdef CONFIG_OF
+static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
+{
+   struct omap_mmc_platform_data *pdata;
+   struct device_node *np = dev-of_node;
+   u32 bus_width;
+
+   pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+   if (!pdata)
+   return NULL; /* out of memory */
+
+   if (of_find_property(np, ti,dual-volt, NULL))
+   pdata-controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT;
+
+   /* This driver only supports 1 slot */
+   pdata-nr_slots = 1;
+   pdata-slots[0].switch_pin = of_get_named_gpio(np, cd-gpios, 0);
+   pdata-slots[0].gpio_wp = of_get_named_gpio(np, wp-gpios, 0);
+
+   if (of_find_property(np, ti,non-removable, NULL)) {
+   pdata-slots[0].nonremovable = true;
+   pdata-slots[0].no_regulator_off_init = true;
+   }
+   of_property_read_u32(np, ti,bus-width,bus_width);
+   if (bus_width == 4)
+   pdata-slots[0].caps |= MMC_CAP_4_BIT_DATA;
+   else if (bus_width == 8)
+   pdata-slots[0].caps |= MMC_CAP_8_BIT_DATA;
+   return pdata;
+}
+#else
+static inline struct omap_mmc_platform_data
+   *of_get_hsmmc_pdata(struct device *dev)
+{
+   return NULL;
+}
+#endif
+
+static const struct of_device_id omap_mmc_of_match[];
+
  static int __init omap_hsmmc_probe(struct platform_device *pdev)
  {
struct omap_mmc_platform_data *pdata = pdev-dev.platform_data;
@@ -1725,6 +1768,14 @@ static int __init omap_hsmmc_probe(struct 
platform_device *pdev)
struct omap_hsmmc_host *host = NULL;
struct resource *res;
int ret, irq;
+   const struct of_device_id *match;
+
+   match = of_match_device(omap_mmc_of_match,pdev-dev);
+   if (match) {
+   pdata = of_get_hsmmc_pdata(pdev-dev);
+   if (match-data)
+   pdata-reg_offset = *(u16 *)match-data;
+   }

if (pdata == NULL) {
dev_err(pdev-dev, Platform Data is missing\n);
@@ -2120,12 +2171,29 @@ static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
.runtime_resume = omap_hsmmc_runtime_resume,
  };

+#if defined(CONFIG_OF)
+static u16 omap4_reg_offset = 0x100;
+
+static const struct of_device_id omap_mmc_of_match[] = {

Re: [PATCH 5/6] ARM: at91: add ram controller DT support

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
  diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h 
  b/arch/arm/mach-at91/include/mach/at91sam9x5.h
  index a297a77..88e43d5 100644
  --- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
  +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
  @@ -55,11 +55,6 @@
   #define AT91SAM9X5_BASE_USART2 0xf8024000
   
   /*
  - * System Peripherals
  - */
  -#define AT91SAM9X5_BASE_DDRSDRC0   0xe800
  -
  -/*
* Base addresses for early serial code (uncompress.h)
*/
   #define AT91_DBGU  AT91_BASE_DBGU0
  diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
  index 3e48b59..f86450d 100644
  --- a/arch/arm/mach-at91/setup.c
  +++ b/arch/arm/mach-at91/setup.c
  @@ -315,12 +315,33 @@ static void at91_dt_rstc(void)
  of_node_put(np);
   }
   
  +static struct of_device_id ramc_ids[] = {
  +   { .compatible = atmel,at91sam9260-sdramc },
  +   { .compatible = atmel,at91sam9g45-ddramc },
  +   { /*sentinel*/ }
  +};
  +
  +static void at91_dt_ramc(void)
  +{
  +   struct device_node *np;
  +
  +   np = of_find_matching_node(NULL, ramc_ids);
  +   if (!np)
  +   panic(unable to find compatible ram conroller node in dtb\n);
 
 You really can't boot if this fails? A WARN is better if it allows you
 to boot until at least your console is actually up.
if the restart is called you will have a oops so no it's a basic mandatory
device on at91

Best Regards,
J.
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Re: [PATCH v5 4/9] tegra: fdt: i2c: Add extra I2C bindings for U-Boot

2012-03-07 Thread Simon Glass
Hi Stephen,

On Wed, Mar 7, 2012 at 12:39 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 03/06/2012 10:00 PM, Simon Glass wrote:
 Add U-Boot's peripheral clock information to the Tegra20 device tree file.

 Signed-off-by: Simon Glass s...@chromium.org
 ...
 diff --git a/doc/device-tree-bindings/i2c/tegra20-i2c.txt 
 b/doc/device-tree-bindings/i2c/tegra20-i2c.txt
 ...
 +Required properties:
 + - clocks : Two clocks must be given, each as a phandle to the Tegra's
 +            CAR node and the clock number as a parameter:

 I'd rather rely on the common clock binding documentation for the format
 of the clock specifiers than duplicate the information here. True, that
 document isn't in U-Boot (nor is it final). I.e.:

    Two clocks must be specified:

 But I think this is fine for now (I might care more if submitting a doc
 file for the kernel tree), so

 Acked-by: Stephen Warren swar...@wwwdotorg.org

Thanks. Good to get this in.

Regards,
Simon

 +     - the I2C clock to use for the peripheral
 +     - the pll_p_out3 clock, which can be used for fast operation. This
 +          does not change and is the same for all I2C nodes.
 +
 +Example:
 +(TODO: merge with existing example):
 +
 +     i2c@7000c400 {
 +             #address-cells = 1;
 +             #size-cells = 0;
 +             compatible = nvidia,tegra20-i2c;
 +             reg = 0x7000C400 0x100;
 +             interrupts =  116 ;
 +             /* PERIPH_ID_I2C2, PLL_P_OUT3 */
 +             clocks = tegra_car 54, tegra_car 124;
 +     };
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