Add DT binding document for TI SN65DSI83 and SN65DSI84 DSI to LVDS bridge.
Reviewed-by: Linus Walleij
Signed-off-by: Marek Vasut
Cc: Douglas Anderson
Cc: Jagan Teki
Cc: Laurent Pinchart
Cc: Linus Walleij
Cc: Rob Herring
Cc: Sam Ravnborg
Cc: Stephen Boyd
Cc: devicet...@vger.kernel.org
To: dri-devel@lists.freedesktop.org
---
V2: Add compatible string for SN65DSI84, since this is now tested on it
V3: - Add 0x2c as valid i2c address
- Switch to schemas/graph.yaml
- Constraint data-lanes to <1>, <1 2>, <1 2 3>, <1 2 3 4> only
- Indent example by 4 spaces
- Handle dual-link LVDS with two ports and describe the second DSI
channel-B port as well. Based on the register defaults of DSI83
and DSI84, it is likely that the LVDS-channel-B and DSI-channel-B
hardware is present in all the chips, so just reuse port@0 and 2
for DSI83, port@0,2,3 for DSI84 and all of 0,1,2,3 for DSI85 when
that is supported
V4: - Fix typo in port@3 description
- Add RB from Linus Walleij
- Replace oneOf: and const with enum:
- ref /schemas/media/video-interfaces.yaml#
- Drop empty endpoint: and properties:
---
.../bindings/display/bridge/ti,sn65dsi83.yaml | 159 ++
1 file changed, 159 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
new file mode 100644
index ..d101233ae17f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
@@ -0,0 +1,159 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi83.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
+
+maintainers:
+ - Marek Vasut
+
+description: |
+ Texas Instruments SN65DSI83 1x Single-link MIPI DSI
+ to 1x Single-link LVDS
+ https://www.ti.com/lit/gpn/sn65dsi83
+ Texas Instruments SN65DSI84 1x Single-link MIPI DSI
+ to 1x Dual-link or 2x Single-link LVDS
+ https://www.ti.com/lit/gpn/sn65dsi84
+
+properties:
+ compatible:
+enum:
+ - ti,sn65dsi83
+ - ti,sn65dsi84
+
+ reg:
+enum:
+ - 0x2c
+ - 0x2d
+
+ enable-gpios:
+maxItems: 1
+description: GPIO specifier for bridge_en pin (active high).
+
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description: Video port for MIPI DSI Channel-A input
+
+properties:
+ endpoint:
+$ref: /schemas/media/video-interfaces.yaml#
+unevaluatedProperties: false
+
+properties:
+ data-lanes:
+description: array of physical DSI data lane indexes.
+minItems: 1
+maxItems: 4
+items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+
+ port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description: Video port for MIPI DSI Channel-B input
+
+properties:
+ endpoint:
+$ref: /schemas/media/video-interfaces.yaml#
+unevaluatedProperties: false
+
+properties:
+ data-lanes:
+description: array of physical DSI data lane indexes.
+minItems: 1
+maxItems: 4
+items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+
+ port@2:
+$ref: /schemas/graph.yaml#/properties/port
+description: Video port for LVDS Channel-A output (panel or bridge).
+
+ port@3:
+$ref: /schemas/graph.yaml#/properties/port
+description: Video port for LVDS Channel-B output (panel or bridge).
+
+required:
+ - port@0
+ - port@2
+
+required:
+ - compatible
+ - reg
+ - enable-gpios
+ - ports
+
+allOf:
+ - if:
+ properties:
+compatible:
+ contains:
+const: ti,sn65dsi83
+then:
+ properties:
+ports:
+ properties:
+port@1: false
+port@3: false
+
+ - if:
+ properties:
+compatible:
+ contains:
+const: ti,sn65dsi84
+then:
+ properties:
+ports:
+ properties:
+port@1: false
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+
+i2c {
+#address-cells = <1>;
+#size-cells = <0>;
+
+bridge@2d {
+compatible = "ti,sn65dsi83";
+reg = <0x2d>;
+
+enable-gpios = < 1 GPIO_ACTIVE_HIGH>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+
