Re: [Emc-users] Fun with FPGAs

[Peter C. Wallace]

On Tue, 13 Nov 2018, Charles Steinkuehler wrote:


Date: Tue, 13 Nov 2018 20:12:19 -0600
From: Charles Steinkuehler 
Reply-To: "Enhanced Machine Controller (EMC)"

To: emc-users@lists.sourceforge.net
Subject: Re: [Emc-users] Fun with FPGAs

On 11/13/2018 6:01 AM, Les Newell wrote:


Of course using the generated code in an actual product would be
crazy. It relied heavily on undocumented quirks of the chip. Any
slight change to the chip internal design by the manufacturer is
very likely to break the code. Even production variations would
affect the results.


Which is why their next focus was going to target multiple lots and
temperature ranges.  I've worked with FPGA's for 30+ years and what
they did was really cool.  While the results don't directly map to a
(theoretically identical) different portion of the chip, note how
rapidly the implementation re-converges to a successful design.

I've also had some experience in pushing FPGA's into "non-standard"
behavior, including using the I/O blocks as delta-sigma ADCs & linear
amplifiers and using internal gates as a ring oscillator.  There's a
lot that's possible which you can't do if you obey all the rules!  :)

Their design process might not be what you'd want to use for your Next
Big Thing (tm) in today's world, but IMHO it's an intriguing method
with a lot of potential.

--
Charles Steinkuehler
char...@steinkuehler.net



I'm using the simple delta-sigma A-Ds on some new boards using Spartan6 to get 
things like potentiometer or thermistor inputs. It works quite well, about 11 
bit resolution with 2 Rs and a C per channel. I chose the summing junction 
method (1/2 of all LVDS pairs tied 1/2 way up). This has the advantage of 
using a fixed common mode so you get full scale range (or greater if you use a 
larger resistor on the input vs feedback) but of course the disadvantage of 
lower input impedance than the "follower" method.




Peter Wallace
Mesa Electronics

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(")_(") signature to help him gain world domination.



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Re: [Emc-users] Fun with FPGAs

[Charles Steinkuehler]

On 11/13/2018 6:01 AM, Les Newell wrote:
> 
> Of course using the generated code in an actual product would be
> crazy. It relied heavily on undocumented quirks of the chip. Any
> slight change to the chip internal design by the manufacturer is
> very likely to break the code. Even production variations would
> affect the results.

Which is why their next focus was going to target multiple lots and
temperature ranges.  I've worked with FPGA's for 30+ years and what
they did was really cool.  While the results don't directly map to a
(theoretically identical) different portion of the chip, note how
rapidly the implementation re-converges to a successful design.

I've also had some experience in pushing FPGA's into "non-standard"
behavior, including using the I/O blocks as delta-sigma ADCs & linear
amplifiers and using internal gates as a ring oscillator.  There's a
lot that's possible which you can't do if you obey all the rules!  :)

Their design process might not be what you'd want to use for your Next
Big Thing (tm) in today's world, but IMHO it's an intriguing method
with a lot of potential.

-- 
Charles Steinkuehler
char...@steinkuehler.net



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Re: [Emc-users] Fun with FPGAs

[Les Newell]

Hi Gene,

But I didn't see any comparisons to doing it this way to
doing it the conventional way while skimming thru this artical.



That's because no-one could figure out a way of doing what the genetic 
algorithm achieved in the conventional way. The chip was not provided 
with any external timing mechanism so it had to rely on internal delays 
etc for timing. Of course using the generated code in an actual product 
would be crazy. It relied heavily on undocumented quirks of the chip. 
Any slight change to the chip internal design by the manufacturer is 
very likely to break the code. Even production variations would affect 
the results.


Les


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Re: [Emc-users] Fun with FPGAs

[Chris Albertson]

I think what people have learned about genetic algorithms is that the
fitness function needs to have some randomness in it otherwise you get
something like overfitting.

For example, it might be that you intend to let a robot learn to walk but
after running a simulation for 300 hours you find you have taught the robot
to walk from point A to point B and the solution doe not work for any two
other points.   This is a common problem.

In any case, a genetic algorithm would be a very poor way to program a
machine controller.   You want a robust algorithmic solution.   But today
microcontrollers are so fast, powerful and cheap.  The FPGA is not really
needed.I can create steps faster than 1MHz with zero measurable jitter
with a $2 microcontroller.

On Mon, Nov 12, 2018 at 4:12 AM andy pugh  wrote:

> I remember hearing of this experiment years ago, but hadn't previously
> seen the original source.
>
>
> http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.50.9691=rep1=pdf
>
> An evolutionary algorithm was used to create an FPGA configuration to
> perform a particular task.
> Curiously the final working result depended on a block with no logical
> connections to the rest of the network. The solution is dependent on a
> quirk of the physics of the actual device.
>
> --
> atp
> "A motorcycle is a bicycle with a pandemonium attachment and is
> designed for the especial use of mechanical geniuses, daredevils and
> lunatics."
> — George Fitch, Atlanta Constitution Newspaper, 1916
>
>
> ___
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>


-- 

Chris Albertson
Redondo Beach, California

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Re: [Emc-users] Fun with FPGAs

[Gene Heskett]

On Monday 12 November 2018 07:06:14 andy pugh wrote:

> I remember hearing of this experiment years ago, but hadn't previously
> seen the original source.
>
> http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.50.9691=r
>ep1=pdf
>
> An evolutionary algorithm was used to create an FPGA configuration to
> perform a particular task.
> Curiously the final working result depended on a block with no logical
> connections to the rest of the network. The solution is dependent on a
> quirk of the physics of the actual device.

A most interesting paper, one that may reduce the size of an fpga to get 
a job done. But I didn't see any comparisons to doing it this way to 
doing it the conventional way while skimming thru this artical.

Makes me wonder how big an fpga would be needed to duplicate a mesa 
7i90HD with the usual config in it. And how fast its spi interface would 
be under this sort of a auto-program. From my results here, its just a 
tad slower transmitting back to the r-pi than it is in reading the 
r-pi's data transmissions. From the pi end of the cable, the pi can 
write those 32 bit packets at 42 megabaud, but must be slowed to 25 
megabaud when the 7i90HD is sending its responses back. The data seems 
bulletproof at those speeds. This is of coarse VERY dependent on the 
cable length, in my case maybe an inch.

The difference is more than likely the differences in the waveforms since 
a 1-0 transition is noticeable faster in rise times compared to the 0-1 
transition, which on my 1000mhz sampler, is visibly slower. But to 
verify that would take an even faster scope, preferably a quad trace 
which quickly gets out of my pay grade. This one was only $400 from 
China. :(

Thanks for finding and posting that Andy.

-- 
Cheers, Gene Heskett
--
"There are four boxes to be used in defense of liberty:
 soap, ballot, jury, and ammo. Please use in that order."
-Ed Howdershelt (Author)
Genes Web page 


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[Emc-users] Fun with FPGAs

[andy pugh]

I remember hearing of this experiment years ago, but hadn't previously
seen the original source.

http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.50.9691=rep1=pdf

An evolutionary algorithm was used to create an FPGA configuration to
perform a particular task.
Curiously the final working result depended on a block with no logical
connections to the rest of the network. The solution is dependent on a
quirk of the physics of the actual device.

-- 
atp
"A motorcycle is a bicycle with a pandemonium attachment and is
designed for the especial use of mechanical geniuses, daredevils and
lunatics."
— George Fitch, Atlanta Constitution Newspaper, 1916


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