[fpc-devel] question about parameter loading code
Dear sirs, When trying to generate code debuggable by GDB, I meet a problem: * it seems mips C code will expect a frame pointer = sp after stack adjustment * but in cpupara.pas, when we create para info, we don't know yet the whole stack size, thus the reference offset cannot be set correctly In current code, I use move fp, sp addiu sp,sp,-LocalSize ... and use the frame pointer fp as reference base, so the offset for callee can be the same as the caller side. In MIPS ABI, the parameter area for callee functions is at the bottom of caller function's stack, so the offsets are decided only by parameters when use fp(or the caller's sp, or the sp upon function entry) as the base. C code is something like: addiu sp,sp,-LocalSize swfp, 4(sp) move fp, sp in this way, I don't know how to generate parameter references since no usable base register to get fixed offset for parameters in create_paraloc_info_intern. Could you give some hints? Best Regards ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel
Re: [fpc-devel] question about parameter loading code
Dear sirs, C code is something like: addiu sp,sp,-LocalSize swfp, 4(sp) move fp, sp in this way, I don't know how to generate parameter references since no usable base register to get fixed offset for parameters in create_paraloc_info_intern. Can we use a special virtual register as base here? Then after the stack size is known, we could replace the base/offset with real fp and offset. 1, At what time can the stack size of a procedure be known/fix? 2, Is there any other access to the para array before gen_load_para_value? Also for the debug stabs generation, we could mark the symbol need to get special treating, and handle it when writing it out. Could you give some hints? Best Regards ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel
Re: [fpc-devel] question about parameter loading code
Am 10.06.2012 08:15, schrieb Fuxin Zhang: Dear sirs, When trying to generate code debuggable by GDB, I meet a problem: * it seems mips C code will expect a frame pointer = sp after stack adjustment * but in cpupara.pas, when we create para info, we don't know yet the whole stack size, thus the reference offset cannot be set correctly This is exactly the point where I'am already stuck with MIPS for several days/weeks. I'am still no sure what's the best solution ... ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel
Re: [fpc-devel] question about parameter loading code
10.06.2012 20:26, Florian Klämpfl пишет: Am 10.06.2012 08:15, schrieb Fuxin Zhang: Dear sirs, When trying to generate code debuggable by GDB, I meet a problem: * it seems mips C code will expect a frame pointer = sp after stack adjustment * but in cpupara.pas, when we create para info, we don't know yet the whole stack size, thus the reference offset cannot be set correctly This is exactly the point where I'am already stuck with MIPS for several days/weeks. I'am still no sure what's the best solution ... As far as I can understand, basically the same problem stands in the way of implementing compliant stack frames for x86_64-win64. I was thinking about a having a virtual framepointer register. We'll need to: - keep a list of all assembler instructions that reference this virtual FP register - after final frame size becomes known, fixup these instructions to reference a real FP with adjusted offset. Or maybe not keep a separate list of instructions, but instead just iterate the entire procedure asmlist (because about every second instruction is subject to fixup). Regards, Sergei ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel
Re: [fpc-devel] question about parameter loading code
On 10 Jun 2012, at 18:50, Sergei Gorelkin wrote: - after final frame size becomes known, fixup these instructions to reference a real FP with adjusted offset. Or maybe not keep a separate list of instructions, but instead just iterate the entire procedure asmlist (because about every second instruction is subject to fixup). The problem on MIPS (and other RISC architectures), is that you may need more than one instruction to access such a memory location if the final offset is larger than a certain limit. Jonas___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel
Re: [fpc-devel] question about parameter loading code
Am 10.06.2012 19:18, schrieb Jonas Maebe: On 10 Jun 2012, at 18:50, Sergei Gorelkin wrote: - after final frame size becomes known, fixup these instructions to reference a real FP with adjusted offset. Or maybe not keep a separate list of instructions, but instead just iterate the entire procedure asmlist (because about every second instruction is subject to fixup). The problem on MIPS (and other RISC architectures), is that you may need more than one instruction to access such a memory location if the final offset is larger than a certain limit. This is why I'am working on being able to generate code more than once for procedures if needed. ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel
