[Bug rtl-optimization/57046] [4.8/4.9 Regression] wrong code generated by gcc 4.8.0 on i686
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57046 Jakub Jelinek jakub at gcc dot gnu.org changed: What|Removed |Added Priority|P3 |P1 CC||jakub at gcc dot gnu.org, ||vmakarov at gcc dot gnu.org Component|c |rtl-optimization --- Comment #3 from Jakub Jelinek jakub at gcc dot gnu.org 2013-04-23 12:09:58 UTC --- Started with http://gcc.gnu.org/r192719 aka LRA merge, the problematic function is emac_operation.
[Bug rtl-optimization/57046] [4.8/4.9 Regression] wrong code generated by gcc 4.8.0 on i686
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57046 --- Comment #4 from Jakub Jelinek jakub at gcc dot gnu.org 2013-04-23 12:26:35 UTC --- We have after the get_value call: (insn 73 30 32 6 (set (reg:SI 76 [ D.1441 ]) (reg:SI 0 ax)) pr57046.c:42 85 {*movsi_internal} (expr_list:REG_DEAD (reg:SI 0 ax) (nil))) (insn 32 73 33 6 (parallel [ (set (reg:SI 73 [ D.1443 ]) (ashift:SI (subreg:SI (reg:DI 60 [ D.1441 ]) 0) (const_int 2 [0x2]))) (clobber (reg:CC 17 flags)) ]) 502 {*ashlsi3_1} (expr_list:REG_DEAD (reg:DI 60 [ D.1441 ]) (expr_list:REG_UNUSED (reg:CC 17 flags) (nil and IRA decides to put pseudo 76 into %ebx and pseudo 60 into %ecx. Either it is an IRA bug, or IRA takes into account that we only really need the low 32-bits of pseudo 60 at that point. In any case, reload loads SImode %ecx from the stack and uses it in the shift, while LRA loads full DImode %ecx (i.e. %ecx and %ebx) from the stack, then uses just the low bits from that (i.e. %ecx) in the shift. So the LRA generated code clobbers the value in %ebx, and get_value call is even later on DCEd because of it.
[Bug rtl-optimization/57046] [4.8/4.9 Regression] wrong code generated by gcc 4.8.0 on i686
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57046 Vladimir Makarov vmakarov at redhat dot com changed: What|Removed |Added CC||vmakarov at redhat dot com --- Comment #5 from Vladimir Makarov vmakarov at redhat dot com 2013-04-23 15:34:40 UTC --- (In reply to comment #4) We have after the get_value call: (insn 73 30 32 6 (set (reg:SI 76 [ D.1441 ]) (reg:SI 0 ax)) pr57046.c:42 85 {*movsi_internal} (expr_list:REG_DEAD (reg:SI 0 ax) (nil))) (insn 32 73 33 6 (parallel [ (set (reg:SI 73 [ D.1443 ]) (ashift:SI (subreg:SI (reg:DI 60 [ D.1441 ]) 0) (const_int 2 [0x2]))) (clobber (reg:CC 17 flags)) ]) 502 {*ashlsi3_1} (expr_list:REG_DEAD (reg:DI 60 [ D.1441 ]) (expr_list:REG_UNUSED (reg:CC 17 flags) (nil and IRA decides to put pseudo 76 into %ebx and pseudo 60 into %ecx. Either it is an IRA bug, or IRA takes into account that we only really need the low 32-bits of pseudo 60 at that point. In any case, reload loads SImode %ecx from the stack and uses it in the shift, while LRA loads full DImode %ecx (i.e. %ecx and %ebx) from the stack, then uses just the low bits from that (i.e. %ecx) in the shift. So the LRA generated code clobbers the value in %ebx, and get_value call is even later on DCEd because of it. It seems like a discrepancy in IRA which allocates in terms of subregisters and LRA splitting (including call save/restore as in this case) in terms of pseudos. I guess fixing this might take about week.