Re: [EXT] Re: [PATCH] aarch64: Change costs for TX2 to expose more vectorization opportunities
I approve of this patch. I'm responsible for GCC for TX2 at Marvell. Andrew
Pinski should certainly chime in if he wants.
Joel
On 7/6/20, 10:48 AM, "Gcc-patches on behalf of Richard Sandiford"
wrote:
External Email
--
Anton Youdkevitch writes:
> This patch changes some vector costs for TX2 so that
> more vectorizations beneficial for TX2 chip can happen.
>
> The new cost model makes the x264 benchmark of CPU2017
> 7% faster with no negative performance impact on other
> benchmarks.
>
> Bootstrapped on linux-aarch64
>
> 2020-07-06 Anton Youdkevitch
> gcc/
> * config/aarch64/aarch64.c (thunderx2t99_regmove_cost):
> Change instruction cost
> (thunderx2t99_vector_cost): Likewise
OK if Andrew agrees.
Thanks,
Richard
>
> From 3440e019c05fe5b565041cad549c6eefa2004a2b Mon Sep 17 00:00:00 2001
> From: Anton Youdkevitch
> Date: Tue, 26 May 2020 04:23:04 -0700
> Subject: [PATCH] Change costs for TX2 to expose more vectorization
opportunities
>
> Make the costs such that they do not exaclty reflect
> the actual instructions costs from the manual but make
> the codegen emit the code we want it to.
> ---
> gcc/config/aarch64/aarch64.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index e92c7e6..18c2251 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -535,9 +535,9 @@ static const struct cpu_regmove_cost
thunderx2t99_regmove_cost =
> {
>1, /* GP2GP */
>/* Avoid the use of int<->fp moves for spilling. */
> - 8, /* GP2FP */
> - 8, /* FP2GP */
> - 4 /* FP2FP */
> + 5, /* GP2FP */
> + 6, /* FP2GP */
> + 3, /* FP2FP */
> };
>
> static const struct cpu_regmove_cost thunderx3t110_regmove_cost =
> @@ -704,15 +704,15 @@ static const struct cpu_vector_cost
thunderx2t99_vector_cost =
>6, /* scalar_fp_stmt_cost */
>4, /* scalar_load_cost */
>1, /* scalar_store_cost */
> - 5, /* vec_int_stmt_cost */
> - 6, /* vec_fp_stmt_cost */
> + 4, /* vec_int_stmt_cost */
> + 5, /* vec_fp_stmt_cost */
>10, /* vec_permute_cost */
>6, /* vec_to_scalar_cost */
>5, /* scalar_to_vec_cost */
> - 8, /* vec_align_load_cost */
> - 8, /* vec_unalign_load_cost */
> - 4, /* vec_unalign_store_cost */
> - 4, /* vec_store_cost */
> + 4, /* vec_align_load_cost */
> + 4, /* vec_unalign_load_cost */
> + 1, /* vec_unalign_store_cost */
> + 1, /* vec_store_cost */
>2, /* cond_taken_branch_cost */
>1 /* cond_not_taken_branch_cost */
> };
[PATCH v2] aarch64: Add TX3 machine model
Yes, Bellsoft's contribution is to be covered under the Marvell copyright assignment, as this is a work for hire. Joel >Yes, Bellsoft's contribution is to be covered under the Marvell copyright >assignment, as this is a work for hire. > >Joel > >>>Hi Anton, >>> -Original Message- From: Gcc-patches On Behalf Of Anton Youdkevitch Sent: 20 April 2020 19:29 To: gcc-patches@gcc.gnu.org Cc: jo...@marvell.com Subject: [PATCH v2] aarch64: Add TX3 machine model Here is the patch introducing thunderxt311 maching model for the scheduler. A name for the new chip was added to the list of the names to be recognized as a valid parameter for mcpu and mtune flags. The TX2 cost model was reused for TX3. The previously used "cryptic" name for the command line parameter is replaced with the same "thunderxt311" name. Bootstrapped on AArch64. >>> >>>Thanks for the patch. I had meant to ask, do you have a copyright assignment >>>in place? >>>We'd need one to accept a contribution of this size. >>>Thanks, >>>Kyrill >>> 2020-04-20 Anton Youdkevitch * config/aarch64/aarch64-cores.def: Add the chip name. * config/aarch64/aarch64-tune.md: Regenerated. * gcc/config/aarch64/aarch64.c: Add the cost tables for the chip. * gcc/config/aarch64/thunderx3t11.md: New file: add the new machine model for the scheduler * gcc/config/aarch64/aarch64.md: Include the new model. --- gcc/config/aarch64/aarch64-cores.def | 3 + gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/aarch64/aarch64.c | 27 + gcc/config/aarch64/aarch64.md| 1 + gcc/config/aarch64/thunderx3t11.md | 686 +++ 5 files changed, 718 insertions(+), 1 deletion(-) >>> >>> >>> >>> >
[PATCH v2] aarch64: Add TX3 machine model
I just joined the gcc-patches list, so I hope the mail software can parse this out with an "In-Reply-To" header. I work for Marvell, and Anton's work is approved for submittal. I wrote the first version of the .md file. I'm certain we have a copyright assignment.in place, as we've had employees in the past six months submit changes, for example Steve Ellcey. Joel Jones >Hi Anton, > >> -Original Message- >> From: Gcc-patches On Behalf Of Anton >> Youdkevitch >> Sent: 20 April 2020 19:29 >> To: gcc-patches@gcc.gnu.org >> Cc: jo...@marvell.com >> Subject: [PATCH v2] aarch64: Add TX3 machine model >> >> Here is the patch introducing thunderxt311 maching model >> for the scheduler. A name for the new chip was added to the >> list of the names to be recognized as a valid parameter for mcpu >> and mtune flags. The TX2 cost model was reused for TX3. >> >> The previously used "cryptic" name for the command line >> parameter is replaced with the same "thunderxt311" name. >> >> Bootstrapped on AArch64. > >Thanks for the patch. I had meant to ask, do you have a copyright assignment >in place? >We'd need one to accept a contribution of this size. >Thanks, >Kyrill > >> >> 2020-04-20 Anton Youdkevitch >> >> * config/aarch64/aarch64-cores.def: Add the chip name. >> * config/aarch64/aarch64-tune.md: Regenerated. >> * gcc/config/aarch64/aarch64.c: Add the cost tables for the chip. >> * gcc/config/aarch64/thunderx3t11.md: New file: add the new >> machine model for the scheduler >> * gcc/config/aarch64/aarch64.md: Include the new model. >> >> --- >> gcc/config/aarch64/aarch64-cores.def | 3 + >> gcc/config/aarch64/aarch64-tune.md | 2 +- >> gcc/config/aarch64/aarch64.c | 27 + >> gcc/config/aarch64/aarch64.md| 1 + >> gcc/config/aarch64/thunderx3t11.md | 686 +++ >> 5 files changed, 718 insertions(+), 1 deletion(-)
