Re: [PATCH] D support for RISC-V

[Iain Buclaw]

On Tue, 9 Apr 2019 at 11:53, David Abdurachmanov
 wrote:
>
> diff --git a/libphobos/libdruntime/rt/sections_elf_shared.d 
> b/libphobos/libdruntime/rt/sections_elf_shared.d
> index d4e1ff07699..45c1dcbc7f3 100644
> --- a/libphobos/libdruntime/rt/sections_elf_shared.d
> +++ b/libphobos/libdruntime/rt/sections_elf_shared.d
> @@ -10,6 +10,9 @@
>
>  module rt.sections_elf_shared;
>
> +version (RISCV32) version = RISCV_Any;
> +version (RISCV64) version = RISCV_Any;
> +
>  version (CRuntime_Glibc) enum SharedELF = true;
>  else version (FreeBSD) enum SharedELF = true;
>  else version (NetBSD) enum SharedELF = true;
> @@ -671,7 +674,16 @@ version (Shared)
>  if (dyn.d_tag == DT_STRTAB)
>  {
>  version (linux)
> -strtab = cast(const(char)*)dyn.d_un.d_ptr;
> +{
> +// This might change in future glibc releases (after 
> 2.29) as dynamic sections
> +// are not required to be read-only on RISC-V. This was 
> copy & pasted from MIPS while
> +// upstreaming RISC-V support. Otherwise MIPS is the 
> only arch which sets in glibc:
> +// #define DL_RO_DYN_SECTION 1
> +version (RISCV_Any)
> +strtab = cast(const(char)*)(info.dlpi_addr + 
> dyn.d_un.d_ptr); // relocate
> +else
> +strtab = cast(const(char)*)dyn.d_un.d_ptr;
> +}
>  else version (FreeBSD)
>  strtab = cast(const(char)*)(info.dlpi_addr + 
> dyn.d_un.d_ptr); // relocate
>  else version (NetBSD)

This needs to be rebased to patch gcc/sections/elf_shared.d

> diff --git 
> a/libphobos/src/std/experimental/allocator/building_blocks/region.d 
> b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> index dfcecce72bd..cafe059a61f 100644
> --- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
> +++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> @@ -391,7 +391,8 @@ struct InSituRegion(size_t size, size_t minAlign = 
> platformAlignment)
>  else version (PPC) enum growDownwards = Yes.growDownwards;
>  else version (PPC64) enum growDownwards = Yes.growDownwards;
>  else version (MIPS32) enum growDownwards = Yes.growDownwards;
> -else version (MIPS64) enum growDownwards = Yes.growDownwards;
> +else version (RISCV32) enum growDownwards = Yes.growDownwards;
> +else version (RISCV64) enum growDownwards = Yes.growDownwards;
>  else version (SPARC) enum growDownwards = Yes.growDownwards;
>  else version (SystemZ) enum growDownwards = Yes.growDownwards;
>  else static assert(0, "Dunno how the stack grows on this architecture.");

This has been upstreamed and committed in r270296.

> diff --git a/libphobos/src/std/math.d b/libphobos/src/std/math.d
> index e98e746a856..9fe746501a4 100644
> --- a/libphobos/src/std/math.d
> +++ b/libphobos/src/std/math.d
> @@ -162,6 +162,8 @@ version (AArch64)   version = ARM_Any;
>  version (ARM)   version = ARM_Any;
>  version (SPARC) version = SPARC_Any;
>  version (SPARC64)   version = SPARC_Any;
> +version (RISCV32)   version = RISCV_Any;
> +version (RISCV64)   version = RISCV_Any;
>
>  version (D_InlineAsm_X86)
>  {

Apart from the asm { } code, same with this as well.

Everything else is OK.

-- 
Iain

Re: [PATCH] D support for RISC-V

[Iain Buclaw]

On Wed, 10 Apr 2019 at 01:58, Jim Wilson  wrote:
>
> On Tue, Apr 9, 2019 at 10:36 AM Iain Buclaw  wrote:
> > Any objection if I upstream the non-asm bits?
>
> Doesn't all of it, except maybe the configure.tgt patch need to go
> upstream first?  And do you need some paperwork or button click from
> David for D language patches for the copyright assignment?
>

There is nothing to be signed, only the compiler front-end itself has
such a process in place.

> Is there a problem with the asm bits?  The fenv.h functions like
> fegetenv could be used for this, assuming you can include a C header
> file in D code.  But if this is the D language implementation of
> fenv.h, then you probably can't avoid the assembly code.
>

The asm syntax is specific to gdc, and there's not presently a policy
in place to upstream them (each module that contains deviations is
appropriately marked at the top of the file) .  Ideally asm bits
should be in separate modules, then it would just be a case of
swapping upstreams for our own.

The FloatingPointControl struct is more closely related to
fpu-control.h.  And no, you can't just include C headers from the D
compiler. that would make quite a lot of things simpler if it did.

Iain.

Re: [PATCH] D support for RISC-V

[Jim Wilson]

On Tue, Apr 9, 2019 at 10:36 AM Iain Buclaw  wrote:
> Any objection if I upstream the non-asm bits?

Doesn't all of it, except maybe the configure.tgt patch need to go
upstream first?  And do you need some paperwork or button click from
David for D language patches for the copyright assignment?

Is there a problem with the asm bits?  The fenv.h functions like
fegetenv could be used for this, assuming you can include a C header
file in D code.  But if this is the D language implementation of
fenv.h, then you probably can't avoid the assembly code.

Otherwise I don't have an opinion on this.  I haven't tried testing D
language support yet.

Jim

Re: [PATCH] D support for RISC-V

[Iain Buclaw]

On Tue, 9 Apr 2019 at 11:53, David Abdurachmanov
 wrote:
>
> This patch has been in Fedora/RISCV for the last couple of months.
> I have tested simple applications (e.g. word count example), which
> worked without a problem.
>
> I believe Iain Buclaw did run GCC testsuite using Fedora/RISCV
> build and QEMU. The patch has not changed since that.
>

I've got a change in method to the way the unittests are ran, I'll
re-run with that and check the results.

> @@ -671,7 +674,16 @@ version (Shared)
>  if (dyn.d_tag == DT_STRTAB)
>  {
>  version (linux)
> -strtab = cast(const(char)*)dyn.d_un.d_ptr;
> +{
> +// This might change in future glibc releases (after 
> 2.29) as dynamic sections
> +// are not required to be read-only on RISC-V. This was 
> copy & pasted from MIPS while
> +// upstreaming RISC-V support. Otherwise MIPS is the 
> only arch which sets in glibc:
> +// #define DL_RO_DYN_SECTION 1
> +version (RISCV_Any)
> +strtab = cast(const(char)*)(info.dlpi_addr + 
> dyn.d_un.d_ptr); // relocate

I guess we'll pre-emptively need to add MIPS_Any here as well.

> diff --git 
> a/libphobos/src/std/experimental/allocator/building_blocks/region.d 
> b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> index dfcecce72bd..cafe059a61f 100644
> --- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
> +++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> @@ -391,7 +391,8 @@ struct InSituRegion(size_t size, size_t minAlign = 
> platformAlignment)
>  else version (PPC) enum growDownwards = Yes.growDownwards;
>  else version (PPC64) enum growDownwards = Yes.growDownwards;
>  else version (MIPS32) enum growDownwards = Yes.growDownwards;
> -else version (MIPS64) enum growDownwards = Yes.growDownwards;
> +else version (RISCV32) enum growDownwards = Yes.growDownwards;
> +else version (RISCV64) enum growDownwards = Yes.growDownwards;
>  else version (SPARC) enum growDownwards = Yes.growDownwards;
>  else version (SystemZ) enum growDownwards = Yes.growDownwards;
>  else static assert(0, "Dunno how the stack grows on this architecture.");
> diff --git a/libphobos/src/std/math.d b/libphobos/src/std/math.d
> index e98e746a856..9fe746501a4 100644
> --- a/libphobos/src/std/math.d
> +++ b/libphobos/src/std/math.d
> @@ -162,6 +162,8 @@ version (AArch64)   version = ARM_Any;
>  version (ARM)   version = ARM_Any;
>  version (SPARC) version = SPARC_Any;
>  version (SPARC64)   version = SPARC_Any;
> +version (RISCV32)   version = RISCV_Any;
> +version (RISCV64)   version = RISCV_Any;
>

Any objection if I upstream the non-asm bits?

-- 
Iain

Re: [PATCH] D support for RISC-V

[David Abdurachmanov]

On Tue, Apr 9, 2019 at 12:22 PM Andreas Schwab  wrote:
>
> On Apr 09 2019, David Abdurachmanov  wrote:
>
> > diff --git 
> > a/libphobos/src/std/experimental/allocator/building_blocks/region.d 
> > b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> > index dfcecce72bd..cafe059a61f 100644
> > --- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
> > +++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> > @@ -391,7 +391,8 @@ struct InSituRegion(size_t size, size_t minAlign = 
> > platformAlignment)
> >  else version (PPC) enum growDownwards = Yes.growDownwards;
> >  else version (PPC64) enum growDownwards = Yes.growDownwards;
> >  else version (MIPS32) enum growDownwards = Yes.growDownwards;
> > -else version (MIPS64) enum growDownwards = Yes.growDownwards;
> > +else version (RISCV32) enum growDownwards = Yes.growDownwards;
> > +else version (RISCV64) enum growDownwards = Yes.growDownwards;
>
> Why do you remove the MIPS64 case?

Good catch. It's a mistake. Will be fixed in v2.

david

> Andreas.
>
> --
> Andreas Schwab, SUSE Labs, sch...@suse.de
> GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
> "And now for something completely different."

Re: [PATCH] D support for RISC-V

[Andreas Schwab]

On Apr 09 2019, David Abdurachmanov  wrote:

> diff --git 
> a/libphobos/src/std/experimental/allocator/building_blocks/region.d 
> b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> index dfcecce72bd..cafe059a61f 100644
> --- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
> +++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d
> @@ -391,7 +391,8 @@ struct InSituRegion(size_t size, size_t minAlign = 
> platformAlignment)
>  else version (PPC) enum growDownwards = Yes.growDownwards;
>  else version (PPC64) enum growDownwards = Yes.growDownwards;
>  else version (MIPS32) enum growDownwards = Yes.growDownwards;
> -else version (MIPS64) enum growDownwards = Yes.growDownwards;
> +else version (RISCV32) enum growDownwards = Yes.growDownwards;
> +else version (RISCV64) enum growDownwards = Yes.growDownwards;

Why do you remove the MIPS64 case?

Andreas.

-- 
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

[PATCH] D support for RISC-V

[David Abdurachmanov]

This patch has been in Fedora/RISCV for the last couple of months.
I have tested simple applications (e.g. word count example), which
worked without a problem.

I believe Iain Buclaw did run GCC testsuite using Fedora/RISCV
build and QEMU. The patch has not changed since that.

Signed-off-by: David Abdurachmanov 
---
 libphobos/configure.tgt   |  2 +
 libphobos/libdruntime/core/atomic.d   |  6 +-
 .../libdruntime/rt/sections_elf_shared.d  | 14 -
 .../allocator/building_blocks/region.d|  3 +-
 libphobos/src/std/math.d  | 59 +++
 5 files changed, 79 insertions(+), 5 deletions(-)

diff --git a/libphobos/configure.tgt b/libphobos/configure.tgt
index 0471bfd816b..811fdfa21a7 100644
--- a/libphobos/configure.tgt
+++ b/libphobos/configure.tgt
@@ -32,6 +32,8 @@ case "${target}" in
;;
   x86_64-*-netbsd* | i?86-*-netbsd*)
;;
+  riscv*-*-linux*)
+   ;;
   *)
UNSUPPORTED=1
;;
diff --git a/libphobos/libdruntime/core/atomic.d 
b/libphobos/libdruntime/core/atomic.d
index 0b39cddb6c9..5a6c4b854c7 100644
--- a/libphobos/libdruntime/core/atomic.d
+++ b/libphobos/libdruntime/core/atomic.d
@@ -1353,7 +1353,7 @@ else version (GNU)
 
 private bool casImpl(T,V1,V2)( shared(T)* here, V1 ifThis, V2 writeThis ) 
pure nothrow @nogc @trusted
 {
-static assert(GNU_Have_Atomics, "cas() not supported on this 
architecture");
+static assert(GNU_Have_Atomics || GNU_Have_LibAtomic, "cas() not 
supported on this architecture");
 bool res = void;
 
 static if (T.sizeof == byte.sizeof)
@@ -1406,7 +1406,7 @@ else version (GNU)
 {
 static assert(ms != MemoryOrder.rel, "Invalid MemoryOrder for 
atomicLoad");
 static assert(__traits(isPOD, T), "argument to atomicLoad() must be 
POD");
-static assert(GNU_Have_Atomics, "atomicLoad() not supported on this 
architecture");
+static assert(GNU_Have_Atomics || GNU_Have_LibAtomic, "atomicLoad() 
not supported on this architecture");
 
 static if (T.sizeof == ubyte.sizeof)
 {
@@ -1444,7 +1444,7 @@ else version (GNU)
 {
 static assert(ms != MemoryOrder.acq, "Invalid MemoryOrder for 
atomicStore");
 static assert(__traits(isPOD, T), "argument to atomicLoad() must be 
POD");
-static assert(GNU_Have_Atomics, "atomicStore() not supported on this 
architecture");
+static assert(GNU_Have_Atomics || GNU_Have_LibAtomic, "atomicStore() 
not supported on this architecture");
 
 static if (T.sizeof == ubyte.sizeof)
 {
diff --git a/libphobos/libdruntime/rt/sections_elf_shared.d 
b/libphobos/libdruntime/rt/sections_elf_shared.d
index d4e1ff07699..45c1dcbc7f3 100644
--- a/libphobos/libdruntime/rt/sections_elf_shared.d
+++ b/libphobos/libdruntime/rt/sections_elf_shared.d
@@ -10,6 +10,9 @@
 
 module rt.sections_elf_shared;
 
+version (RISCV32) version = RISCV_Any;
+version (RISCV64) version = RISCV_Any;
+
 version (CRuntime_Glibc) enum SharedELF = true;
 else version (FreeBSD) enum SharedELF = true;
 else version (NetBSD) enum SharedELF = true;
@@ -671,7 +674,16 @@ version (Shared)
 if (dyn.d_tag == DT_STRTAB)
 {
 version (linux)
-strtab = cast(const(char)*)dyn.d_un.d_ptr;
+{
+// This might change in future glibc releases (after 2.29) 
as dynamic sections
+// are not required to be read-only on RISC-V. This was 
copy & pasted from MIPS while
+// upstreaming RISC-V support. Otherwise MIPS is the only 
arch which sets in glibc:
+// #define DL_RO_DYN_SECTION 1
+version (RISCV_Any)
+strtab = cast(const(char)*)(info.dlpi_addr + 
dyn.d_un.d_ptr); // relocate
+else
+strtab = cast(const(char)*)dyn.d_un.d_ptr;
+}
 else version (FreeBSD)
 strtab = cast(const(char)*)(info.dlpi_addr + 
dyn.d_un.d_ptr); // relocate
 else version (NetBSD)
diff --git a/libphobos/src/std/experimental/allocator/building_blocks/region.d 
b/libphobos/src/std/experimental/allocator/building_blocks/region.d
index dfcecce72bd..cafe059a61f 100644
--- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
+++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d
@@ -391,7 +391,8 @@ struct InSituRegion(size_t size, size_t minAlign = 
platformAlignment)
 else version (PPC) enum growDownwards = Yes.growDownwards;
 else version (PPC64) enum growDownwards = Yes.growDownwards;
 else version (MIPS32) enum growDownwards = Yes.growDownwards;
-else version (MIPS64) enum growDownwards = Yes.growDownwards;
+else version (RISCV32) enum growDownwards = Yes.growDownwards;
+else version (RISCV64) enum growDownwards = Yes.growDownwards;
 else version (SPARC)