Re: [m5-users] PARSEC multi core
Hi Sheng, I'm also using Joel's disk image to run PARSEC on M5 FS mode up to 64 cores. And it's running well with shared L2 caches. I agree with Joel that your problem is caused by using a Linux kernel which only supports upto 4 cores. And here's some details of what I did. Hope it would be helpful: On M5's webside, there's a package with linux patches and PAL code for support up to 64 cores. http://www.m5sim.org/wiki/index.php/Download -- Full-System Stuff And there's also a description of why the default M5 kernel only support up to 4 cores in the Frequently_Asked_Questions. http://www.m5sim.org/wiki/index.php/Frequently_Asked_Questions -- How many CPUs can M5 run You could easily find the procedure of how to install the patches on M5's wiki webpage. Besides, the tech report on Joel's website has very clear description about all the problems you might face. http://userweb.cs.utexas.edu/~parsec_m5/TR-09-32.pdf I cannot think of other issues I have met off the top of my head. But I believe your simulation should work well after you follow above steps. Hope this would be helpful to you and other people who are using PARSEC on M5. Good luck, Jie On Apr 27, 2010, at 12:19 PM, Joel Hestness wrote: Hi Sheng, I'm not exactly sure what the problem is here, but it could be the case that the Linux kernel that you are using will only support 4 cores. There is a Linux kernel supporting up to 64 cores on our website that you can try to see if that fixes the issue: http://userweb.cs.utexas.edu/~cart/parsec_m5/. Good luck, Joel On Mon, Apr 26, 2010 at 3:27 PM, sheng qiu herbert1984...@gmail.com wrote: hi Joel, now it's ok when the core number is no more than 4. but when i set more than 4 cores, it will show information: clear IPI for CPU #num, but NO IPI all the time. and the system.terminal shows that the booting stopped at this process: Slave CPU 4 console command START SlaveCmd: restart FC310020 FC310020 vptb FFFE my_rpb FC018B80 my_rpb_phys 18B80 is there anything wrong? i download the disk image of PARSEC from the website:http://userweb.cs.utexas.edu/~cart/parsec_m5/ Thanks, Sheng ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
Re: [m5-users] PARSEC multi core
Hi Sheng, I'm not exactly sure what the problem is here, but it could be the case that the Linux kernel that you are using will only support 4 cores. There is a Linux kernel supporting up to 64 cores on our website that you can try to see if that fixes the issue: http://userweb.cs.utexas.edu/~cart/parsec_m5/http://userweb.cs.utexas.edu/%7Ecart/parsec_m5/ . Good luck, Joel On Mon, Apr 26, 2010 at 3:27 PM, sheng qiu herbert1984...@gmail.com wrote: hi Joel, now it's ok when the core number is no more than 4. but when i set more than 4 cores, it will show information: clear IPI for CPU #num, but NO IPI all the time. and the system.terminal shows that the booting stopped at this process: Slave CPU 4 console command START SlaveCmd: restart FC310020 FC310020 vptb FFFE my_rpb FC018B80 my_rpb_phys 18B80 is there anything wrong? i download the disk image of PARSEC from the website:http://userweb.cs.utexas.edu/~cart/parsec_m5/http://userweb.cs.utexas.edu/%7Ecart/parsec_m5/ Thanks, Sheng ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
Re: [m5-users] PARSEC multi core
Hi Sheng, The script generator that we distribute for running these puts the switchcpu command in each of the run scripts. If you haven't specified a set of CPUs for M5 to switch to when the command is called, it will exit. Our normal usage of M5 with the PARSEC run scripts uses atomic CPU simulation to fast-forward through Linux boot, and then it switches to the detailed CPUs just before running the benchmark (hence the switchcpu command). If you want to do this, you will need to specify that you want to fast-forward using the command line parameter to the fs.py script. If you would rather not fast-forward, but still run the PARSEC benchmark with this run script, you will need to comment out the switchcpu command. Hope this helps, Joel On Mon, Apr 26, 2010 at 11:54 AM, sheng qiu herbert1984...@gmail.comwrote: Hi all, i have a question about running PARSEC with 8 cores using M5. my script is: #!/bin/sh # File to run the blackscholes benchmark cd /parsec/install/bin /sbin/m5 switchcpu /sbin/m5 dumpstats /sbin/m5 resetstats ./blackscholes 8 /parsec/install/inputs/blackscholes/in_4K.txt /parsec/install/inputs/blackscholes/prices.txt echo Done :D /sbin/m5 exit /sbin/m5 exit my command line is: build/ALPHA_FS/m5.opt configs/example/fs.py --script=/../../blackscholes.rcS --caches --l2cache during the running it shows this information always: warn: clear IPI for CPU=#num, but NO IPI, is this normal? if i change to 4 cores, there is information at the end of running: Exiting @ cycle 2267922695500 because switchcpu is this a normal ending? Thanks, Sheng ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
[m5-users] PARSEC multi core
hi Joel, now it's ok when the core number is no more than 4. but when i set more than 4 cores, it will show information: clear IPI for CPU #num, but NO IPI all the time. and the system.terminal shows that the booting stopped at this process: Slave CPU 4 console command START SlaveCmd: restart FC310020 FC310020 vptb FFFE my_rpb FC018B80 my_rpb_phys 18B80 is there anything wrong? i download the disk image of PARSEC from the website:http://userweb.cs.utexas.edu/~cart/parsec_m5/http://userweb.cs.utexas.edu/%7Ecart/parsec_m5/ Thanks, Sheng ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
