Re: [gem5-users] ARM DMA Pl081 issue
Hi all, I was making a silly mistake in a read function, ignoring the pkts with address of the interest. Now its working fine. Regards, Digant Desai. On Fri, May 20, 2011 at 16:25, Digant digantde...@gmail.com wrote: Hi Ali, I added that parameter and here how it looks in config.ini *[system.realview.dmac]* *type=Pl081 * *amba_id=1314945* *gic=system.realview.gic* *int_num=56* *max_backoff_delay=1000* *min_backoff_delay=4000* *pio_addr=268632064* *pio_latency=1* *pio_size=4095* *platform=system.realview* *system=system* *dma=system.membus.port[11]* *pio=system.membus.port[6]* I have replaced my device as IsaFake Device on reading from LInux it returned the default values as per expectations. But If i use my class Pl081 instead of IsaFake,which has almost similar read write functions as IsaFake its giving the same error. Can anybody suggest what can be wrong ? Regards, Digant Desai. On Thu, May 19, 2011 at 21:15, Ali Saidi sa...@umich.edu wrote: You need to add it in your device constructor. Ali On May 19, 2011, at 10:08 PM, Digant wrote: No , its not there in ambadmadevice params, do I need to add it in my param structure ?? On May 19, 2011 8:01 PM, Ali Saidi sa...@umich.edu wrote: Are you setting the pioSize in the constructor of your dmac device to 0xfff? Ali On May 19, 2011, at 8:05 PM, Digant wrote: Hi all, I have been trying to develop a model for Pl081 DMA controller. I have inherited c... ___ gem5-users mailing list gem5-users@m5sim.org ... ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] ARM DMA Pl081 issue
Hi, There is a example FS.py and FSCconfig.py files. If you want to go to more detail check for Realview.py. Regards, Digant Desai. 2011/5/19 xuewen zhou zhouxuewen1...@gmail.com hello，Digant I am sorry to disturb you . I want to ask you that how did you config your ARM system ，In which file you added modules you need ？ Thank you very much ！ Best wishes ！ 2011/5/20 Digant digantde...@gmail.com Hi all, I have been trying to develop a model for Pl081 DMA controller. I have inherited class from AmbaDmaDevice and as a first step I have given register read/write features. And added it in M5 system by editing RealView.py to membus. I have couple of questions, 1- It should be on membus right ? rather then on IO bus !! 2- How can I reduce the bus width from 64 to 32 ? 3- After configuration I am getting this : *from config.ini* *.* *.* *.* *[system.membus]* *type=Bus* *children=badaddr_responder* *block_size=64* *bus_id=1* *clock=1000* *header_cycles=1* *use_default_range=false* *width=64* *default=system.membus.badaddr_responder.pio* *port=system.bridge.side_b system.physmem.port[0] system.physmem2.port[0] system.diskmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.dmac.pio system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.icache_port system.cpu.dcache_port system.realview.dmac.dma* * * *[system.membus.badaddr_responder]* *type=IsaFake* *pio_addr=0* *pio_latency=1000* *pio_size=8* *platform=system.realview* *ret_bad_addr=true* *ret_data16=65535* *ret_data32=4294967295* *ret_data64=18446744073709551615* *ret_data8=255* *system=system* *update_data=false* *warn_access=warn* *pio=system.membus.default* * * *[system.realview.dmac]* *type=Pl081* *amba_id=1314945* *gic=system.realview.gic* *int_num=55* *max_backoff_delay=1000* *min_backoff_delay=4000* *pio_addr=268632064* *pio_latency=1* *platform=system.realview* *system=system* *dma=system.membus.port[11]* *pio=system.membus.port[6]* but when I run Linux kernel with NO DMA / PL081 drivers.(I have written my own driver to read write dma registers for time being).I am getting this,(here 0x10030fe0 is AMBA ID1 read only register) *from the M5-log:* *.* *.* *.* *warn: Device system.membus.badaddr_responder accessed by read to address 0x10030fe0 size=4* *For more information see: http://www.m5sim.org/warn/f6456e4f* *m5.debug: build/ARM_FS/cpu/simple/atomic.cc:347: Fault AtomicSimpleCPU::readBytes(Addr, uint8_t*, unsigned int, unsigned int): Assertion `!pkt.isError()' failed.* *Program aborted at cycle 4790235000* *Aborted* ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users -- Xuewen Zhou Master Shanghai Jiaotong University School of Microelectronics National Engineering Laboratory For Automotive Electronic Control Technology 800 Dongchuan Road, Shanghai 200240, P. R. China Phone : 13062728106 ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] ARM DMA Pl081 issue
Are you setting the pioSize in the constructor of your dmac device to 0xfff? Ali On May 19, 2011, at 8:05 PM, Digant wrote: Hi all, I have been trying to develop a model for Pl081 DMA controller. I have inherited class from AmbaDmaDevice and as a first step I have given register read/write features. And added it in M5 system by editing RealView.py to membus. I have couple of questions, 1- It should be on membus right ? rather then on IO bus !! 2- How can I reduce the bus width from 64 to 32 ? 3- After configuration I am getting this : from config.ini . . . [system.membus] type=Bus children=badaddr_responder block_size=64 bus_id=1 clock=1000 header_cycles=1 use_default_range=false width=64 default=system.membus.badaddr_responder.pio port=system.bridge.side_b system.physmem.port[0] system.physmem2.port[0] system.diskmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.dmac.pio system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.icache_port system.cpu.dcache_port system.realview.dmac.dma [system.membus.badaddr_responder] type=IsaFake pio_addr=0 pio_latency=1000 pio_size=8 platform=system.realview ret_bad_addr=true ret_data16=65535 ret_data32=4294967295 ret_data64=18446744073709551615 ret_data8=255 system=system update_data=false warn_access=warn pio=system.membus.default [system.realview.dmac] type=Pl081 amba_id=1314945 gic=system.realview.gic int_num=55 max_backoff_delay=1000 min_backoff_delay=4000 pio_addr=268632064 pio_latency=1 platform=system.realview system=system dma=system.membus.port[11] pio=system.membus.port[6] but when I run Linux kernel with NO DMA / PL081 drivers.(I have written my own driver to read write dma registers for time being).I am getting this,(here 0x10030fe0 is AMBA ID1 read only register) from the M5-log: . . . warn: Device system.membus.badaddr_responder accessed by read to address 0x10030fe0 size=4 For more information see: http://www.m5sim.org/warn/f6456e4f m5.debug: build/ARM_FS/cpu/simple/atomic.cc:347: Fault AtomicSimpleCPU::readBytes(Addr, uint8_t*, unsigned int, unsigned int): Assertion `!pkt.isError()' failed. Program aborted at cycle 4790235000 Aborted ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] ARM DMA Pl081 issue
No , its not there in ambadmadevice params, do I need to add it in my param structure ?? On May 19, 2011 8:01 PM, Ali Saidi sa...@umich.edu wrote: Are you setting the pioSize in the constructor of your dmac device to 0xfff? Ali On May 19, 2011, at 8:05 PM, Digant wrote: Hi all, I have been trying to develop a model for Pl081 DMA controller. I have inherited c... ___ gem5-users mailing list gem5-users@m5sim.org ... ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] ARM DMA Pl081 issue
You need to add it in your device constructor. Ali On May 19, 2011, at 10:08 PM, Digant wrote: No , its not there in ambadmadevice params, do I need to add it in my param structure ?? On May 19, 2011 8:01 PM, Ali Saidi sa...@umich.edu wrote: Are you setting the pioSize in the constructor of your dmac device to 0xfff? Ali On May 19, 2011, at 8:05 PM, Digant wrote: Hi all, I have been trying to develop a model for Pl081 DMA controller. I have inherited c... ___ gem5-users mailing list gem5-users@m5sim.org ... ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
