[Intel-gfx] [PATCH] tests/testdisplay.c: Add a option '-r'.
With the option '-r', the testdisplay could paint a 2-D bar code(QR bar code)
on the screen. The word pass is hiden in the bar code image.
Further more, with this option, testdisplay will wait until a system signal
'SIGUSR1' coming after each mode setting. This function is for another program
to control testdisplay.
Signed-off-by: Yi Sun yi@intel.com
diff --git a/lib/drmtest.c b/lib/drmtest.c
index 34db126..2101f6a 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -774,5 +774,6 @@ void kmstest_dump_mode(drmModeModeInfo *mode)
mode-flags,
mode-type,
mode-clock);
+ fflush(stdout);
}
diff --git a/tests/pass.png b/tests/pass.png
new file mode 100644
index
..5928d5ca109b7db33640851ceb352f9da742ff7b
GIT binary patch
literal 376
zcmV-;0f+vHP)h;3K|Lk000e1NJLTq007q007r0dK`lq9a7bBm000XT
z000XT0n*)m`~Uy}DoI2^R9J=Wm(dNwAPht;F#sd6IwLUvl53w0P1CgB_W?SQ){l=E
z9mWy;GvvSnd7=1dMSE)a|H2CWIhyfM87+gHaEJ$d4q*v9e2X8NH73LkVH2~nh8{db
z1oH@vt%vi;17nnJKqlmd8Y?m?=SV};d!JC-@c%hEGI?~i|G%bw#%`yn#2zFYS
z+0-7gg|{O}1!wgq~?C}LtVEqB(o|lRCr`J5x)I`I3=`z)d}Rt{K;Mk`1O)KFXWY
z!nic_THZ#ZgI00c~fPDf?c;Hvckz~B`9IOHyYm1SA#|bqn!+nJepLch5kgVzT3%I
zOA6OV+pcX-Uvy+}b(EP0H?%ow8?F4v@mQk8pPG2rCR_!R9VEK^wFvD^r0@l
W))U}2HxaMNUMnLSTY*+nlZd
literal 0
HcmV?d1
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index 5b99269..2bb60e1 100644
--- a/tests/testdisplay.c
+++ b/tests/testdisplay.c
@@ -62,12 +62,16 @@
#include drmtest.h
#include testdisplay.h
+#include stdlib.h
+#include signal.h
+
drmModeRes *resources;
int drm_fd, modes;
int dump_info = 0, test_all_modes =0, test_preferred_mode = 0, force_mode = 0,
test_plane, enable_tiling;
int sleep_between_modes = 5;
uint32_t depth = 24, stride, bpp;
+int qr_code = 0;
drmModeModeInfo force_timing;
@@ -334,6 +338,40 @@ paint_color_key(void)
}
}
+static void paint_image(cairo_t *cr, const char *file)
+{
+ int img_x, img_y, img_w, img_h, img_w_o, img_h_o;
+ double img_w_scale, img_h_scale;
+
+ cairo_surface_t *image;
+
+ img_y = height * (0.10 );
+ img_h = height * 0.08 * 4;
+ img_w = img_h;
+
+ img_x = (width / 2) - (img_w / 2);
+
+ image = cairo_image_surface_create_from_png(file);
+
+ img_w_o = cairo_image_surface_get_width(image);
+ img_h_o = cairo_image_surface_get_height(image);
+
+ cairo_translate(cr, img_x, img_y);
+
+ fprintf(stderr, drew %dx%d image at %d,%d\n, img_w, img_h,
+ img_x, img_y);
+
+ img_w_scale = (double)img_w / (double)img_w_o;
+ img_h_scale = (double)img_h / (double)img_h_o;
+ cairo_scale(cr, img_w_scale, img_h_scale);
+
+ cairo_set_source_surface(cr, image, 0, 0);
+ cairo_scale(cr, 1, 1);
+
+ cairo_paint(cr);
+ cairo_surface_destroy(image);
+}
+
static void
paint_output_info(cairo_t *cr, int l_width, int l_height, void *priv)
{
@@ -419,6 +457,26 @@ paint_output_info(cairo_t *cr, int l_width, int l_height,
void *priv)
cairo_set_source_rgb(cr, 1, 1, 1);
cairo_fill(cr);
}
+
+ if (qr_code)
+ paint_image(cr, ./pass.png);
+}
+
+static void sighandler(int signo)
+{
+ return;
+}
+
+static void set_single(void)
+{
+ int sigs[] = { SIGUSR1 };
+ struct sigaction sa;
+ sa.sa_handler = sighandler;
+
+ sigemptyset(sa.sa_mask);
+
+ if (sigaction(sigs[0], sa, NULL) == -1)
+ perror(Could not set signal handler);
}
static void
@@ -480,9 +538,14 @@ set_mode(struct connector *c)
continue;
}
- if (sleep_between_modes test_all_modes)
+ if (sleep_between_modes test_all_modes !qr_code)
sleep(sleep_between_modes);
+ if (qr_code){
+ set_single();
+ pause();
+ }
+
}
if(test_all_modes){
@@ -536,7 +599,7 @@ int update_display(void)
return 1;
}
-static char optstr[] = hiaf:s:d:p:mt;
+static char optstr[] = hiaf:s:d:p:mrt;
static void usage(char *name)
{
@@ -548,6 +611,7 @@ static void usage(char *name)
fprintf(stderr, \t-p\tplanew,h,crtcx,y,crtcw,h test overlay
plane\n);
fprintf(stderr, \t-m\ttest the preferred mode\n);
fprintf(stderr, \t-t\tuse a tiled framebuffer\n);
+ fprintf(stderr, \t-r\tprint a QR code on the screen whose content is
\pass\ for the automatic test\n);
fprintf(stderr, \t-f\tclock
MHz,hdisp,hsync-start,hsync-end,htotal,\n);
fprintf(stderr, \t\tvdisp,vsync-start,vsync-end,vtotal\n);
fprintf(stderr, \t\ttest force mode\n);
@@ -558,7 +622,7 @@ static void usage(char *name)
#define dump_resource(res) if (res) dump_##res()
static gboolean input_event(GIOChannel *source, GIOCondition condition,
- gpointer data)
+
[Intel-gfx] [PATCH] intel_audio_dump: fix wrong port definition
there're three Ports B/C/D used for selection by each transcoder A/B/C.
Signed-off-by: Wang Xingchao xingchao.w...@intel.com
---
tools/intel_audio_dump.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 077e096..8a0f6ee 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -126,9 +126,9 @@ static const char *video_dip_trans[] = {
static const char *trans_to_port_sel[] = {
[0] = no port,
[1] = Digital Port B,
- [2] = Digital Port B,
- [3] = Digital Port B,
- [4] = Digital Port B,
+ [2] = Digital Port C,
+ [3] = Digital Port D,
+ [4] = reserved,
[5] = reserved,
[6] = reserved,
[7] = reserved,
--
1.7.9.5
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] [CFT] drm/i915: Only set the down rps limit when at the loweset frequency
The power docs say that when the gt leaves rc6, it is in the lowest
frequency and only about 25 usec later will switch to the frequency
selected in GEN6_RPNSWREQ. If the downclock limit expires in that
window and the down limit is set to the lowest possible frequency, the
hw will not send the down interrupt. Which leads to a too high gpu
clock and wasted power.
Chris Wilson already worked on this with
commit 7b9e0ae6da0a7eaf2680a1a788f08df123724f3b
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Sat Apr 28 08:56:39 2012 +0100
drm/i915: Always update RPS interrupts thresholds along with
frequency
but got the logic inverted: The current code set the down limit as
long as we haven't reached it. Instead of only once with reached the
lowest frequency.
Note that we can't always set the downclock limit to 0, because
otherwise the hw will keep on bugging us with downclock request irqs
once the lowest level is reached.
For similar reasons also always set the upclock limit, otherwise the
hw might poke us again with interrupts.
v2: Chris Wilson noticed that the limit reg is also computed in
sanitize_pm. To avoid duplication, extract the code into a common
function.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_pm.c | 43 +++
1 file changed, 25 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d0ce2a5..a537768 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2267,21 +2267,33 @@ void ironlake_disable_drps(struct drm_device *dev)
}
-void gen6_set_rps(struct drm_device *dev, u8 val)
+static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
{
- struct drm_i915_private *dev_priv = dev-dev_private;
u32 limits;
limits = 0;
if (val = dev_priv-max_delay)
val = dev_priv-max_delay;
- else
- limits |= dev_priv-max_delay 24;
-
- if (val = dev_priv-min_delay)
+ limits |= dev_priv-max_delay 24;
+
+ /* Only set the down limit when we've reached the lowest level to avoid
+* getting more interrupts, otherwise leave this clear. This prevents a
+* race in the hw when coming out of rc6: There's a tiny window where
+* the hw runs at the minimal clock before selecting the desired
+* frequency, if the down threshold expires in that window we will not
+* receive a down interrupt. */
+ if (val = dev_priv-min_delay) {
val = dev_priv-min_delay;
- else
limits |= dev_priv-min_delay 16;
+ }
+
+ return limits;
+}
+
+void gen6_set_rps(struct drm_device *dev, u8 val)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ u32 limits = gen6_rps_limits(dev_priv, val);
if (val == dev_priv-cur_delay)
return;
@@ -3587,25 +3599,20 @@ void intel_init_clock_gating(struct drm_device *dev)
static void gen6_sanitize_pm(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
- u32 limits, delay, old;
+ u32 limits, current_limits;
gen6_gt_force_wake_get(dev_priv);
- old = limits = I915_READ(GEN6_RP_INTERRUPT_LIMITS);
+ current_limits = I915_READ(GEN6_RP_INTERRUPT_LIMITS);
/* Make sure we continue to get interrupts
* until we hit the minimum or maximum frequencies.
*/
- limits = ~(0x3f 16 | 0x3f 24);
- delay = dev_priv-cur_delay;
- if (delay dev_priv-max_delay)
- limits |= (dev_priv-max_delay 0x3f) 24;
- if (delay dev_priv-min_delay)
- limits |= (dev_priv-min_delay 0x3f) 16;
-
- if (old != limits) {
+ limits = gen6_rps_limits(dev_priv, dev_priv-cur_delay);
+
+ if (current_limits != limits) {
/* Note that the known failure case is to read back 0. */
DRM_DEBUG_DRIVER(Power management discrepancy:
GEN6_RP_INTERRUPT_LIMITS
-expected %08x, was %08x\n, limits, old);
+expected %08x, was %08x\n, limits,
current_limits);
I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] [CFT] drm/i915: Only set the down rps limit when at the loweset frequency
On Thu, 26 Jul 2012 11:16:14 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: The power docs say that when the gt leaves rc6, it is in the lowest frequency and only about 25 usec later will switch to the frequency selected in GEN6_RPNSWREQ. If the downclock limit expires in that window and the down limit is set to the lowest possible frequency, the hw will not send the down interrupt. Which leads to a too high gpu clock and wasted power. Chris Wilson already worked on this with commit 7b9e0ae6da0a7eaf2680a1a788f08df123724f3b Author: Chris Wilson ch...@chris-wilson.co.uk Date: Sat Apr 28 08:56:39 2012 +0100 drm/i915: Always update RPS interrupts thresholds along with frequency but got the logic inverted: The current code set the down limit as long as we haven't reached it. Instead of only once with reached the lowest frequency. Note that we can't always set the downclock limit to 0, because otherwise the hw will keep on bugging us with downclock request irqs once the lowest level is reached. For similar reasons also always set the upclock limit, otherwise the hw might poke us again with interrupts. v2: Chris Wilson noticed that the limit reg is also computed in sanitize_pm. To avoid duplication, extract the code into a common function. Aye, that's the patch I wish I wrote. Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk Though since I was clearly confused in the first place... -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] [CFT] drm/i915: Only set the down rps limit when at the loweset frequency
And then I remembered I was going to mention... I spent yesterday evening trying to tempt the fail back to IVB, to no avail. So I think the underlying cause was the sporadic read returning 0 which we promptly set to rplim with the original rmw sequence. Then we falsely continued to warn during intel_sanitize_pm() due to the same sporadic read failure. So I think we have painted all the elephants here. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: rip out sanitize_pm again
We believe to have squashed all issues around the gen6+ rps interrupt
generation and why the gpu sometimes got stuck. With that cleared up,
there's no user left for the sanitize_pm infrastructure, so let's just
rip it out.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 -
drivers/gpu/drm/i915/intel_display.c |2 --
drivers/gpu/drm/i915/intel_drv.h |2 --
drivers/gpu/drm/i915/intel_pm.c | 39 +-
4 files changed, 5 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e6e63c1..fb84786 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -248,7 +248,6 @@ struct drm_i915_display_funcs {
void (*update_wm)(struct drm_device *dev);
void (*update_sprite_wm)(struct drm_device *dev, int pipe,
uint32_t sprite_width, int pixel_size);
- void (*sanitize_pm)(struct drm_device *dev);
void (*update_linetime_wm)(struct drm_device *dev, int pipe,
struct drm_display_mode *mode);
int (*crtc_mode_set)(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b463829..17020cd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5929,13 +5929,11 @@ static void intel_decrease_pllclock(struct drm_crtc
*crtc)
void intel_mark_busy(struct drm_device *dev)
{
- intel_sanitize_pm(dev);
i915_update_gfx_val(dev-dev_private);
}
void intel_mark_idle(struct drm_device *dev)
{
- intel_sanitize_pm(dev);
}
void intel_mark_fb_busy(struct drm_i915_gem_object *obj)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8c7f483..13f0467 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -390,8 +390,6 @@ extern int intel_plane_init(struct drm_device *dev, enum
pipe pipe);
extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
enum plane plane);
-void intel_sanitize_pm(struct drm_device *dev);
-
/* intel_panel.c */
extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e8727da..d0ce894 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2267,6 +2267,11 @@ static void ironlake_disable_drps(struct drm_device *dev)
}
+/* There's a funny hw issue where the hw returns all 0 when reading from
+ * GEN6_RP_INTERRUPT_LIMITS. Hence we always need to compute the desired value
+ * ourselves, instead of doing a rmw cycle (which might result in us clearing
+ * all limits and the gpu stuck at whatever frequency it is at atm).
+ */
static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
{
u32 limits;
@@ -3750,37 +3755,6 @@ void intel_init_clock_gating(struct drm_device *dev)
dev_priv-display.init_pch_clock_gating(dev);
}
-static void gen6_sanitize_pm(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev-dev_private;
- u32 limits, current_limits;
-
- gen6_gt_force_wake_get(dev_priv);
-
- current_limits = I915_READ(GEN6_RP_INTERRUPT_LIMITS);
- /* Make sure we continue to get interrupts
-* until we hit the minimum or maximum frequencies.
-*/
- limits = gen6_rps_limits(dev_priv, dev_priv-cur_delay);
-
- if (current_limits != limits) {
- /* Note that the known failure case is to read back 0. */
- DRM_DEBUG_DRIVER(Power management discrepancy:
GEN6_RP_INTERRUPT_LIMITS
-expected %08x, was %08x\n, limits,
current_limits);
- I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
- }
-
- gen6_gt_force_wake_put(dev_priv);
-}
-
-void intel_sanitize_pm(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev-dev_private;
-
- if (dev_priv-display.sanitize_pm)
- dev_priv-display.sanitize_pm(dev);
-}
-
/* Starting with Haswell, we have different power wells for
* different parts of the GPU. This attempts to enable them all.
*/
@@ -3866,7 +3840,6 @@ void intel_init_pm(struct drm_device *dev)
dev_priv-display.update_wm = NULL;
}
dev_priv-display.init_clock_gating =
gen6_init_clock_gating;
- dev_priv-display.sanitize_pm = gen6_sanitize_pm;
} else if (IS_IVYBRIDGE(dev)) {
/* FIXME: detect B0+ stepping and use auto training */
if (SNB_READ_WM0_LATENCY()) {
@@ -3878,7 +3851,6 @@ void intel_init_pm(struct
Re: [Intel-gfx] [PATCH] drm/i915: rip out sanitize_pm again
On Thu, 26 Jul 2012 11:50:05 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: We believe to have squashed all issues around the gen6+ rps interrupt generation and why the gpu sometimes got stuck. With that cleared up, there's no user left for the sanitize_pm infrastructure, so let's just rip it out. Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch I would amend the changelog to include 'intel_reg_write 0xa014 0x1307' as the w/a if we find ourselves stuck again. Acked-by: Chris Wilson ch...@chris-wilson.co.uk -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Export ability of changing cache levels to userspace
On Tue, Jul 10, 2012 at 10:27:08AM +0100, Chris Wilson wrote: By selecting the cache level (essentially whether or not the CPU snoops any updates to the bo, and on more recent machines whether it resides inside the CPU's last-level-cache) a userspace driver is able to then manage all of its memory within buffer objects, if it so desires. This enables the userspace driver to accelerate uploads and more importantly downloads from the GPU and to able to mix CPU and GPU rendering/activity efficiently. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Ok, I've merged this one and the prep patch to dinq, with the little comment added that bits 16-31 are reserved for platform madness. Thanks for the patches. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Segregate memory domains in the GTT using coloring
Several functions of the GPU have the restriction that differing memory
domains cannot be placed next to each other (as the GPU may prefetch
beyond the end of one domain and hang as it crosses into the other
domain). We use the facility of the drm_mm to mark ranges with a
particular color that corresponds to the cache attributes of those pages
in order to prevent allocating adjacent blocks of differing memory
types.
v2: Rebase ontop of drm_mm coloring v2.
v3: Fix rebinding existing gtt_space and add a verification routine.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
So I found another bug in testing that I forgot to forward on in a timely
manner.
-Chris
---
drivers/gpu/drm/i915/i915_drv.h |5 +-
drivers/gpu/drm/i915/i915_gem.c | 111 ++---
drivers/gpu/drm/i915/i915_gem_evict.c |7 ++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 19 ++
4 files changed, 128 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f176589..d6c0d0e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -109,6 +109,7 @@ struct intel_pch_pll {
#define WATCH_COHERENCY0
#define WATCH_LISTS0
+#define WATCH_GTT 0
#define I915_GEM_PHYS_CURSOR_0 1
#define I915_GEM_PHYS_CURSOR_1 2
@@ -1404,7 +1405,9 @@ void i915_gem_init_global_gtt(struct drm_device *dev,
/* i915_gem_evict.c */
int __must_check i915_gem_evict_something(struct drm_device *dev, int min_size,
- unsigned alignment, bool mappable);
+ unsigned alignment,
+ unsigned cache_level,
+ bool mappable);
int i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only);
/* i915_gem_stolen.c */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b274810..19bdc24 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2586,6 +2586,76 @@ i915_gem_object_get_fence(struct drm_i915_gem_object
*obj)
return 0;
}
+static bool i915_gem_valid_gtt_space(struct drm_device *dev,
+struct drm_mm_node *gtt_space,
+unsigned long cache_level)
+{
+ struct drm_mm_node *other;
+
+ /* On non-LLC machines we have to be careful when putting differing
+* types of snoopable memory together to avoid the prefetcher
+* crossing memory domains and dieing.
+*/
+ if (HAS_LLC(dev))
+ return true;
+
+ if (gtt_space == NULL)
+ return true;
+
+ if (list_empty(gtt_space-node_list))
+ return true;
+
+ other = list_entry(gtt_space-node_list.prev, struct drm_mm_node,
node_list);
+ if (other-allocated !other-hole_follows other-color !=
cache_level)
+ return false;
+
+ other = list_entry(gtt_space-node_list.next, struct drm_mm_node,
node_list);
+ if (other-allocated !gtt_space-hole_follows other-color !=
cache_level)
+ return false;
+
+ return true;
+}
+
+static void i915_gem_verify_gtt(struct drm_device *dev)
+{
+#if WATCH_GTT
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct drm_i915_gem_object *obj;
+ int err = 0;
+
+ list_for_each_entry(obj, dev_priv-mm.gtt_list, gtt_list) {
+ if (obj-gtt_space == NULL) {
+ printk(KERN_ERR object found on GTT list with no space
reserved\n);
+ err++;
+ continue;
+ }
+
+ if (obj-cache_level != obj-gtt_space-color) {
+ printk(KERN_ERR object reserved space [%08lx, %08lx]
with wrong color, cache_level=%x, color=%lx\n,
+ obj-gtt_space-start,
+ obj-gtt_space-start + obj-gtt_space-size,
+ obj-cache_level,
+ obj-gtt_space-color);
+ err++;
+ continue;
+ }
+
+ if (!i915_gem_valid_gtt_space(dev,
+ obj-gtt_space,
+ obj-cache_level)) {
+ printk(KERN_ERR invalid GTT space found at [%08lx,
%08lx] - color=%x\n,
+ obj-gtt_space-start,
+ obj-gtt_space-start + obj-gtt_space-size,
+ obj-cache_level);
+ err++;
+ continue;
+ }
+ }
+
+ WARN_ON(err);
+#endif
+}
+
/**
* Finds free space in the GTT aperture and binds the object there.
*/
@@ -2640,36 +2710,47 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object
*obj,
[Intel-gfx] [PATCH] NEWS: Correct release version: s/2.12.0/2.20.0/
Date: Thu, 26 Jul 2012 12:51:57 +0200 Signed-off-by: Paul Menzel paulepan...@users.sourceforge.net --- NEWS |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/NEWS b/NEWS index a6819d4..08340f8 100644 --- a/NEWS +++ b/NEWS @@ -38,7 +38,7 @@ Among the other tweaks this week: * Shadow support was dropped from UXA as it was neither complete nor correct, use SNA instead. -Release 2.12.0 (2012-07-15) +Release 2.20.0 (2012-07-15) === First the big news, a new acceleration method that aims to be faster and consume far less CPU than UXA is now available for selection at runtime. -- 1.7.10.4 signature.asc Description: This is a digitally signed message part ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Segregate memory domains in the GTT using coloring
On Thu, Jul 26, 2012 at 11:49:32AM +0100, Chris Wilson wrote: Several functions of the GPU have the restriction that differing memory domains cannot be placed next to each other (as the GPU may prefetch beyond the end of one domain and hang as it crosses into the other domain). We use the facility of the drm_mm to mark ranges with a particular color that corresponds to the cache attributes of those pages in order to prevent allocating adjacent blocks of differing memory types. v2: Rebase ontop of drm_mm coloring v2. v3: Fix rebinding existing gtt_space and add a verification routine. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Ok, history fixed. Can you please double-check that I haven't botched it? /me hangs head in shame over not noticing that nothing assings anything to obj-color ... -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] NEWS: Correct release version: s/2.12.0/2.20.0/
Thanks, -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: rip out sanitize_pm again
On Thu, Jul 26, 2012 at 11:14:59AM +0100, Chris Wilson wrote: On Thu, 26 Jul 2012 11:50:05 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: We believe to have squashed all issues around the gen6+ rps interrupt generation and why the gpu sometimes got stuck. With that cleared up, there's no user left for the sanitize_pm infrastructure, so let's just rip it out. Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch I would amend the changelog to include 'intel_reg_write 0xa014 0x1307' as the w/a if we find ourselves stuck again. Acked-by: Chris Wilson ch...@chris-wilson.co.uk I've applied both patches (with the w/a note added) to dinq, let's see what happens. Thanks for the review. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915 disable combination mode
... but this time around don't forget to save/restore the lbpc reg.
--
Hi Carsten,
Please test this quick hack, afaict that should be more towards the
ultimate truth of gen4 backlight heaven than adding random invert
brightness quirks.
Yours, Daniel
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_reg.h |3 +++
drivers/gpu/drm/i915/i915_suspend.c | 10 ++
drivers/gpu/drm/i915/intel_panel.c |4 ++--
4 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b2eb17..f483ef4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -507,6 +507,7 @@ typedef struct drm_i915_private {
/* Register state */
bool modeset_on_lid;
u8 saveLBB;
+ u8 saveLBPC;
u32 saveDSPACNTR;
u32 saveDSPBCNTR;
u32 saveDSPARB;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1310caa..29ccd22 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1882,6 +1882,9 @@
#define PFIT_AUTO_RATIOS 0x61238
+/* legacy/combination backlight modes in the pci config space */
+#define PCI_LBPC 0xf4
+
/* Backlight control */
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
#define BLM_PWM_ENABLE (1 31)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
index 740c076..63f9c09 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -641,6 +641,11 @@ static void i915_save_display(struct drm_device *dev)
dev_priv-saveLVDS = I915_READ(LVDS);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
if (!IS_I830(dev) !IS_845G(dev) !HAS_PCH_SPLIT(dev))
dev_priv-savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
@@ -758,6 +763,11 @@ static void i915_restore_display(struct drm_device *dev)
I915_WRITE(PP_CONTROL, dev_priv-savePP_CONTROL);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
/* Display Port state */
if (SUPPORTS_INTEGRATED_DP(dev)) {
I915_WRITE(DP_B, dev_priv-saveDP_B);
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 10c7d39..c8b6bc5 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -33,8 +33,6 @@
#include linux/moduleparam.h
#include intel_drv.h
-#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
-
void
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode)
@@ -121,11 +119,13 @@ static int is_backlight_combination_mode(struct
drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
+#if 0
if (INTEL_INFO(dev)-gen = 4)
return I915_READ(BLC_PWM_CTL2) BLM_COMBINATION_MODE;
if (IS_GEN2(dev))
return I915_READ(BLC_PWM_CTL) BLM_LEGACY_MODE;
+#endif
return 0;
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915 disable combination mode
... but this time around don't forget to save/restore the lbpc reg.
v2: Actually try to restroe LBPC on resume.
--
Hi Carsten,
Please test this quick hack, afaict that should be more towards the
ultimate truth of gen4 backlight heaven than adding random invert
brightness quirks.
Yours, Daniel
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_reg.h |3 +++
drivers/gpu/drm/i915/i915_suspend.c | 10 ++
drivers/gpu/drm/i915/intel_panel.c |4 ++--
4 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b2eb17..f483ef4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -507,6 +507,7 @@ typedef struct drm_i915_private {
/* Register state */
bool modeset_on_lid;
u8 saveLBB;
+ u8 saveLBPC;
u32 saveDSPACNTR;
u32 saveDSPBCNTR;
u32 saveDSPARB;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1310caa..29ccd22 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1882,6 +1882,9 @@
#define PFIT_AUTO_RATIOS 0x61238
+/* legacy/combination backlight modes in the pci config space */
+#define PCI_LBPC 0xf4
+
/* Backlight control */
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
#define BLM_PWM_ENABLE (1 31)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
index 740c076..63f9c09 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -641,6 +641,11 @@ static void i915_save_display(struct drm_device *dev)
dev_priv-saveLVDS = I915_READ(LVDS);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
if (!IS_I830(dev) !IS_845G(dev) !HAS_PCH_SPLIT(dev))
dev_priv-savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
@@ -758,6 +763,11 @@ static void i915_restore_display(struct drm_device *dev)
I915_WRITE(PP_CONTROL, dev_priv-savePP_CONTROL);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
/* Display Port state */
if (SUPPORTS_INTEGRATED_DP(dev)) {
I915_WRITE(DP_B, dev_priv-saveDP_B);
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 10c7d39..c8b6bc5 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -33,8 +33,6 @@
#include linux/moduleparam.h
#include intel_drv.h
-#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
-
void
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode)
@@ -121,11 +119,13 @@ static int is_backlight_combination_mode(struct
drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
+#if 0
if (INTEL_INFO(dev)-gen = 4)
return I915_READ(BLC_PWM_CTL2) BLM_COMBINATION_MODE;
if (IS_GEN2(dev))
return I915_READ(BLC_PWM_CTL) BLM_LEGACY_MODE;
+#endif
return 0;
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915 disable combination mode
... but this time around don't forget to save/restore the lbpc reg.
v2: Actually try to restroe LBPC on resume.
--
Hi Carsten,
Please test this quick hack, afaict that should be more towards the
ultimate truth of gen4 backlight heaven than adding random invert
brightness quirks.
Yours, Daniel
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_reg.h |3 +++
drivers/gpu/drm/i915/i915_suspend.c | 10 ++
drivers/gpu/drm/i915/intel_panel.c |4 ++--
4 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b2eb17..f483ef4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -507,6 +507,7 @@ typedef struct drm_i915_private {
/* Register state */
bool modeset_on_lid;
u8 saveLBB;
+ u8 saveLBPC;
u32 saveDSPACNTR;
u32 saveDSPBCNTR;
u32 saveDSPARB;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1310caa..29ccd22 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1882,6 +1882,9 @@
#define PFIT_AUTO_RATIOS 0x61238
+/* legacy/combination backlight modes in the pci config space */
+#define PCI_LBPC 0xf4
+
/* Backlight control */
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
#define BLM_PWM_ENABLE (1 31)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
index 740c076..63f9c09 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -641,6 +641,11 @@ static void i915_save_display(struct drm_device *dev)
dev_priv-saveLVDS = I915_READ(LVDS);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
if (!IS_I830(dev) !IS_845G(dev) !HAS_PCH_SPLIT(dev))
dev_priv-savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
@@ -758,6 +763,11 @@ static void i915_restore_display(struct drm_device *dev)
I915_WRITE(PP_CONTROL, dev_priv-savePP_CONTROL);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
/* Display Port state */
if (SUPPORTS_INTEGRATED_DP(dev)) {
I915_WRITE(DP_B, dev_priv-saveDP_B);
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 10c7d39..c8b6bc5 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -33,8 +33,6 @@
#include linux/moduleparam.h
#include intel_drv.h
-#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
-
void
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode)
@@ -121,11 +119,13 @@ static int is_backlight_combination_mode(struct
drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
+#if 0
if (INTEL_INFO(dev)-gen = 4)
return I915_READ(BLC_PWM_CTL2) BLM_COMBINATION_MODE;
if (IS_GEN2(dev))
return I915_READ(BLC_PWM_CTL) BLM_LEGACY_MODE;
+#endif
return 0;
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] intel_audio_dump: add Haswell audio dump support
Add Haswell audio registers definition and dump support.
Signed-off-by: Wang Xingchao xingchao.w...@intel.com
---
tools/intel_audio_dump.c | 574 +-
1 file changed, 571 insertions(+), 3 deletions(-)
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 8a0f6ee..231d0c6 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -94,6 +94,11 @@ static const char *dip_port[] = {
[3] = Digital Port D,
};
+static const char *dip_type[] = {
+[0] = Audio DIP Disabled,
+[1] = Audio DIP Enabled,
+};
+
static const char *dip_index[] = {
[0] = Audio DIP,
[1] = ACP DIP,
@@ -126,9 +131,20 @@ static const char *video_dip_trans[] = {
static const char *trans_to_port_sel[] = {
[0] = no port,
[1] = Digital Port B,
- [2] = Digital Port C,
- [3] = Digital Port D,
- [4] = reserved,
+ [2] = Digital Port B,
+ [3] = Digital Port B,
+ [4] = Digital Port B,
+ [5] = reserved,
+ [6] = reserved,
+ [7] = reserved,
+};
+
+static const char *ddi_mode[] = {
+ [0] = HDMI mode,
+ [1] = DVI mode,
+ [2] = DP SST mode,
+ [3] = DP MST mode,
+ [4] = DP FDI mode,
[5] = reserved,
[6] = reserved,
[7] = reserved,
@@ -1354,6 +1370,553 @@ static void dump_cpt(void)
}
+#undef AUD_CONFIG_A
+#undef AUD_MISC_CTRL_A
+#undef AUD_VID_DID
+#undef AUD_RID
+#undef AUD_CTS_ENABLE_A
+#undef AUD_PWRST
+#undef AUD_HDMIW_HDMIEDID_A
+#undef AUD_HDMIW_INFOFR_A
+#undef AUD_PORT_EN_HD_CFG
+#undef AUD_OUT_DIG_CNVT_A
+#undef AUD_OUT_STR_DESC_A
+#undef AUD_OUT_CH_STR
+#undef AUD_PINW_CONNLNG_LIST
+#undef AUD_CNTL_ST_A
+#undef AUD_HDMIW_STATUS
+#undef AUD_CONFIG_B
+#undef AUD_MISC_CTRL_B
+#undef AUD_CTS_ENABLE_B
+#undef AUD_HDMIW_HDMIEDID_B
+#undef AUD_HDMIW_INFOFR_B
+#undef AUD_OUT_DIG_CNVT_B
+#undef AUD_OUT_STR_DESC_B
+#undef AUD_CNTL_ST_B
+
+/*Haswell registers*/
+
+/*DisplayPort Transport Control*/
+#define DP_TP_CTL_A0x64040
+#define DP_TP_CTL_B0x64140
+#define DP_TP_CTL_C0x64240
+#define DP_TP_CTL_D0x64340
+#define DP_TP_CTL_E0x64440
+
+/*DisplayPort Transport Status*/
+#define DP_TP_ST_A 0x64044
+#define DP_TP_ST_B 0x64144
+#define DP_TP_ST_C 0x64244
+#define DP_TP_ST_D 0x64344
+#define DP_TP_ST_E 0x6
+
+/*Transcoder configuration*/
+#define TRANS_CONF 0xF0008
+
+/*DDI Buffer Control*/
+#define DDI_BUF_CTL_A0x64000
+#define DDI_BUF_CTL_B0x64100
+#define DDI_BUF_CTL_C0x64200
+#define DDI_BUF_CTL_D0x64300
+#define DDI_BUF_CTL_E0x64400
+
+/*DDI Buffer Translation*/
+#define DDI_BUF_TRANS_A0x64e00
+#define DDI_BUF_TRANS_B0x64e60
+#define DDI_BUF_TRANS_C0x64ec0
+#define DDI_BUF_TRANS_D0x64f20
+#define DDI_BUF_TRANS_E0x64f80
+
+/*DDI Aux Channel*/
+#define DDI_AUX_CHANNEL_CTRL 0x64010
+#define DDI_AUX_DATA 0x64014
+#define DDI_AUX_TST0x64028
+
+/*DDI CRC Control*/
+#define DDI_CRC_CTL_A 0x64050
+#define DDI_CRC_CTL_B 0x64150
+#define DDI_CRC_CTL_C 0x64250
+#define DDI_CRC_CTL_D 0x64350
+#define DDI_CRC_CTL_E 0x64450
+
+/*Pipe DDI Function Control*/
+#define PIPE_DDI_FUNC_CTL_A 0x60400
+#define PIPE_DDI_FUNC_CTL_B 0x61400
+#define PIPE_DDI_FUNC_CTL_C 0x62400
+#define PIPE_DDI_FUNC_CTL_EDP 0x6F400
+
+/*Pipe Configuration*/
+#define PIPE_CONF_A0x70008
+#define PIPE_CONF_B0x71008
+#define PIPE_CONF_C0x72008
+#define PIPE_CONF_EDP 0x7F008
+
+/*Audio registers*/
+#define AUD_CONFIG_A 0x65000
+#define AUD_MISC_CTRL_A 0x65010
+#define AUD_VID_DID 0x65020
+#define AUD_RID 0x65024
+#define AUD_CTS_ENABLE_A 0x65028
+#define AUD_PWRST 0x6504C
+#define AUD_HDMIW_HDMIEDID_A 0x65050
+#define AUD_HDMIW_INFOFR_A0x65054
+#define AUD_PORT_EN_HD_CFG0x6507C
+#define AUD_OUT_DIG_CNVT_A0x65080
+#define AUD_OUT_STR_DESC_A0x65084
+#define AUD_OUT_CHAN_MAP 0x65088
+#define AUD_PINW_CONNLNG_LIST_A 0x650A8
+#define AUD_PINW_CONNLNG_LIST_B 0x651A8
+#define AUD_PINW_CONNLNG_LIST_C 0x652A8
+#define AUD_PIPE_CONN_SEL_CTRL 0x650AC
+#define AUD_PIN_ELD_CP_VLD0x650C0
+#define AUD_HDMIW_STATUS 0x650D4
+#define AUD_CONFIG_B 0x65100
+#define AUD_MISC_CTRL_B 0x65110
+#define AUD_CTS_ENABLE_B 0x65128
+#define AUD_HDMIW_HDMIEDID_B 0x65150
+#define AUD_HDMIW_INFOFR_B0x65154
+#define AUD_OUT_DIG_CNVT_B0x65180
+#define AUD_OUT_STR_DESC_B0x65184
+#define AUD_CONFIG_C 0x65200
+#define AUD_MISC_CTRL_C 0x65210
+#define AUD_CTS_ENABLE_C 0x65228
+#define AUD_HDMIW_HDMIEDID_C 0x65250
+#define AUD_HDMIW_INFOFR_C0x65254
+#define AUD_OUT_DIG_CNVT_C0x65280
+#define AUD_OUT_STR_DESC_C0x65284
+#define
Re: [Intel-gfx] [PATCH] tests/testdisplay.c: Add a option '-r'.
On Thu, Jul 26, 2012 at 02:23:36PM +0800, Yi Sun wrote: With the option '-r', the testdisplay could paint a 2-D bar code(QR bar code) on the screen. The word pass is hiden in the bar code image. Further more, with this option, testdisplay will wait until a system signal 'SIGUSR1' coming after each mode setting. This function is for another program to control testdisplay. Signed-off-by: Yi Sun yi@intel.com Applied, thanks for the patch. Note that your patch introduce a warning (missing static on a function definition), I've fixed that up. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915 disable combination mode
... but this time around don't forget to save/restore the lbpc reg.
v2: Actually try to restroe LBPC on resume.
v3: _Really_ try to git add.
--
Hi Carsten,
Please test this quick hack, afaict that should be more towards the
ultimate truth of gen4 backlight heaven than adding random invert
brightness quirks.
Yours, Daniel
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_reg.h |3 +++
drivers/gpu/drm/i915/i915_suspend.c | 10 ++
drivers/gpu/drm/i915/intel_panel.c |4 ++--
4 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b2eb17..f483ef4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -507,6 +507,7 @@ typedef struct drm_i915_private {
/* Register state */
bool modeset_on_lid;
u8 saveLBB;
+ u8 saveLBPC;
u32 saveDSPACNTR;
u32 saveDSPBCNTR;
u32 saveDSPARB;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1310caa..29ccd22 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1882,6 +1882,9 @@
#define PFIT_AUTO_RATIOS 0x61238
+/* legacy/combination backlight modes in the pci config space */
+#define PCI_LBPC 0xf4
+
/* Backlight control */
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
#define BLM_PWM_ENABLE (1 31)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
index 740c076..7f44079 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -641,6 +641,11 @@ static void i915_save_display(struct drm_device *dev)
dev_priv-saveLVDS = I915_READ(LVDS);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_read_config_byte(dev-pdev, PCI_LBPC,
+dev_priv-saveLBPC);
+ }
+
if (!IS_I830(dev) !IS_845G(dev) !HAS_PCH_SPLIT(dev))
dev_priv-savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
@@ -758,6 +763,11 @@ static void i915_restore_display(struct drm_device *dev)
I915_WRITE(PP_CONTROL, dev_priv-savePP_CONTROL);
}
+ if (IS_GEN2(dev) || IS_GEN4(dev)) {
+ pci_write_config_byte(dev-pdev, PCI_LBPC,
+ dev_priv-saveLBPC);
+ }
+
/* Display Port state */
if (SUPPORTS_INTEGRATED_DP(dev)) {
I915_WRITE(DP_B, dev_priv-saveDP_B);
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 10c7d39..c8b6bc5 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -33,8 +33,6 @@
#include linux/moduleparam.h
#include intel_drv.h
-#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
-
void
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
struct drm_display_mode *adjusted_mode)
@@ -121,11 +119,13 @@ static int is_backlight_combination_mode(struct
drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
+#if 0
if (INTEL_INFO(dev)-gen = 4)
return I915_READ(BLC_PWM_CTL2) BLM_COMBINATION_MODE;
if (IS_GEN2(dev))
return I915_READ(BLC_PWM_CTL) BLM_LEGACY_MODE;
+#endif
return 0;
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: fix forcewake related hangs on snb
... by adding seemingly redudant posting reads.
This little dragon lair exploded the first time around when we've
refactored the code a bit to use the common wait_for_atomic_us in
drm/i915: Group the GT routines together in both code and vtable,
which caused QA to file fdo bug #51738.
Chris Wilson entertained a few approaches to fixing #51738: Replacing
the udelay(1) with the previously-used udelay(10) (or any other
sufficiently larger delay), adding a posting read, or ditching the
delay completely and using cpu_relax. We went with the cpu_relax and
915: Workaround hang with BSD and forcewake on SandyBridge. Which
blew up in fdo bug #52424, but adding the posting read while still
using cpu_relax seems to also fix that, it looks like the
posting read is the important ingriedient to fix these rc6 related
hangs on snb.
Popular theories as to why this is like it is include:
- A herd of pink elephants got royally angered somehow.
- The gpu has internally different functional units and judging by the
register offsets, the forcewake request register and the forcewake
ack registers are _not_ in the same functional unit (or at least
aren't reached through the same routes). Hence the posting read
syncs up with the wrong block and gets the entire gpu confused.
- ...
As a minimal ducttape fix for 3.6, let's just put these posting reads
into place again. We can try fancier approaches (like adding back the
cpu_relax instead of the udelay) in -next.
This (re-)fixes a regression introduced in
commit 990bbdadabaa51828e475eda86ee5720a4910cc3
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Mon Jul 2 11:51:02 2012 -0300
drm/i915: Group the GT routines together in both code and vtable
Cc: Chris Wilson ch...@chris-wilson.co.uk
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52424
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51738u
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_pm.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 94aabca..58c07cd 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3963,6 +3963,7 @@ static void __gen6_gt_force_wake_get(struct
drm_i915_private *dev_priv)
DRM_ERROR(Force wake wait timed out\n);
I915_WRITE_NOTRACE(FORCEWAKE, 1);
+ POSTING_READ(FORCEWAKE);
if (wait_for_atomic_us((I915_READ_NOTRACE(forcewake_ack) 1), 500))
DRM_ERROR(Force wake wait timed out\n);
@@ -3983,6 +3984,7 @@ static void __gen6_gt_force_wake_mt_get(struct
drm_i915_private *dev_priv)
DRM_ERROR(Force wake wait timed out\n);
I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(1));
+ POSTING_READ(FORCEWAKE_MT);
if (wait_for_atomic_us((I915_READ_NOTRACE(forcewake_ack) 1), 500))
DRM_ERROR(Force wake wait timed out\n);
@@ -4018,14 +4020,14 @@ void gen6_gt_check_fifodbg(struct drm_i915_private
*dev_priv)
static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
{
I915_WRITE_NOTRACE(FORCEWAKE, 0);
- /* The below doubles as a POSTING_READ */
+ POSTING_READ(FORCEWAKE);
gen6_gt_check_fifodbg(dev_priv);
}
static void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
{
I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(1));
- /* The below doubles as a POSTING_READ */
+ POSTING_READ(FORCEWAKE_MT);
gen6_gt_check_fifodbg(dev_priv);
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix forcewake related hangs on snb
On Thu, 26 Jul 2012 16:24:50 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: ... by adding seemingly redudant posting reads. This little dragon lair exploded the first time around when we've refactored the code a bit to use the common wait_for_atomic_us in drm/i915: Group the GT routines together in both code and vtable, which caused QA to file fdo bug #51738. Chris Wilson entertained a few approaches to fixing #51738: Replacing the udelay(1) with the previously-used udelay(10) (or any other sufficiently larger delay), adding a posting read, or ditching the delay completely and using cpu_relax. We went with the cpu_relax and 915: Workaround hang with BSD and forcewake on SandyBridge. Which blew up in fdo bug #52424, but adding the posting read while still using cpu_relax seems to also fix that, it looks like the posting read is the important ingriedient to fix these rc6 related hangs on snb. Popular theories as to why this is like it is include: - A herd of pink elephants got royally angered somehow. - The gpu has internally different functional units and judging by the register offsets, the forcewake request register and the forcewake ack registers are _not_ in the same functional unit (or at least aren't reached through the same routes). Hence the posting read syncs up with the wrong block and gets the entire gpu confused. - ... As a minimal ducttape fix for 3.6, let's just put these posting reads into place again. We can try fancier approaches (like adding back the cpu_relax instead of the udelay) in -next. This (re-)fixes a regression introduced in commit 990bbdadabaa51828e475eda86ee5720a4910cc3 Author: Chris Wilson ch...@chris-wilson.co.uk Date: Mon Jul 2 11:51:02 2012 -0300 drm/i915: Group the GT routines together in both code and vtable Cc: Chris Wilson ch...@chris-wilson.co.uk Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52424 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51738u Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch No change on IVB, fixes the dummy_reloc_loop hang on SNB. Tested-by: Chris Wilson ch...@chris-wilson.co.uk udelay() is winning the award for most popular function. Almost, it got pipped at the last second by read_hpet() on earlier chipsets. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] HD 4000: Passthrough for HD audio formats
Thank you for your statement, Daniel. Is there any way to work around the HDMI infoframe issues you have mentioned? Are there any patches I could try? Regards, Frederik 2012/7/24 Daniel Vetter dan...@ffwll.ch: On Tue, Jul 24, 2012 at 08:46:04PM +0200, Frederik Vogelsang wrote: Hi, thanks for your feedback, Attila. 2012/7/24 alanwww1 alanw...@gmail.com: I already reported this problem here: https://bugs.freedesktop.org/show_bug.cgi?id=49055 I see. I did not search bugzilla yet, because I thought this feature was related to my pretty new hardware components. It's a little disappointing to hear that HBR sound passthrough does not even work on Sandy Bridge yet. I'll try to ping him if there is any newson this. That would be nice. Any developer information on this (like we are working on it) would be appreciated. See the comment I've added. Retesting on 3.5 (and if that doesn't work on 3.6-rc1 respectively drm-next) is required, otherwise we'll have known hdmi infoframe issues. Which could very well explain why hbr doesn't work. Cheers, Daniel Regards, Frederik 2012/7/24 alanwww1 alanw...@gmail.com: Hi all ! I already reported this problem here: https://bugs.freedesktop.org/show_bug.cgi?id=49055 I was also in emailing on this problem with Intel developer Wu Fengguang. It is probably an Intel driver problem. His last email (back in may) was: Hi Attila, Sorry for the delay! During the time I consulted another Intel developer but still remain clueless on this problem. I'll try to reach the Windows driver developers for help.. Thanks, Fengguang I'll try to ping him if there is any newson this. Cheers, Attila 2012/7/22 Frederik Vogelsang frederik.vogels...@gmail.com Hi Paul, thanks a lot for your reply. I am not using Pulseaudio, just plain ALSA. These are the software versions I am currently using: Linux: 3.5.0 (always on latest stable) Alsa: in-kernel driver, alsa-lib 1.0.25 (always on latest stable) xf86-video-intel: 2.20.0 (always on latest stable) I do not think these matter, but I'll include them nonetheless: xorg-server: 1.12.2 libdrm: 2.4.33 mesa: 8.0.3 I am not using a Live-System. This is a Gentoo Linux system, booted from UEFI. This is what is already working: * 3D acceleration * Sound (except from this very issue) * DTS/Dolby Digital passthrough * 7.1 LPCM This is what does not work: * DTS HD/Dolby TrueHD pass-through/bitstreaming through HDMI 1.3 The driver even recognizes the audio formats supported by my AV receiver: localhost ~ # cat /proc/asound/card0/eld#3.0 monitor_present 1 eld_valid 1 monitor_nameVSX-LX51 connection_type HDMI eld_version [0x2] CEA-861D or below edid_version[0x3] CEA-861-B, C or D manufacture_id 0x2f41 product_id 0x0 port_id 0x0 support_hdcp0 support_ai 1 audio_sync_delay4 speakers[0x4f] FL/FR LFE FC RL/RR RLC/RRC sad_count 9 sad0_coding_type[0x1] LPCM sad0_channels 2 sad0_rates [0x1ee0] 32000 44100 48000 88200 96000 176400 192000 sad0_bits [0xe] 16 20 24 sad1_coding_type[0x1] LPCM sad1_channels 8 sad1_rates [0x1ee0] 32000 44100 48000 88200 96000 176400 192000 sad1_bits [0xe] 16 20 24 sad2_coding_type[0x2] AC-3 sad2_channels 6 sad2_rates [0xe0] 32000 44100 48000 sad2_max_bitrate64 sad3_coding_type[0x7] DTS sad3_channels 7 sad3_rates [0x6c0] 44100 48000 88200 96000 sad3_max_bitrate1536000 sad4_coding_type[0x9] DSD (One Bit Audio) sad4_channels 6 sad4_rates [0x40] 44100 sad5_coding_type[0xa] E-AC-3/DD+ (Dolby Digital Plus) sad5_channels 8 sad5_rates [0xc0] 44100 48000 sad6_coding_type[0xb] DTS-HD sad6_channels 8 sad6_rates [0x1ec0] 44100 48000 88200 96000 176400 192000 sad7_coding_type[0xc] MLP (Dolby TrueHD) sad7_channels 8 sad7_rates [0x1ec0] 44100 48000 88200 96000 176400 192000 sad8_coding_type[0xe] WMAPro sad8_channels 8 sad8_rates [0x6e0] 32000 44100 48000 88200 96000 sad8_profile3 I am not sure if this is a regression. I do not have any other Intel systems I could use for testing (like Sandy Bridge or earlier), only my Ivy Bridge build with a HD4000. I can only say that DTS HD passthrough works in a similar Linux system with a NVidia GT 430 using the command above, so it can neither be the cable's nor the receiver's fault. - Frederik 2012/7/22 Paul Menzel paulepan...@users.sourceforge.net: Dear
Re: [Intel-gfx] HD 4000: Passthrough for HD audio formats
On Thu, Jul 26, 2012 at 06:26:17PM +0200, Frederik Vogelsang wrote: Thank you for your statement, Daniel. Is there any way to work around the HDMI infoframe issues you have mentioned? Are there any patches I could try? Other people have already tested 3.6-next and it did not help. So I guess the issue is with the sound driver, at least I'm not aware of anything that we should set up on the drm/i915 side, nor of any bugs with our hdmi support. Sorry that I can't help further :( -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH libdrm] intel: Remove two unused variables
From: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
intel/intel_bufmgr_gem.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index eae2199..43c49a9 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -2908,9 +2908,8 @@ drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr;
struct drm_i915_gem_context_create create;
- drm_i915_getparam_t gp;
drm_intel_context *context = NULL;
- int tmp = 0, ret;
+ int ret;
ret = drmIoctl(bufmgr_gem-fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE,
create);
if (ret != 0) {
--
1.7.7.5
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix forcewake related hangs on snb
On Thu, Jul 26, 2012 at 03:50:02PM +0100, Chris Wilson wrote: On Thu, 26 Jul 2012 16:24:50 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: ... by adding seemingly redudant posting reads. This little dragon lair exploded the first time around when we've refactored the code a bit to use the common wait_for_atomic_us in drm/i915: Group the GT routines together in both code and vtable, which caused QA to file fdo bug #51738. Chris Wilson entertained a few approaches to fixing #51738: Replacing the udelay(1) with the previously-used udelay(10) (or any other sufficiently larger delay), adding a posting read, or ditching the delay completely and using cpu_relax. We went with the cpu_relax and 915: Workaround hang with BSD and forcewake on SandyBridge. Which blew up in fdo bug #52424, but adding the posting read while still using cpu_relax seems to also fix that, it looks like the posting read is the important ingriedient to fix these rc6 related hangs on snb. Popular theories as to why this is like it is include: - A herd of pink elephants got royally angered somehow. - The gpu has internally different functional units and judging by the register offsets, the forcewake request register and the forcewake ack registers are _not_ in the same functional unit (or at least aren't reached through the same routes). Hence the posting read syncs up with the wrong block and gets the entire gpu confused. - ... As a minimal ducttape fix for 3.6, let's just put these posting reads into place again. We can try fancier approaches (like adding back the cpu_relax instead of the udelay) in -next. This (re-)fixes a regression introduced in commit 990bbdadabaa51828e475eda86ee5720a4910cc3 Author: Chris Wilson ch...@chris-wilson.co.uk Date: Mon Jul 2 11:51:02 2012 -0300 drm/i915: Group the GT routines together in both code and vtable Cc: Chris Wilson ch...@chris-wilson.co.uk Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52424 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51738u Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch No change on IVB, fixes the dummy_reloc_loop hang on SNB. Tested-by: Chris Wilson ch...@chris-wilson.co.uk I've picked this up for -fixes, thanks for testing. I'll send a pull to Dave tomorrow, assuming QA doesn't complain about things any more, too. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH libdrm] intel: Remove two unused variables
Damien Lespiau damien.lesp...@gmail.com writes:
From: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
intel/intel_bufmgr_gem.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index eae2199..43c49a9 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -2908,9 +2908,8 @@ drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr;
struct drm_i915_gem_context_create create;
- drm_i915_getparam_t gp;
drm_intel_context *context = NULL;
- int tmp = 0, ret;
+ int ret;
Oops, I never sent out my copy of this patch.
Reviewed-by: Eric Anholt e...@anholt.net
pgpMW0W7H6vTB.pgp
Description: PGP signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 08/43] drm/i915/hdmi: convert to encoder-disable/enable
Hi
2012/7/3 Daniel Vetter daniel.vet...@ffwll.ch:
diff --git a/drivers/gpu/drm/i915/intel_ddi.c
b/drivers/gpu/drm/i915/intel_ddi.c
index f33fe1a..b71303c 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -752,3 +747,18 @@ void intel_ddi_dpms(struct drm_encoder *encoder, int
mode)
I915_WRITE(DDI_BUF_CTL(port),
temp);
}
+
+void intel_disable_ddi(struct intel_encoder *encoder)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder-base);
+ int port = intel_hdmi-ddi_port;
+ u32 temp;
+
+ temp = I915_READ(DDI_BUF_CTL(port));
+ temp = ~DDI_BUF_CTL_ENABLE;
+
+ I915_WRITE(DDI_BUF_CTL(port),
+ temp);
bikeshed
Since you're creating 2 new functions you might want to move temp to
the upper line in both intel_disable_did and intel_enable_ddi.
Every time I look at this I think about fixing it. And now there are
two. Maybe it's just my obsessive compulsive disorder... :)
/bikeshed
--
Paulo Zanoni
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.
Olivier Galibert galib...@pobox.com writes: In some cases the fragment shader view of the vue registers was out of sync with the builder. This fixes it. s/builder/SF outputs/ ? I'd love to see the pre-gen6 code get rearranged so the FS walked the bitfield of FS inputs from SF and chose the urb offset for each. But this does look like the minimal fix. Reviewed-by: Eric Anholt e...@anholt.net pgp5F8dGu9BYv.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/9] intel gen4-5: fix GL_VERTEX_PROGRAM_TWO_SIDE selection.
Olivier Galibert galib...@pobox.com writes: Previous code only selected two side in pure fixed-function setups. This version also activates it when needed with shaders programs. Signed-off-by: Olivier Galibert galib...@pobox.com --- src/mesa/drivers/dri/i965/brw_sf.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 23a874a..791210f 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -192,7 +192,7 @@ brw_upload_sf_prog(struct brw_context *brw) /* _NEW_LIGHT */ key.do_flat_shading = (ctx-Light.ShadeModel == GL_FLAT); - key.do_twoside_color = (ctx-Light.Enabled ctx-Light.Model.TwoSide); + key.do_twoside_color = ctx-VertexProgram._TwoSideEnabled; ctx-VertexProgram._TwoSideEnabled is also changed when _NEW_PROGRAM is set, so that should be noted in the _NEW_LIGHT comment above and included in brw_sf_prog.dirty.mesa. pgpG1bqJSdSTV.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [Mesa-dev] [PATCH 5/9] intel gen4-5: Compute the interpolation status for every variable in one place.
Olivier Galibert galib...@pobox.com writes:
The program keys are updated accordingly, but the values are not used
yet.
Signed-off-by: Olivier Galibert galib...@pobox.com
---
src/mesa/drivers/dri/i965/brw_clip.c| 90
++-
src/mesa/drivers/dri/i965/brw_clip.h|1 +
src/mesa/drivers/dri/i965/brw_context.h | 11
src/mesa/drivers/dri/i965/brw_sf.c |5 +-
src/mesa/drivers/dri/i965/brw_sf.h |1 +
src/mesa/drivers/dri/i965/brw_wm.c |2 +
src/mesa/drivers/dri/i965/brw_wm.h |1 +
7 files changed, 109 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c
b/src/mesa/drivers/dri/i965/brw_clip.c
index d411208..b4a2e0a 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -47,6 +47,86 @@
#define FRONT_UNFILLED_BIT 0x1
#define BACK_UNFILLED_BIT 0x2
+/**
+ * Lookup the interpolation mode information for every element in the
+ * vue.
+ */
+static void
+brw_lookup_interpolation(struct brw_context *brw)
+{
+ /* pprog means previous program, i.e. the last program before the
+* fragment shader. It can only be the vertex shader for now, but
+* it may be a geometry shader in the future.
+*/
+ const struct gl_program *pprog = brw-vertex_program-Base;
+ const struct gl_fragment_program *fprog = brw-fragment_program;
+ struct brw_vue_map *vue_map = brw-vs.prog_data-vue_map;
+
+ /* Default everything to INTERP_QUALIFIER_NONE */
+ memset(brw-interpolation_mode, INTERP_QUALIFIER_NONE,
BRW_VERT_RESULT_MAX);
I don't like seeing this data that should be referenced out of the
program cache key being communicated through brw-.
pgp5iJIOXxiIU.pgp
Description: PGP signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: flush DC writes cached in l3$ on gen7
Daniel Vetter daniel.vet...@ffwll.ch writes: We don't yet use this, but now that we start to look into putting that l3$ we better set the associated flush bit, too. Also add the only other missing PIPE_CONTROL bit #define. Reviewed-by: Eric Anholt e...@anholt.net pgpmuUosTUjO0.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: disable indirect state pointers in render flush
On Thu, Jul 26, 2012 at 7:33 PM, Eric Anholt e...@anholt.net wrote: Daniel Vetter daniel.vet...@ffwll.ch writes: Since we don't guarantee that objects stay at the same gtt offset, userspace needs to reload all indirect state anyway, even with hw contexts. The hw provides a little pipe_control flag to disable at least some these indirect state pointers and hence avoid to save/restore them at context switch time. Seems to improve hw context switch throughput as measured by running glxgears by about 0.5%, barely above the noise on my ivb gt2 here. I'd like to see some better testing than picking an fps number out of glxgears. I'm dubious of there being any measurable effect here. But then, I haven't even been able to figure out from the specs what exactly is considered to be indirect state. I admit that the the glxgears number is rather pointless - it's meant more as a quick sanity test that things don't go slower. The motivation why I've done this is more that this could help in catching mesa bugs, where for some odd reason some indirect state doesn't get re-emitted (now with hw contexts that's harder to detect than just running 2 drm clients in parallel). If the hw gives us a bit to clean (at least parts) of that state out, I think we should use it to improve testing coverage. -Daniel -- Daniel Vetter daniel.vet...@ffwll.ch - +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 45/81] drm/i915: rip out intel_dp-dpms_mode
Hi 2012/7/11 Daniel Vetter daniel.vet...@ffwll.ch: @@ -2502,7 +2495,6 @@ intel_dp_init(struct drm_device *dev, int output_reg) return; intel_dp-output_reg = output_reg; - intel_dp-dpms_mode = -1; In your current modeset-rework branch, you're also removing the intel_dp-port = port line. Look: http://cgit.freedesktop.org/~danvet/drm/commit/drivers/gpu/drm/i915/intel_dp.c?h=modeset-reworkid=d777693a7eefd4f92a57d49e4a6051f60282f72b This is probably an accident caused by rebasing. -- Paulo Zanoni ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 00/76] modeset rework, lightly reworked
Hi all, Mostly just rebased, but a few bikesheds from Paulo incorporated. I've also moved the patches that can go in early to the front (the first 8 patches). Bigger changes since last time around: - added support for the newly merged ns2501 dvo controller - s/intel_crtc_set_mode/intel_set_mode/ - fixed up a fb helper issue that Paulo has hit Not tested on my full set of machines, so if I'm a doofus I've botched it up with a rebase mistake somewhere. Review, flames and test reports highly welcome. /me heads off Cheers, Daniel Daniel Vetter (76): drm/fb-helper: don't clobber output routing in setup_crtcs drm/i915: add missing gen2 pipe A quirk entries drm/i915/ns2501: kill pll A enabling hack drm/i915: rip out the overlay pipe A workaround drm/i915: prepare load-detect pipe code for dpms changes drm/i915: simplify dvo dpms interface drm/i915: kill a few unused things in dev_priv drm/i915: extract ironlake_fdi_pll_disable drm/i915: add crtc-enable/disable vfuncs insted of dpms drm/i915: rip out crtc prepare/commit indirection drm/i915: add direct encoder disable/enable infrastructure drm/i915/hdmi: convert to encoder-disable/enable drm/i915/tv: convert to encoder enable/disable drm/i915/lvds: convert to encoder disable/enable drm/i915/dp: convert to encoder disable/enable drm/i915/crt: convert to encoder disable/enable drm/i915/sdvo: convert to encoder disable/enable drm/i915/dvo: convert to encoder disable/enable drm/i915: convert dpms functions of dvo/sdvo/crt drm/i915: rip out encoder-disable/enable checks drm/i915: clean up encoder_prepare/commit drm/i915: copypaste drm_crtc_helper_set_config drm/i915: call set_base directly drm/i915: inline intel_best_encoder drm/i915: copypaste drm_crtc_helper_set_mode drm/i915: simplify intel_crtc_prepare_encoders drm/i915: rip out encoder-prepare/commit drm/i915: call crtc functions directly drm/i915: WARN when trying to enabled an unused crtc drm/i915: Add interfaces to read out encoder/connector hw state drm/i915/dp: implement get_hw_state drm/i915/hdmi: implement get_hw_state drm/i915/tv: implement get_hw_state drm/i915/lvds: implement get_hw_state drm/i915/crt: implement get_hw_state drm/i915/sdvo: implement get_hw_state drm/i915/dvo: implement get_hw_state drm/i915: read out the modeset hw state at load and resume time drm/i915: check connector hw/sw state drm/i915: rip out intel_crtc-dpms_mode drm/i915: rip out intel_dp-dpms_mode drm/i915: ensure the force pipe A quirk is actually followed drm/i915: introduce struct intel_set_config drm/i915: extract modeset config save/restore code drm/i915: extract intel_set_config_compute_mode_changes drm/i915: extract intel_set_config_update_output_state drm/i915: implement crtc helper semantics relied upon by the fb helper drm/i915: don't update the fb base if there is no fb drm/i915: convert pointless error checks in set_config to BUGs drm/i915: don't save all the encoder/crtc state in set_config drm/i915: stage modeset output changes drm/i915: push crtc-fb update into pipe_set_base drm/i915: remove crtc disabling special case drm/i915: move output commit and crtc disabling into set_mode drm/i915: extract adjusted mode computation drm/i915: use staged outuput config in tv-mode_fixup drm/i915: use staged outuput config in lvds-mode_fixup drm/i915: compute masks of crtcs affected in set_mode drm/i915: implement new set_mode code flow drm/i915: push commit_output_state past crtc disabling drm/i915: s/intel_encoder_disable/intel_encoder_noop drm/i915: WARN if the pipe won't turn off drm/i915: switch the load detect code to the staged modeset config drm/i915: push commit_output_state past the crtc/encoder preparing drm/i915: disable all crtcs at suspend time drm/i915: add tons of modeset state checks drm/i915: rip out intel_disable_pch_ports drm/i915: don't disable fdi links harder in ilk_crtc_enable drm/i915: don't call dpms funcs after set_mode drm/i915: update dpms property in set_mode drm/i915: add encoder-pre_enable/post_disable drm/i915: clean up the cpu edp pll special case drm/i915: robustify edp_pll_on/off drm/i915: rip out dp port enabling cludges^Wchecks drm/i915: disable the cpu edp port after the cpu pipe drm/i915: move encoder-mode_set calls to crtc_mode_set drivers/gpu/drm/drm_fb_helper.c |6 - drivers/gpu/drm/i915/dvo.h | 15 +- drivers/gpu/drm/i915/dvo_ch7017.c| 21 +- drivers/gpu/drm/i915/dvo_ch7xxx.c| 17 +- drivers/gpu/drm/i915/dvo_ivch.c | 23 +- drivers/gpu/drm/i915/dvo_ns2501.c| 36 +- drivers/gpu/drm/i915/dvo_sil164.c| 20 +- drivers/gpu/drm/i915/dvo_tfp410.c| 18 +- drivers/gpu/drm/i915/i915_dma.c | 22 +- drivers/gpu/drm/i915/i915_drv.c |4 + drivers/gpu/drm/i915/i915_drv.h | 17 +- drivers/gpu/drm/i915/i915_reg.h |2 +
[Intel-gfx] [PATCH 01/76] drm/fb-helper: don't clobber output routing in setup_crtcs
Yet again the too close relationship between the fb helper and the
crtc helper code strikes. This time around the fb helper resets all
encoder-crtc pointers to NULL before starting to set up it's own
mode. Which is total bullocks, because this will clobber the existing
output routing, which the new drm/i915 code depends upon to be
absolutely correct.
The crtc helper itself doesn't really care about that, since it
disables unused encoders in a rather roundabout way.
Two places call drm_setup_crts:
- For the initial fb config. I've auditted all current drivers, and
they all allocate their encoders with kzalloc. So there's no need to
clear encoder-crtc once more.
- When processing hotplug events while showing the fb console. This
one is a bit more tricky, but both the crtc helper code and the new
drm/i915 modeset code disable encoders if their crtc is changed and
that encoder isn't part of the new config. Also, both disable any
disconnected outputs, too.
Which only leaves encoders that are on, connected, but for some odd
reason the fb helper code doesn't want to use. That would be a bug
in the fb configuration selector, since it tries to light up as many
outputs as possible.
v2: Kill the now unused encoders variable.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_fb_helper.c |6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index f546d1e..4ecc869 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1230,7 +1230,6 @@ static void drm_setup_crtcs(struct drm_fb_helper
*fb_helper)
struct drm_device *dev = fb_helper-dev;
struct drm_fb_helper_crtc **crtcs;
struct drm_display_mode **modes;
- struct drm_encoder *encoder;
struct drm_mode_set *modeset;
bool *enabled;
int width, height;
@@ -1241,11 +1240,6 @@ static void drm_setup_crtcs(struct drm_fb_helper
*fb_helper)
width = dev-mode_config.max_width;
height = dev-mode_config.max_height;
- /* clean out all the encoder/crtc combos */
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
- encoder-crtc = NULL;
- }
-
crtcs = kcalloc(dev-mode_config.num_connector,
sizeof(struct drm_fb_helper_crtc *), GFP_KERNEL);
modes = kcalloc(dev-mode_config.num_connector,
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/76] drm/i915: add missing gen2 pipe A quirk entries
For some odd reason we've missed i830 and a i855 variant. Also
kill the two now redundant i830 entries.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 17020cd..21eff8b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7027,21 +7027,17 @@ static struct intel_quirk intel_quirks[] = {
/* HP Mini needs pipe A force quirk (LP: #322104) */
{ 0x27ae, 0x103c, 0x361a, quirk_pipea_force },
- /* Thinkpad R31 needs pipe A force quirk */
- { 0x3577, 0x1014, 0x0505, quirk_pipea_force },
/* Toshiba Protege R-205, S-209 needs pipe A force quirk */
{ 0x2592, 0x1179, 0x0001, quirk_pipea_force },
- /* ThinkPad X30 needs pipe A force quirk (LP: #304614) */
- { 0x3577, 0x1014, 0x0513, quirk_pipea_force },
- /* ThinkPad X40 needs pipe A force quirk */
-
/* ThinkPad T60 needs pipe A force quirk (bug #16494) */
{ 0x2782, 0x17aa, 0x201a, quirk_pipea_force },
/* 855 before need to leave pipe A dpll A up */
{ 0x3582, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
{ 0x2562, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
+ { 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
+ { 0x358e, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
/* Lenovo U160 cannot use SSC on LVDS */
{ 0x0046, 0x17aa, 0x3920, quirk_ssc_force_disable },
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/76] drm/i915/ns2501: kill pll A enabling hack
With the pipe A quirk properly fixed up for i830M, this shouldn't be
required any longer.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/dvo_ns2501.c|7 ---
drivers/gpu/drm/i915/intel_display.c |2 +-
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c
b/drivers/gpu/drm/i915/dvo_ns2501.c
index 1a0bad9..6bd383d 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -75,11 +75,6 @@ struct ns2501_priv {
#define NSPTR(d) ((NS2501Ptr)(d-DriverPrivate.ptr))
/*
- * Include the PLL launcher prototype
- */
-extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe
pipe);
-
-/*
* For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens
* laptops does not react on the i2c bus unless
* both the PLL is running and the display is configured in its native
@@ -113,8 +108,6 @@ static void enable_dvo(struct intel_dvo_device *dvo)
I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768
I915_WRITE(FW_BLC, 0x1080304);
- intel_enable_pll(dev_priv, 0);
-
I915_WRITE(DVOC, 0x90004084);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 21eff8b..1504c36 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1431,7 +1431,7 @@ static void assert_pch_ports_disabled(struct
drm_i915_private *dev_priv,
*
* Unfortunately needed by dvo_ns2501 since the dvo depends on it running.
*/
-void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
+static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
{
int reg;
u32 val;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 05/76] drm/i915: prepare load-detect pipe code for dpms changes
A few things need adjustement:
- Change the dpms state by calling the dpms connector function and
not some crtc helper internal callbacks. Otherwise this will break
once we switch to our own dpms handling.
- Instead of tracking and restoring intel_crtc-dpms_mode use the
connector's dpms variable - the former relies on the dpms compuation
rules used by the crtc helper. And it would break when the encoder
is cloned and the other output has a different dpms state. But luckily
no one is crazy enough for that.
- Properly clear the connector - encoder - crtc linking, even when
failing (note that the crtc helper removes the encoder - crtc link
in disabled_unused_functions for us).
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 38 +-
1 file changed, 14 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 1504c36..7224055 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5625,21 +5625,12 @@ bool intel_get_load_detect_pipe(struct intel_encoder
*intel_encoder,
if (encoder-crtc) {
crtc = encoder-crtc;
- intel_crtc = to_intel_crtc(crtc);
- old-dpms_mode = intel_crtc-dpms_mode;
+ old-dpms_mode = connector-dpms;
old-load_detect_temp = false;
/* Make sure the crtc and connector are running */
- if (intel_crtc-dpms_mode != DRM_MODE_DPMS_ON) {
- struct drm_encoder_helper_funcs *encoder_funcs;
- struct drm_crtc_helper_funcs *crtc_funcs;
-
- crtc_funcs = crtc-helper_private;
- crtc_funcs-dpms(crtc, DRM_MODE_DPMS_ON);
-
- encoder_funcs = encoder-helper_private;
- encoder_funcs-dpms(encoder, DRM_MODE_DPMS_ON);
- }
+ if (connector-dpms != DRM_MODE_DPMS_ON)
+ connector-funcs-dpms(connector, DRM_MODE_DPMS_ON);
return true;
}
@@ -5667,7 +5658,7 @@ bool intel_get_load_detect_pipe(struct intel_encoder
*intel_encoder,
connector-encoder = encoder;
intel_crtc = to_intel_crtc(crtc);
- old-dpms_mode = intel_crtc-dpms_mode;
+ old-dpms_mode = connector-dpms;
old-load_detect_temp = true;
old-release_fb = NULL;
@@ -5692,22 +5683,25 @@ bool intel_get_load_detect_pipe(struct intel_encoder
*intel_encoder,
DRM_DEBUG_KMS(reusing fbdev for load-detection framebuffer\n);
if (IS_ERR(crtc-fb)) {
DRM_DEBUG_KMS(failed to allocate framebuffer for
load-detection\n);
- crtc-fb = old_fb;
- return false;
+ goto fail;
}
if (!drm_crtc_helper_set_mode(crtc, mode, 0, 0, old_fb)) {
DRM_DEBUG_KMS(failed to set mode on load-detect pipe\n);
if (old-release_fb)
old-release_fb-funcs-destroy(old-release_fb);
- crtc-fb = old_fb;
- return false;
+ goto fail;
}
/* let the connector get through one full cycle before testing */
intel_wait_for_vblank(dev, intel_crtc-pipe);
return true;
+fail:
+ connector-encoder = NULL;
+ encoder-crtc = NULL;
+ crtc-fb = old_fb;
+ return false;
}
void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
@@ -5716,9 +5710,6 @@ void intel_release_load_detect_pipe(struct intel_encoder
*intel_encoder,
{
struct drm_encoder *encoder = intel_encoder-base;
struct drm_device *dev = encoder-dev;
- struct drm_crtc *crtc = encoder-crtc;
- struct drm_encoder_helper_funcs *encoder_funcs =
encoder-helper_private;
- struct drm_crtc_helper_funcs *crtc_funcs = crtc-helper_private;
DRM_DEBUG_KMS([CONNECTOR:%d:%s], [ENCODER:%d:%s]\n,
connector-base.id, drm_get_connector_name(connector),
@@ -5726,6 +5717,7 @@ void intel_release_load_detect_pipe(struct intel_encoder
*intel_encoder,
if (old-load_detect_temp) {
connector-encoder = NULL;
+ encoder-crtc = NULL;
drm_helper_disable_unused_functions(dev);
if (old-release_fb)
@@ -5735,10 +5727,8 @@ void intel_release_load_detect_pipe(struct intel_encoder
*intel_encoder,
}
/* Switch crtc and encoder back off if necessary */
- if (old-dpms_mode != DRM_MODE_DPMS_ON) {
- encoder_funcs-dpms(encoder, old-dpms_mode);
- crtc_funcs-dpms(crtc, old-dpms_mode);
- }
+ if (old-dpms_mode != DRM_MODE_DPMS_ON)
+ connector-funcs-dpms(connector, old-dpms_mode);
}
/* Returns the clock of the currently programmed mode of the given pipe. */
--
1.7.10.4
[Intel-gfx] [PATCH 20/76] drm/i915: rip out encoder-disable/enable checks
All encoders are now converted so there's no need for these checks any
more.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2f78dbd..000200f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3266,10 +3266,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_crtc_update_cursor(crtc, true);
encoders:
- for_each_encoder_on_crtc(dev, crtc, encoder) {
- if (encoder-enable)
- encoder-enable(encoder);
- }
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ encoder-enable(encoder);
}
static void ironlake_crtc_disable(struct drm_crtc *crtc)
@@ -3284,10 +3282,8 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
/* XXX: For compatability with the crtc helper code, call the encoder's
* disable function unconditionally for now. */
- for_each_encoder_on_crtc(dev, crtc, encoder) {
- if (encoder-disable)
- encoder-disable(encoder);
- }
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ encoder-disable(encoder);
if (!intel_crtc-active)
return;
@@ -3411,10 +3407,8 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
intel_crtc_update_cursor(crtc, true);
encoders:
- for_each_encoder_on_crtc(dev, crtc, encoder) {
- if (encoder-enable)
- encoder-enable(encoder);
- }
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ encoder-enable(encoder);
}
static void i9xx_crtc_disable(struct drm_crtc *crtc)
@@ -3428,10 +3422,8 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
/* XXX: For compatability with the crtc helper code, call the encoder's
* disable function unconditionally for now. */
- for_each_encoder_on_crtc(dev, crtc, encoder) {
- if (encoder-disable)
- encoder-disable(encoder);
- }
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ encoder-disable(encoder);
if (!intel_crtc-active)
return;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 21/76] drm/i915: clean up encoder_prepare/commit
We no longer need them. And now that all encoders are converted, we
can finally move the cpt modeset check to the right place - at the end
of the crtc_enable function.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 23 +++
drivers/gpu/drm/i915/intel_drv.h |2 --
2 files changed, 3 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 000200f..61646b3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3268,6 +3268,9 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
encoders:
for_each_encoder_on_crtc(dev, crtc, encoder)
encoder-enable(encoder);
+
+ if (HAS_PCH_CPT(dev))
+ intel_cpt_verify_modeset(dev, intel_crtc-pipe);
}
static void ironlake_crtc_disable(struct drm_crtc *crtc)
@@ -3523,26 +3526,6 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
}
}
-void intel_encoder_prepare(struct drm_encoder *encoder)
-{
- struct drm_encoder_helper_funcs *encoder_funcs =
encoder-helper_private;
- /* lvds has its own version of prepare see intel_lvds_prepare */
- encoder_funcs-dpms(encoder, DRM_MODE_DPMS_OFF);
-}
-
-void intel_encoder_commit(struct drm_encoder *encoder)
-{
- struct drm_encoder_helper_funcs *encoder_funcs =
encoder-helper_private;
- struct drm_device *dev = encoder-dev;
- struct intel_crtc *intel_crtc = to_intel_crtc(encoder-crtc);
-
- /* lvds has its own version of commit see intel_lvds_commit */
- encoder_funcs-dpms(encoder, DRM_MODE_DPMS_ON);
-
- if (HAS_PCH_CPT(dev))
- intel_cpt_verify_modeset(dev, intel_crtc-pipe);
-}
-
void intel_encoder_noop(struct drm_encoder *encoder)
{
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5cfa616..faf48b3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -412,8 +412,6 @@ extern enum drm_connector_status intel_panel_detect(struct
drm_device *dev);
extern void intel_crtc_load_lut(struct drm_crtc *crtc);
extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
-extern void intel_encoder_prepare(struct drm_encoder *encoder);
-extern void intel_encoder_commit(struct drm_encoder *encoder);
extern void intel_encoder_noop(struct drm_encoder *encoder);
extern void intel_encoder_disable(struct drm_encoder *encoder);
extern void intel_encoder_destroy(struct drm_encoder *encoder);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 24/76] drm/i915: inline intel_best_encoder
Also kill the error-path, we have a fixed connector-encoder mapping.
Unfortunately we can't rip out all the -best_encoder callbacks, these
are all still used by the fb_helper. Neat helper layering violation there.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 941d0d1..fe89254 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6571,7 +6571,7 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
bool mode_changed = false; /* if true do a full mode set */
bool fb_changed = false; /* if true and !mode_changed just do a flip */
struct drm_connector *save_connectors, *connector;
- int count = 0, ro, fail = 0;
+ int count = 0, ro;
struct drm_mode_set save_set;
int ret;
int i;
@@ -6587,7 +6587,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
if (!set-crtc-helper_private)
return -EINVAL;
-
if (!set-mode)
set-fb = NULL;
@@ -6680,17 +6679,11 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
/* a) traverse passed in connector list and get encoders for them */
count = 0;
list_for_each_entry(connector, dev-mode_config.connector_list, head) {
- struct drm_connector_helper_funcs *connector_funcs =
- connector-helper_private;
new_encoder = connector-encoder;
for (ro = 0; ro set-num_connectors; ro++) {
if (set-connectors[ro] == connector) {
- new_encoder =
connector_funcs-best_encoder(connector);
- /* if we can't get an encoder for a connector
- we are setting now - then fail */
- if (new_encoder == NULL)
- /* don't break so fail path works
correct */
- fail = 1;
+ new_encoder =
+
intel_attached_encoder(connector)-base;
break;
}
}
@@ -6707,11 +6700,6 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
}
}
- if (fail) {
- ret = -EINVAL;
- goto fail;
- }
-
count = 0;
list_for_each_entry(connector, dev-mode_config.connector_list, head) {
if (!connector-encoder)
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 25/76] drm/i915: copypaste drm_crtc_helper_set_mode
Together with the static helper functions drm_crtc_prepare_encoders
and drm_encoder_disable (which will be simplified in the next patch,
but for now are 1:1 copies). Again, no changes beside new names for
these functions.
Also call our new set_mode instead of the crtc helper one now in all
the places we've done so far.
v2: Call the function just intel_set_mode to better differentia it
from intel_crtc_mode_set which really only does the -mode_set step of
the entire modeset sequence on one crtc. Whereas this function does
the global change.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 162 --
drivers/gpu/drm/i915/intel_dp.c |5 +-
drivers/gpu/drm/i915/intel_drv.h |2 +
drivers/gpu/drm/i915/intel_hdmi.c|5 +-
drivers/gpu/drm/i915/intel_lvds.c|4 +-
drivers/gpu/drm/i915/intel_sdvo.c|4 +-
drivers/gpu/drm/i915/intel_tv.c |4 +-
7 files changed, 168 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index fe89254..098fee3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5695,7 +5695,7 @@ bool intel_get_load_detect_pipe(struct intel_encoder
*intel_encoder,
goto fail;
}
- if (!drm_crtc_helper_set_mode(crtc, mode, 0, 0, old_fb)) {
+ if (!intel_set_mode(crtc, mode, 0, 0, old_fb)) {
DRM_DEBUG_KMS(failed to set mode on load-detect pipe\n);
if (old-release_fb)
old-release_fb-funcs-destroy(old-release_fb);
@@ -6562,6 +6562,157 @@ intel_crtc_helper_disable(struct drm_crtc *crtc)
return 0;
}
+static void
+intel_encoder_disable_helper(struct drm_encoder *encoder)
+{
+ struct drm_encoder_helper_funcs *encoder_funcs =
encoder-helper_private;
+
+ if (encoder_funcs-disable)
+ (*encoder_funcs-disable)(encoder);
+ else
+ (*encoder_funcs-dpms)(encoder, DRM_MODE_DPMS_OFF);
+}
+
+static void
+intel_crtc_prepare_encoders(struct drm_device *dev)
+{
+ struct drm_encoder_helper_funcs *encoder_funcs;
+ struct drm_encoder *encoder;
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+ encoder_funcs = encoder-helper_private;
+ /* Disable unused encoders */
+ if (encoder-crtc == NULL)
+ intel_encoder_disable_helper(encoder);
+ /* Disable encoders whose CRTC is about to change */
+ if (encoder_funcs-get_crtc
+ encoder-crtc != (*encoder_funcs-get_crtc)(encoder))
+ intel_encoder_disable_helper(encoder);
+ }
+}
+
+bool intel_set_mode(struct drm_crtc *crtc,
+ struct drm_display_mode *mode,
+ int x, int y, struct drm_framebuffer *old_fb)
+{
+ struct drm_device *dev = crtc-dev;
+ struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode;
+ struct drm_crtc_helper_funcs *crtc_funcs = crtc-helper_private;
+ struct drm_encoder_helper_funcs *encoder_funcs;
+ int saved_x, saved_y;
+ struct drm_encoder *encoder;
+ bool ret = true;
+
+ crtc-enabled = drm_helper_crtc_in_use(crtc);
+ if (!crtc-enabled)
+ return true;
+
+ adjusted_mode = drm_mode_duplicate(dev, mode);
+ if (!adjusted_mode)
+ return false;
+
+ saved_hwmode = crtc-hwmode;
+ saved_mode = crtc-mode;
+ saved_x = crtc-x;
+ saved_y = crtc-y;
+
+ /* Update crtc values up front so the driver can rely on them for mode
+* setting.
+*/
+ crtc-mode = *mode;
+ crtc-x = x;
+ crtc-y = y;
+
+ /* Pass our mode to the connectors and the CRTC to give them a chance to
+* adjust it according to limitations or connector properties, and also
+* a chance to reject the mode entirely.
+*/
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+
+ if (encoder-crtc != crtc)
+ continue;
+ encoder_funcs = encoder-helper_private;
+ if (!(ret = encoder_funcs-mode_fixup(encoder, mode,
+ adjusted_mode))) {
+ DRM_DEBUG_KMS(Encoder fixup failed\n);
+ goto done;
+ }
+ }
+
+ if (!(ret = crtc_funcs-mode_fixup(crtc, mode, adjusted_mode))) {
+ DRM_DEBUG_KMS(CRTC fixup failed\n);
+ goto done;
+ }
+ DRM_DEBUG_KMS([CRTC:%d]\n, crtc-base.id);
+
+ /* Prepare the encoders and CRTCs before setting the mode. */
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+
+ if (encoder-crtc != crtc)
+ continue;
+ encoder_funcs
[Intel-gfx] [PATCH 26/76] drm/i915: simplify intel_crtc_prepare_encoders
- We don't have the -get_crtc callback.
- Call intel_encoder-disable directly.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 25 -
1 file changed, 4 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 098fee3..aac21a3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6563,31 +6563,14 @@ intel_crtc_helper_disable(struct drm_crtc *crtc)
}
static void
-intel_encoder_disable_helper(struct drm_encoder *encoder)
-{
- struct drm_encoder_helper_funcs *encoder_funcs =
encoder-helper_private;
-
- if (encoder_funcs-disable)
- (*encoder_funcs-disable)(encoder);
- else
- (*encoder_funcs-dpms)(encoder, DRM_MODE_DPMS_OFF);
-}
-
-static void
intel_crtc_prepare_encoders(struct drm_device *dev)
{
- struct drm_encoder_helper_funcs *encoder_funcs;
- struct drm_encoder *encoder;
+ struct intel_encoder *encoder;
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
- encoder_funcs = encoder-helper_private;
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, base.head)
{
/* Disable unused encoders */
- if (encoder-crtc == NULL)
- intel_encoder_disable_helper(encoder);
- /* Disable encoders whose CRTC is about to change */
- if (encoder_funcs-get_crtc
- encoder-crtc != (*encoder_funcs-get_crtc)(encoder))
- intel_encoder_disable_helper(encoder);
+ if (encoder-base.crtc == NULL)
+ encoder-disable(encoder);
}
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 27/76] drm/i915: rip out encoder-prepare/commit
With the new infrastructure we're doing this when enabling/disabling
the entire display pipe.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_crt.c |2 --
drivers/gpu/drm/i915/intel_display.c | 24
drivers/gpu/drm/i915/intel_dp.c |2 --
drivers/gpu/drm/i915/intel_drv.h |1 -
drivers/gpu/drm/i915/intel_dvo.c |2 --
drivers/gpu/drm/i915/intel_hdmi.c|4
drivers/gpu/drm/i915/intel_lvds.c|2 --
drivers/gpu/drm/i915/intel_sdvo.c|2 --
drivers/gpu/drm/i915/intel_tv.c |2 --
9 files changed, 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index b8de955..8b95cef 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -619,8 +619,6 @@ static void intel_crt_reset(struct drm_connector *connector)
static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
.mode_fixup = intel_crt_mode_fixup,
- .prepare = intel_encoder_noop,
- .commit = intel_encoder_noop,
.mode_set = intel_crt_mode_set,
.disable = intel_encoder_disable,
};
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index aac21a3..a6b6f44 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3526,10 +3526,6 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
}
}
-void intel_encoder_noop(struct drm_encoder *encoder)
-{
-}
-
void intel_encoder_disable(struct drm_encoder *encoder)
{
struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
@@ -6628,16 +6624,6 @@ bool intel_set_mode(struct drm_crtc *crtc,
}
DRM_DEBUG_KMS([CRTC:%d]\n, crtc-base.id);
- /* Prepare the encoders and CRTCs before setting the mode. */
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
-
- if (encoder-crtc != crtc)
- continue;
- encoder_funcs = encoder-helper_private;
- /* Disable the encoders as the first thing we do. */
- encoder_funcs-prepare(encoder);
- }
-
intel_crtc_prepare_encoders(dev);
crtc_funcs-prepare(crtc);
@@ -6664,16 +6650,6 @@ bool intel_set_mode(struct drm_crtc *crtc,
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
crtc_funcs-commit(crtc);
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
-
- if (encoder-crtc != crtc)
- continue;
-
- encoder_funcs = encoder-helper_private;
- encoder_funcs-commit(encoder);
-
- }
-
/* Store real post-adjustment hardware mode. */
crtc-hwmode = *adjusted_mode;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c31335a..7a65f37 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2346,9 +2346,7 @@ static void intel_dp_encoder_destroy(struct drm_encoder
*encoder)
static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
.mode_fixup = intel_dp_mode_fixup,
- .prepare = intel_encoder_noop,
.mode_set = intel_dp_mode_set,
- .commit = intel_encoder_noop,
.disable = intel_encoder_disable,
};
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e101bf7..4145a1d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -414,7 +414,6 @@ extern bool intel_set_mode(struct drm_crtc *crtc, struct
drm_display_mode *mode,
int x, int y, struct drm_framebuffer *old_fb);
extern void intel_crtc_load_lut(struct drm_crtc *crtc);
extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
-extern void intel_encoder_noop(struct drm_encoder *encoder);
extern void intel_encoder_disable(struct drm_encoder *encoder);
extern void intel_encoder_destroy(struct drm_encoder *encoder);
extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index c55a13e..84c0867 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -318,9 +318,7 @@ static void intel_dvo_destroy(struct drm_connector
*connector)
static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
.mode_fixup = intel_dvo_mode_fixup,
- .prepare = intel_encoder_noop,
.mode_set = intel_dvo_mode_set,
- .commit = intel_encoder_noop,
.disable = intel_encoder_disable,
};
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index ef84097..c9535ce 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -885,17 +885,13 @@ static void intel_hdmi_destroy(struct drm_connector
*connector)
static
[Intel-gfx] [PATCH 28/76] drm/i915: call crtc functions directly
Instead of going through the crtc helper function tables.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index a6b6f44..177795a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6505,8 +6505,6 @@ static void intel_crtc_reset(struct drm_crtc *crtc)
}
static struct drm_crtc_helper_funcs intel_helper_funcs = {
- .mode_fixup = intel_crtc_mode_fixup,
- .mode_set = intel_crtc_mode_set,
.mode_set_base_atomic = intel_pipe_set_base_atomic,
.load_lut = intel_crtc_load_lut,
.disable = intel_crtc_disable,
@@ -6575,8 +6573,8 @@ bool intel_set_mode(struct drm_crtc *crtc,
int x, int y, struct drm_framebuffer *old_fb)
{
struct drm_device *dev = crtc-dev;
+ drm_i915_private_t *dev_priv = dev-dev_private;
struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode;
- struct drm_crtc_helper_funcs *crtc_funcs = crtc-helper_private;
struct drm_encoder_helper_funcs *encoder_funcs;
int saved_x, saved_y;
struct drm_encoder *encoder;
@@ -6618,7 +6616,7 @@ bool intel_set_mode(struct drm_crtc *crtc,
}
}
- if (!(ret = crtc_funcs-mode_fixup(crtc, mode, adjusted_mode))) {
+ if (!(ret = intel_crtc_mode_fixup(crtc, mode, adjusted_mode))) {
DRM_DEBUG_KMS(CRTC fixup failed\n);
goto done;
}
@@ -6626,12 +6624,12 @@ bool intel_set_mode(struct drm_crtc *crtc,
intel_crtc_prepare_encoders(dev);
- crtc_funcs-prepare(crtc);
+ dev_priv-display.crtc_disable(crtc);
/* Set up the DPLL and any encoders state that needs to adjust or depend
* on the DPLL.
*/
- ret = !crtc_funcs-mode_set(crtc, mode, adjusted_mode, x, y, old_fb);
+ ret = !intel_crtc_mode_set(crtc, mode, adjusted_mode, x, y, old_fb);
if (!ret)
goto done;
@@ -6648,7 +6646,7 @@ bool intel_set_mode(struct drm_crtc *crtc,
}
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
- crtc_funcs-commit(crtc);
+ dev_priv-display.crtc_enable(crtc);
/* Store real post-adjustment hardware mode. */
crtc-hwmode = *adjusted_mode;
@@ -6982,9 +6980,6 @@ static void intel_crtc_init(struct drm_device *dev, int
pipe)
intel_crtc-active = true; /* force the pipe off on setup_init_config */
intel_crtc-bpp = 24; /* default for pre-Ironlake */
- intel_helper_funcs.prepare = dev_priv-display.crtc_disable;
- intel_helper_funcs.commit = dev_priv-display.crtc_enable;
-
drm_crtc_helper_add(intel_crtc-base, intel_helper_funcs);
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 29/76] drm/i915: WARN when trying to enabled an unused crtc
This is the first tiny step towards cross-checking the entire modeset
state machine with WARNs. A crtc can only be enabled when it's
actually in use, i.e. crtc-active imlies crtc-enabled.
Unfortunately we can't (yet) check this when disabling the crtc,
because the crtc helpers are a bit slopy with updating state and
unconditionally update crtc-enabled before changing the hw state.
Fixing that requires quite some more work.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |4
drivers/gpu/drm/i915/intel_drv.h | 10 +-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 177795a..428e0ed 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3214,6 +3214,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
u32 temp;
bool is_pch_port;
+ WARN_ON(!crtc-enabled);
+
/* XXX: For compatability with the crtc helper code, call the encoder's
* enable function unconditionally for now. */
if (intel_crtc-active)
@@ -3390,6 +3392,8 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
int pipe = intel_crtc-pipe;
int plane = intel_crtc-plane;
+ WARN_ON(!crtc-enabled);
+
/* XXX: For compatability with the crtc helper code, call the encoder's
* enable function unconditionally for now. */
if (intel_crtc-active)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 4145a1d..0f2a42e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -157,7 +157,15 @@ struct intel_crtc {
enum plane plane;
u8 lut_r[256], lut_g[256], lut_b[256];
int dpms_mode;
- bool active; /* is the crtc on? independent of the dpms mode */
+ /*
+* Whether the crtc and the connected output pipeline is active. Implies
+* that crtc-enabled is set, i.e. the current mode configuration has
+* some outputs connected to this crtc.
+*
+* Atm crtc-enabled is unconditionally updated _before_ the hw state is
+* changed, hence we can only check this when enabling the crtc.
+*/
+ bool active;
bool primary_disabled; /* is the crtc obscured by a plane? */
bool lowfreq_avail;
struct intel_overlay *overlay;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 31/76] drm/i915/dp: implement get_hw_state
Also add some macros to make the pipe computation a bit easier.
v2: I've mixed up the CPT and !CPT PORT_TO_PIPE macro variants ...
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_reg.h |2 ++
drivers/gpu/drm/i915/intel_dp.c | 50 +++
2 files changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1310caa..dd6bd7a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4029,6 +4029,8 @@
#define PORT_TRANS_C_SEL_CPT (229)
#define PORT_TRANS_SEL_MASK (329)
#define PORT_TRANS_SEL_CPT(pipe) ((pipe) 29)
+#define PORT_TO_PIPE(val) (((val) (130)) 30)
+#define PORT_TO_PIPE_CPT(val) (((val) PORT_TRANS_SEL_MASK) 29)
#define TRANS_DP_CTL_A 0xe0300
#define TRANS_DP_CTL_B 0xe1300
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7a65f37..b201c7e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1246,6 +1246,54 @@ static void intel_dp_sink_dpms(struct intel_dp
*intel_dp, int mode)
}
}
+static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ u32 tmp = I915_READ(intel_dp-output_reg);
+
+ if (!(tmp DP_PORT_EN))
+ return false;
+
+ if (is_cpu_edp(intel_dp) IS_GEN7(dev)) {
+ *pipe = PORT_TO_PIPE_CPT(tmp);
+ } else if (!HAS_PCH_CPT(dev) || is_cpu_edp(intel_dp)) {
+ *pipe = PORT_TO_PIPE(tmp);
+ } else {
+ u32 trans_sel;
+ u32 trans_dp;
+ int i;
+
+ switch (intel_dp-output_reg) {
+ case PCH_DP_B:
+ trans_sel = TRANS_DP_PORT_SEL_B;
+ break;
+ case PCH_DP_C:
+ trans_sel = TRANS_DP_PORT_SEL_C;
+ break;
+ case PCH_DP_D:
+ trans_sel = TRANS_DP_PORT_SEL_D;
+ break;
+ default:
+ return true;
+ }
+
+ for_each_pipe(i) {
+ trans_dp = I915_READ(TRANS_DP_CTL(i));
+ if ((trans_dp TRANS_DP_PORT_SEL_MASK) == trans_sel) {
+ *pipe = i;
+ return true;
+ }
+ }
+ }
+
+ DRM_DEBUG_KMS(No pipe for dp port 0x%x found\n, intel_dp-output_reg);
+
+ return true;
+}
+
static void intel_disable_dp(struct intel_encoder *encoder)
{
struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
@@ -2484,6 +2532,8 @@ intel_dp_init(struct drm_device *dev, int output_reg,
enum port port)
intel_encoder-enable = intel_enable_dp;
intel_encoder-disable = intel_disable_dp;
+ intel_encoder-get_hw_state = intel_dp_get_hw_state;
+ intel_connector-get_hw_state = intel_connector_get_hw_state;
/* Set up the DDC bus. */
switch (port) {
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 32/76] drm/i915/hdmi: implement get_hw_state
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_ddi.c | 29 +
drivers/gpu/drm/i915/intel_drv.h |2 ++
drivers/gpu/drm/i915/intel_hdmi.c | 24
3 files changed, 55 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index c10f518..bd450a8 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -738,6 +738,35 @@ void intel_ddi_mode_set(struct drm_encoder *encoder,
intel_hdmi-set_infoframes(encoder, adjusted_mode);
}
+bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder-base);
+ u32 tmp;
+ int i;
+
+ tmp = I915_READ(DDI_BUF_CTL(intel_hdmi-ddi_port));
+
+ if (!(tmp DDI_BUF_CTL_ENABLE))
+ return false;
+
+ for_each_pipe(i) {
+ tmp = I915_READ(DDI_FUNC_CTL(i));
+
+ if ((tmp PIPE_DDI_PORT_MASK)
+ == PIPE_DDI_SELECT_PORT(intel_hdmi-ddi_port)) {
+ *pipe = i;
+ return true;
+ }
+ }
+
+ DRM_DEBUG_KMS(No pipe for ddi port %i found\n, intel_hdmi-ddi_port);
+
+ return true;
+}
+
void intel_enable_ddi(struct intel_encoder *encoder)
{
struct drm_device *dev = encoder-base.dev;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a2acf5f..af7865e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -544,6 +544,8 @@ extern void ironlake_teardown_rc6(struct drm_device *dev);
extern void intel_enable_ddi(struct intel_encoder *encoder);
extern void intel_disable_ddi(struct intel_encoder *encoder);
+extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe);
extern void intel_ddi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index c9535ce..e7d5078 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -601,6 +601,27 @@ static void intel_hdmi_mode_set(struct drm_encoder
*encoder,
intel_hdmi-set_infoframes(encoder, adjusted_mode);
}
+static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder-base);
+ u32 tmp;
+
+ tmp = I915_READ(intel_hdmi-sdvox_reg);
+
+ if (!(tmp SDVO_ENABLE))
+ return false;
+
+ if (HAS_PCH_CPT(dev))
+ *pipe = PORT_TO_PIPE_CPT(tmp);
+ else
+ *pipe = PORT_TO_PIPE(tmp);
+
+ return true;
+}
+
static void intel_enable_hdmi(struct intel_encoder *encoder)
{
struct drm_device *dev = encoder-base.dev;
@@ -998,14 +1019,17 @@ void intel_hdmi_init(struct drm_device *dev, int
sdvox_reg, enum port port)
if (IS_HASWELL(dev)) {
intel_encoder-enable = intel_enable_ddi;
intel_encoder-disable = intel_disable_ddi;
+ intel_encoder-get_hw_state = intel_ddi_get_hw_state;
drm_encoder_helper_add(intel_encoder-base,
intel_hdmi_helper_funcs_hsw);
} else {
intel_encoder-enable = intel_enable_hdmi;
intel_encoder-disable = intel_disable_hdmi;
+ intel_encoder-get_hw_state = intel_hdmi_get_hw_state;
drm_encoder_helper_add(intel_encoder-base,
intel_hdmi_helper_funcs);
}
+ intel_connector-get_hw_state = intel_connector_get_hw_state;
intel_hdmi_add_properties(intel_hdmi, connector);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 33/76] drm/i915/tv: implement get_hw_state
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_tv.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 0876782..7828583 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -836,6 +836,21 @@ static struct intel_tv *intel_attached_tv(struct
drm_connector *connector)
base);
}
+static bool
+intel_tv_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ u32 tmp = I915_READ(TV_CTL);
+
+ if (!(tmp TV_ENC_ENABLE))
+ return false;
+
+ *pipe = PORT_TO_PIPE(tmp);
+
+ return true;
+}
+
static void
intel_enable_tv(struct intel_encoder *encoder)
{
@@ -1619,6 +1634,8 @@ intel_tv_init(struct drm_device *dev)
intel_encoder-enable = intel_enable_tv;
intel_encoder-disable = intel_disable_tv;
+ intel_encoder-get_hw_state = intel_tv_get_hw_state;
+ intel_connector-get_hw_state = intel_connector_get_hw_state;
intel_connector_attach_encoder(intel_connector, intel_encoder);
intel_encoder-type = INTEL_OUTPUT_TVOUT;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 34/76] drm/i915/lvds: implement get_hw_state
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_lvds.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index 5fc7abc..52f9e7f 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -65,6 +65,32 @@ static struct intel_lvds *intel_attached_lvds(struct
drm_connector *connector)
struct intel_lvds, base);
}
+static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ u32 lvds_reg, tmp;
+
+ if (HAS_PCH_SPLIT(dev)) {
+ lvds_reg = PCH_LVDS;
+ } else {
+ lvds_reg = LVDS;
+ }
+
+ tmp = I915_READ(lvds_reg);
+
+ if (!(tmp LVDS_PORT_EN))
+ return false;
+
+ if (HAS_PCH_CPT(dev))
+ *pipe = PORT_TO_PIPE_CPT(tmp);
+ else
+ *pipe = PORT_TO_PIPE(tmp);
+
+ return true;
+}
+
/**
* Sets the power state for the panel.
*/
@@ -937,6 +963,8 @@ bool intel_lvds_init(struct drm_device *dev)
intel_encoder-enable = intel_enable_lvds;
intel_encoder-disable = intel_disable_lvds;
+ intel_encoder-get_hw_state = intel_lvds_get_hw_state;
+ intel_connector-get_hw_state = intel_connector_get_hw_state;
intel_connector_attach_encoder(intel_connector, intel_encoder);
intel_encoder-type = INTEL_OUTPUT_LVDS;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 35/76] drm/i915/crt: implement get_hw_state
Note that even though this connector is cloneable we still can use the
exact same test to check whether the connector is on or whether the
encoder is enabled - both the dpms code and the encoder disable/enable
frob the exact same hw state.
For dvo/sdvo outputs, this will be different.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_crt.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 8b95cef..10704d5 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -61,6 +61,27 @@ static struct intel_crt *intel_encoder_to_crt(struct
intel_encoder *encoder)
return container_of(encoder, struct intel_crt, base);
}
+static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_crt *crt = intel_encoder_to_crt(encoder);
+ u32 tmp;
+
+ tmp = I915_READ(crt-adpa_reg);
+
+ if (!(tmp ADPA_DAC_ENABLE))
+ return false;
+
+ if (HAS_PCH_CPT(dev))
+ *pipe = PORT_TO_PIPE_CPT(tmp);
+ else
+ *pipe = PORT_TO_PIPE(tmp);
+
+ return true;
+}
+
static void intel_disable_crt(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = encoder-base.dev-dev_private;
@@ -712,6 +733,8 @@ void intel_crt_init(struct drm_device *dev)
crt-base.disable = intel_disable_crt;
crt-base.enable = intel_enable_crt;
+ crt-base.get_hw_state = intel_crt_get_hw_state;
+ intel_connector-get_hw_state = intel_connector_get_hw_state;
drm_encoder_helper_add(crt-base.base, crt_encoder_funcs);
drm_connector_helper_add(connector, intel_crt_connector_helper_funcs);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 36/76] drm/i915/sdvo: implement get_hw_state
SDVO is the first real special case - we support multiple outputs on
the same encoder and the encoder dpms state isn't the same as when
just disabling the outputs when the encoder is cloned.
Hence we need a real connector get_hw_state function which inquires
the sdvo encoder about its active outputs.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_sdvo.c | 46 +
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 48504de..96501bd 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -625,6 +625,14 @@ static bool intel_sdvo_set_active_outputs(struct
intel_sdvo *intel_sdvo,
outputs, sizeof(outputs));
}
+static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
+ u16 *outputs)
+{
+ return intel_sdvo_get_value(intel_sdvo,
+ SDVO_CMD_GET_ACTIVE_OUTPUTS,
+ outputs, sizeof(*outputs));
+}
+
static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
int mode)
{
@@ -1139,6 +1147,42 @@ static void intel_sdvo_mode_set(struct drm_encoder
*encoder,
intel_sdvo_write_sdvox(intel_sdvo, sdvox);
}
+static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector)
+{
+ struct intel_sdvo_connector *intel_sdvo_connector =
+ to_intel_sdvo_connector(connector-base);
+ struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector-base);
+ u16 active_outputs;
+
+ intel_sdvo_get_active_outputs(intel_sdvo, active_outputs);
+
+ if (active_outputs intel_sdvo_connector-output_flag)
+ return true;
+ else
+ return false;
+}
+
+static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct drm_device *dev = encoder-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ u32 tmp;
+
+ tmp = I915_READ(intel_sdvo-sdvo_reg);
+
+ if (!(tmp SDVO_ENABLE))
+ return false;
+
+ if (HAS_PCH_CPT(dev))
+ *pipe = PORT_TO_PIPE_CPT(tmp);
+ else
+ *pipe = PORT_TO_PIPE(tmp);
+
+ return true;
+}
+
static void intel_disable_sdvo(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = encoder-base.dev-dev_private;
@@ -2063,6 +2107,7 @@ intel_sdvo_connector_init(struct intel_sdvo_connector
*connector,
connector-base.base.interlace_allowed = 1;
connector-base.base.doublescan_allowed = 0;
connector-base.base.display_info.subpixel_order =
SubPixelHorizontalRGB;
+ connector-base.get_hw_state = intel_sdvo_connector_get_hw_state;
intel_connector_attach_encoder(connector-base, encoder-base);
drm_sysfs_connector_add(connector-base.base);
@@ -2616,6 +2661,7 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t
sdvo_reg, bool is_sdvob)
intel_encoder-disable = intel_disable_sdvo;
intel_encoder-enable = intel_enable_sdvo;
+ intel_encoder-get_hw_state = intel_sdvo_get_hw_state;
/* In default case sdvo lvds is false */
if (!intel_sdvo_get_capabilities(intel_sdvo, intel_sdvo-caps))
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 37/76] drm/i915/dvo: implement get_hw_state
Similar to the sdvo code we poke the dvo encoder whether the output is
active. Safe that dvo encoders are not standardized, so this requires
a new callback into the dvo chip driver.
Hence implement that for all 6 dvo drivers.
v2: With the newly added ns2501 we now have 6 dvo drivers instead of
just 5 ...
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/dvo.h|6 ++
drivers/gpu/drm/i915/dvo_ch7017.c | 13 +
drivers/gpu/drm/i915/dvo_ch7xxx.c | 13 +
drivers/gpu/drm/i915/dvo_ivch.c | 15 +++
drivers/gpu/drm/i915/dvo_ns2501.c | 15 +++
drivers/gpu/drm/i915/dvo_sil164.c | 16
drivers/gpu/drm/i915/dvo_tfp410.c | 14 ++
drivers/gpu/drm/i915/intel_dvo.c | 27 +++
8 files changed, 119 insertions(+)
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index 0fa839e..74b5efc 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -114,6 +114,12 @@ struct intel_dvo_dev_ops {
*/
enum drm_connector_status (*detect)(struct intel_dvo_device *dvo);
+ /*
+* Probe the current hw status, returning true if the connected output
+* is active.
+*/
+ bool (*get_hw_state)(struct intel_dvo_device *dev);
+
/**
* Query the device for the modes it provides.
*
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c
b/drivers/gpu/drm/i915/dvo_ch7017.c
index 71e7650..86b27d1 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -359,6 +359,18 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, bool
enable)
msleep(20);
}
+static bool ch7017_get_hw_state(struct intel_dvo_device *dvo)
+{
+ uint8_t val;
+
+ ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, val);
+
+ if (val CH7017_LVDS_POWER_DOWN_EN)
+ return false;
+ else
+ return true;
+}
+
static void ch7017_dump_regs(struct intel_dvo_device *dvo)
{
uint8_t val;
@@ -396,6 +408,7 @@ struct intel_dvo_dev_ops ch7017_ops = {
.mode_valid = ch7017_mode_valid,
.mode_set = ch7017_mode_set,
.dpms = ch7017_dpms,
+ .get_hw_state = ch7017_get_hw_state,
.dump_regs = ch7017_dump_regs,
.destroy = ch7017_destroy,
};
diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c
b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index c1dea5b..38f3a6c 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -297,6 +297,18 @@ static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool
enable)
ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD);
}
+static bool ch7xxx_get_hw_state(struct intel_dvo_device *dvo)
+{
+ u8 val;
+
+ ch7xxx_readb(dvo, CH7xxx_PM, val);
+
+ if (val CH7xxx_PM_FPD)
+ return false;
+ else
+ return true;
+}
+
static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
{
int i;
@@ -326,6 +338,7 @@ struct intel_dvo_dev_ops ch7xxx_ops = {
.mode_valid = ch7xxx_mode_valid,
.mode_set = ch7xxx_mode_set,
.dpms = ch7xxx_dpms,
+ .get_hw_state = ch7xxx_get_hw_state,
.dump_regs = ch7xxx_dump_regs,
.destroy = ch7xxx_destroy,
};
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index fa8ff6b..baaf65b 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -323,6 +323,20 @@ static void ivch_dpms(struct intel_dvo_device *dvo, bool
enable)
udelay(16 * 1000);
}
+static bool ivch_get_hw_state(struct intel_dvo_device *dvo)
+{
+ uint16_t vr01;
+
+ /* Set the new power state of the panel. */
+ if (!ivch_read(dvo, VR01, vr01))
+ return false;
+
+ if (vr01 VR01_LCD_ENABLE)
+ return true;
+ else
+ return false;
+}
+
static void ivch_mode_set(struct intel_dvo_device *dvo,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
@@ -413,6 +427,7 @@ static void ivch_destroy(struct intel_dvo_device *dvo)
struct intel_dvo_dev_ops ivch_ops = {
.init = ivch_init,
.dpms = ivch_dpms,
+ .get_hw_state = ivch_get_hw_state,
.mode_valid = ivch_mode_valid,
.mode_set = ivch_mode_set,
.detect = ivch_detect,
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c
b/drivers/gpu/drm/i915/dvo_ns2501.c
index c4d9f2f..c4a255b 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -493,6 +493,20 @@ static void ns2501_mode_set(struct intel_dvo_device *dvo,
}
/* set the NS2501 power state */
+static bool ns2501_get_hw_state(struct intel_dvo_device *dvo)
+{
+ unsigned char ch;
+
+ if (!ns2501_readb(dvo, NS2501_REG8, ch))
+ return false;
+
+ if (ch NS2501_8_PD)
+
[Intel-gfx] [PATCH 38/76] drm/i915: read out the modeset hw state at load and resume time
... instead of resetting a few things and hoping that this will work
out.
To properly disable the output pipelines at the initial modeset after
resume or boot up we need to have an accurate picture of which outputs
are enabled and connected to which crtcs. Otherwise we risk disabling
things at the wrong time, which can lead to hangs (or at least royally
confused panels), both requiring a walk to the reset button to fix.
Hence read out the hw state with the freshly introduce get_hw_state
functions and then sanitize it afterwards.
For a full modeset readout (which would allow us to avoid the initial
modeset at boot up) a few things are still missing:
- Reading out the mode from the pipe, especially the dotclock
computation is quite some fun.
- Reading out the parameters for the stolen memory framebuffer and
wrapping it up.
- Reading out the pch pll connections - luckily the disable code
simply bails out if the crtc doesn't have a pch pll attached (even
for configurations that would need one).
This patch here turned up tons of smelly stuff around resume: We
restore tons of register in seemingly random way (well, not quite, but
we're not too careful either), which leaves the hw in a rather
ill-defined state: E.g. the port registers are sometimes
unconditionally restore (lvds, crt), leaving us with an active
encoder/connector but no active pipe connected to it. Luckily the hw
state sanitizer detects this madness and fixes things up a bit.
v2: When checking whether an encoder with active connectors has a crtc
wire up to it, check for both the crtc _and_ it's active state.
v3:
- Extract intel_sanitize_encoder.
- Manually disable active encoders without an active pipe.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.c |1 +
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/intel_display.c | 276 ++
3 files changed, 212 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ff569cc..04149e0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -514,6 +514,7 @@ static int i915_drm_thaw(struct drm_device *dev)
mutex_unlock(dev-struct_mutex);
intel_modeset_init_hw(dev);
+ intel_modeset_setup_hw_state(dev);
drm_mode_config_reset(dev);
drm_irq_install(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c81c6e8..e926498 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1502,6 +1502,7 @@ extern void intel_modeset_init(struct drm_device *dev);
extern void intel_modeset_gem_init(struct drm_device *dev);
extern void intel_modeset_cleanup(struct drm_device *dev);
extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
+extern void intel_modeset_setup_hw_state(struct drm_device *dev);
extern bool intel_fbc_enabled(struct drm_device *dev);
extern void intel_disable_fbc(struct drm_device *dev);
extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index c741062..e453c3a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3588,7 +3588,7 @@ void intel_connector_dpms(struct drm_connector
*connector, int mode)
* of the connector. */
bool intel_connector_get_hw_state(struct intel_connector *connector)
{
- enum pipe pipe;
+ enum pipe pipe = 0;
struct intel_encoder *encoder = connector-encoder;
return encoder-get_hw_state(encoder, pipe);
@@ -6460,65 +6460,6 @@ free_work:
return ret;
}
-static void intel_sanitize_modesetting(struct drm_device *dev,
- int pipe, int plane)
-{
- struct drm_i915_private *dev_priv = dev-dev_private;
- u32 reg, val;
- int i;
-
- /* Clear any frame start delays used for debugging left by the BIOS */
- for_each_pipe(i) {
- reg = PIPECONF(i);
- I915_WRITE(reg, I915_READ(reg)
~PIPECONF_FRAME_START_DELAY_MASK);
- }
-
- if (HAS_PCH_SPLIT(dev))
- return;
-
- /* Who knows what state these registers were left in by the BIOS or
-* grub?
-*
-* If we leave the registers in a conflicting state (e.g. with the
-* display plane reading from the other pipe than the one we intend
-* to use) then when we attempt to teardown the active mode, we will
-* not disable the pipes and planes in the correct order -- leaving
-* a plane reading from a disabled pipe and possibly leading to
-* undefined behaviour.
-*/
-
- reg = DSPCNTR(plane);
- val = I915_READ(reg);
-
- if ((val DISPLAY_PLANE_ENABLE) == 0)
- return;
- if (!!(val
[Intel-gfx] [PATCH 39/76] drm/i915: check connector hw/sw state
Atm we can only check the connector state after a dpms call - while
doing modeset with the copypasted crtc helper code things are too
ill-defined for proper checking. But the idea is very much to call
this check from the modeset code, too.
v2: Fix dpms check and don't presume that if the hw isn't on that it
must not be linked up with an encoder (it could simply be switched off
with the dpms state).
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_crt.c |2 ++
drivers/gpu/drm/i915/intel_display.c | 37 ++
drivers/gpu/drm/i915/intel_dp.c |2 ++
drivers/gpu/drm/i915/intel_drv.h |1 +
drivers/gpu/drm/i915/intel_dvo.c |2 ++
drivers/gpu/drm/i915/intel_sdvo.c|2 ++
6 files changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 10704d5..c3c39a1 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -176,6 +176,8 @@ static void intel_crt_dpms(struct drm_connector *connector,
int mode)
intel_crtc_update_dpms(crtc);
}
+
+ intel_connector_check_state(to_intel_connector(connector));
}
static int intel_crt_mode_valid(struct drm_connector *connector,
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index e453c3a..b3c4151 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3561,6 +3561,41 @@ void intel_encoder_dpms(struct intel_encoder *encoder,
int mode)
}
}
+/* Cross check the actual hw state with our own modeset state tracking (and
it's
+ * internal consistency). */
+void intel_connector_check_state(struct intel_connector *connector)
+{
+ if (connector-get_hw_state(connector)) {
+ struct intel_encoder *encoder = connector-encoder;
+ struct drm_crtc *crtc;
+ bool encoder_enabled;
+ enum pipe pipe;
+
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s]\n,
+ connector-base.base.id,
+ drm_get_connector_name(connector-base));
+
+ WARN(connector-base.dpms == DRM_MODE_DPMS_OFF,
+wrong connector dpms state\n);
+ WARN(connector-base.encoder != encoder-base,
+active connector not linked to encoder\n);
+ WARN(!encoder-connectors_active,
+encoder-connectors_active not set\n);
+
+ encoder_enabled = encoder-get_hw_state(encoder, pipe);
+ WARN(!encoder_enabled, encoder not enabled\n);
+ if (WARN_ON(!encoder-base.crtc))
+ return;
+
+ crtc = encoder-base.crtc;
+
+ WARN(!crtc-enabled, crtc not enabled\n);
+ WARN(!to_intel_crtc(crtc)-active, crtc not active\n);
+ WARN(pipe != to_intel_crtc(crtc)-pipe,
+encoder active on the wrong pipe\n);
+ }
+}
+
/* Even simpler default implementation, if there's really no special case to
* consider. */
void intel_connector_dpms(struct drm_connector *connector, int mode)
@@ -3581,6 +3616,8 @@ void intel_connector_dpms(struct drm_connector
*connector, int mode)
intel_encoder_dpms(encoder, mode);
else
encoder-connectors_active = false;
+
+ intel_connector_check_state(to_intel_connector(connector));
}
/* Simple connector-get_hw_state implementation for encoders that support only
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b201c7e..aff262e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1365,6 +1365,8 @@ intel_dp_dpms(struct drm_connector *connector, int mode)
intel_encoder_dpms(intel_dp-base, mode);
WARN_ON(intel_dp-dpms_mode != DRM_MODE_DPMS_ON);
}
+
+ intel_connector_check_state(to_intel_connector(connector));
}
/*
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index af7865e..220be82 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -434,6 +434,7 @@ extern void intel_encoder_destroy(struct drm_encoder
*encoder);
extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
extern void intel_connector_dpms(struct drm_connector *, int mode);
extern bool intel_connector_get_hw_state(struct intel_connector *connector);
+extern void intel_connector_check_state(struct intel_connector *);
static inline struct intel_encoder *intel_attached_encoder(struct
drm_connector *connector)
{
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index e9397b7..17dc8be 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -188,6 +188,8 @@ static void intel_dvo_dpms(struct drm_connector *connector,
int
[Intel-gfx] [PATCH 40/76] drm/i915: rip out intel_crtc-dpms_mode
Afaict this has been used for two things:
- To prevent the crtc enable code from being run twice. We have now
intel_crtc-active to track this in a more precise way.
- To ensure the code copes correctly with the unknown hw state after
boot and resume. Thanks to the hw state readout and sanitize code we
have now a better way to handle this.
The only thing it still does is complicate our modeset state space.
Having outlived its usefullness, let it just die.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 17 -
drivers/gpu/drm/i915/intel_drv.h |1 -
2 files changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b3c4151..4375e6d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3469,18 +3469,10 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc)
struct intel_encoder *intel_encoder;
int pipe = intel_crtc-pipe;
bool enabled, enable = false;
- int mode;
for_each_encoder_on_crtc(dev, crtc, intel_encoder)
enable |= intel_encoder-connectors_active;
- mode = enable ? DRM_MODE_DPMS_ON : DRM_MODE_DPMS_OFF;
-
- if (intel_crtc-dpms_mode == mode)
- return;
-
- intel_crtc-dpms_mode = mode;
-
if (enable)
dev_priv-display.crtc_enable(crtc);
else
@@ -5047,11 +5039,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
x, y, old_fb);
drm_vblank_post_modeset(dev, pipe);
- if (ret)
- intel_crtc-dpms_mode = DRM_MODE_DPMS_OFF;
- else
- intel_crtc-dpms_mode = DRM_MODE_DPMS_ON;
-
return ret;
}
@@ -7565,10 +7552,6 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
struct drm_i915_private *dev_priv = dev-dev_private;
u32 reg, val;
- /* Clear the dpms state for compatibility with code still using that
-* deprecated state variable. */
- crtc-dpms_mode = -1;
-
/* Clear any frame start delays used for debugging left by the BIOS */
reg = PIPECONF(crtc-pipe);
I915_WRITE(reg, I915_READ(reg) ~PIPECONF_FRAME_START_DELAY_MASK);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 220be82..63c643a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -163,7 +163,6 @@ struct intel_crtc {
enum pipe pipe;
enum plane plane;
u8 lut_r[256], lut_g[256], lut_b[256];
- int dpms_mode;
/*
* Whether the crtc and the connected output pipeline is active. Implies
* that crtc-enabled is set, i.e. the current mode configuration has
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 41/76] drm/i915: rip out intel_dp-dpms_mode
We now track the connector state in encoder-connectors_active, and
because the DP output can't be cloned, that is sufficient to track the
link state. Hence use this instead of adding yet another modeset state
variable with dubious semantics at driver load and resume time.
Also, connectors_active should only ever be set when the encoder is
linked to a crtc, hence convert that crtc test into a WARN.
v2: Rebase on top of struct intel_dp moving.
v3: The rebase accidentally killed the newly-introduced intel_dp-port
Noticed by Paulo Zanoni.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dp.c | 11 ++-
drivers/gpu/drm/i915/intel_drv.h |1 -
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index aff262e..26fdeeb 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1307,8 +1307,6 @@ static void intel_disable_dp(struct intel_encoder
*encoder)
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
intel_dp_link_down(intel_dp);
ironlake_edp_panel_vdd_off(intel_dp, false);
-
- intel_dp-dpms_mode = DRM_MODE_DPMS_OFF;
}
static void intel_enable_dp(struct intel_encoder *encoder)
@@ -1328,8 +1326,6 @@ static void intel_enable_dp(struct intel_encoder *encoder)
} else
ironlake_edp_panel_vdd_off(intel_dp, false);
ironlake_edp_backlight_on(intel_dp);
-
- intel_dp-dpms_mode = DRM_MODE_DPMS_ON;
}
static void
@@ -1354,7 +1350,6 @@ intel_dp_dpms(struct drm_connector *connector, int mode)
if (mode != DRM_MODE_DPMS_ON) {
intel_encoder_dpms(intel_dp-base, mode);
- WARN_ON(intel_dp-dpms_mode != DRM_MODE_DPMS_OFF);
if (is_cpu_edp(intel_dp))
ironlake_edp_pll_off(intel_dp-base.base);
@@ -1363,7 +1358,6 @@ intel_dp_dpms(struct drm_connector *connector, int mode)
ironlake_edp_pll_on(intel_dp-base.base);
intel_encoder_dpms(intel_dp-base, mode);
- WARN_ON(intel_dp-dpms_mode != DRM_MODE_DPMS_ON);
}
intel_connector_check_state(to_intel_connector(connector));
@@ -2067,10 +2061,10 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
u8 sink_irq_vector;
u8 link_status[DP_LINK_STATUS_SIZE];
- if (intel_dp-dpms_mode != DRM_MODE_DPMS_ON)
+ if (!intel_dp-base.connectors_active)
return;
- if (!intel_dp-base.base.crtc)
+ if (WARN_ON(!intel_dp-base.base.crtc))
return;
/* Try to read receiver status if the link appears to be up */
@@ -2488,7 +2482,6 @@ intel_dp_init(struct drm_device *dev, int output_reg,
enum port port)
intel_dp-output_reg = output_reg;
intel_dp-port = port;
- intel_dp-dpms_mode = -1;
intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
if (!intel_connector) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 63c643a..504048d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -323,7 +323,6 @@ struct intel_dp {
enum hdmi_force_audio force_audio;
enum port port;
uint32_t color_range;
- int dpms_mode;
uint8_t link_bw;
uint8_t lane_count;
uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 42/76] drm/i915: ensure the force pipe A quirk is actually followed
Many BIOSen forget to turn on the pipe A after resume (because they
actually don't turn on anything), so we have to do that ourselves when
sanitizing the hw state.
I've discovered this due to the recent addition of a pipe WARN that
takes the force quirk into account.
v2: Actually try to enable the pipe with a proper configuration instead
of simpyl switching it on with whatever random state the bios left it
in after resume.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 4375e6d..9f3a153 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7546,6 +7546,35 @@ intel_connector_break_all_links(struct intel_connector
*connector)
connector-encoder-base.crtc = NULL;
}
+static void intel_enable_pipe_a(struct drm_device *dev)
+{
+ struct intel_connector *connector;
+ struct drm_connector *crt = NULL;
+ struct intel_load_detect_pipe load_detect_temp;
+
+ /* We can't just switch on the pipe A, we need to set things up with a
+* proper mode and output configuration. As a gross hack, enable pipe A
+* by enabling the load detect pipe once. */
+ list_for_each_entry(connector,
+ dev-mode_config.connector_list,
+ base.head) {
+ if (connector-encoder-type == INTEL_OUTPUT_ANALOG) {
+ crt = connector-base;
+ break;
+ }
+ }
+
+ if (!crt)
+ return;
+
+ if (intel_get_load_detect_pipe(intel_attached_encoder(crt),
+ crt, NULL, load_detect_temp))
+ intel_release_load_detect_pipe(intel_attached_encoder(crt),
+ crt, load_detect_temp);
+
+
+}
+
static void intel_sanitize_crtc(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc-base.dev;
@@ -7592,6 +7621,15 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
}
ok:
+ if (dev_priv-quirks QUIRK_PIPEA_FORCE
+ crtc-pipe == PIPE_A !crtc-active) {
+ /* BIOS forgot to enable pipe A, this mostly happens after
+* resume. Force-enable the pipe to fix this, the update_dpms
+* call below we restore the pipe to the right state, but leave
+* the required bits on. */
+ intel_enable_pipe_a(dev);
+ }
+
/* Adjust the state of the output pipe according to whether we
* have active connectors/encoders. */
intel_crtc_update_dpms(crtc-base);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 43/76] drm/i915: introduce struct intel_set_config
intel_crtc_set_config is an unwidly beast and is in serious need of
some function extraction. To facilitate that, introduce a struct to
keep track of all the state involved. Atm it doesn't do much more than
keep track of all the allocated memory.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 73 +++---
drivers/gpu/drm/i915/intel_drv.h |6 +++
2 files changed, 47 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9f3a153..c5c3078 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6650,17 +6650,28 @@ done:
return ret;
}
+static void intel_set_config_free(struct intel_set_config *config)
+{
+ if (config) {
+ kfree(config-save_connectors);
+ kfree(config-save_encoders);
+ kfree(config-save_crtcs);
+ }
+ kfree(config);
+}
+
static int intel_crtc_set_config(struct drm_mode_set *set)
{
struct drm_device *dev;
- struct drm_crtc *save_crtcs, *new_crtc, *crtc;
- struct drm_encoder *save_encoders, *new_encoder, *encoder;
+ struct drm_crtc *new_crtc, *crtc;
+ struct drm_encoder *new_encoder, *encoder;
struct drm_framebuffer *old_fb = NULL;
bool mode_changed = false; /* if true do a full mode set */
bool fb_changed = false; /* if true and !mode_changed just do a flip */
- struct drm_connector *save_connectors, *connector;
+ struct drm_connector *connector;
int count = 0, ro;
struct drm_mode_set save_set;
+ struct intel_set_config *config;
int ret;
int i;
@@ -6689,27 +6700,27 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
dev = set-crtc-dev;
+ ret = -ENOMEM;
+ config = kzalloc(sizeof(*config), GFP_KERNEL);
+ if (!config)
+ goto out_config;
+
/* Allocate space for the backup of all (non-pointer) crtc, encoder and
* connector data. */
- save_crtcs = kzalloc(dev-mode_config.num_crtc *
-sizeof(struct drm_crtc), GFP_KERNEL);
- if (!save_crtcs)
- return -ENOMEM;
+ config-save_crtcs = kzalloc(dev-mode_config.num_crtc *
+sizeof(struct drm_crtc), GFP_KERNEL);
+ if (!config-save_crtcs)
+ goto out_config;
- save_encoders = kzalloc(dev-mode_config.num_encoder *
- sizeof(struct drm_encoder), GFP_KERNEL);
- if (!save_encoders) {
- kfree(save_crtcs);
- return -ENOMEM;
- }
+ config-save_encoders = kzalloc(dev-mode_config.num_encoder *
+ sizeof(struct drm_encoder), GFP_KERNEL);
+ if (!config-save_encoders)
+ goto out_config;
- save_connectors = kzalloc(dev-mode_config.num_connector *
- sizeof(struct drm_connector), GFP_KERNEL);
- if (!save_connectors) {
- kfree(save_crtcs);
- kfree(save_encoders);
- return -ENOMEM;
- }
+ config-save_connectors = kzalloc(dev-mode_config.num_connector *
+ sizeof(struct drm_connector),
GFP_KERNEL);
+ if (!config-save_connectors)
+ goto out_config;
/* Copy data. Note that driver private data is not affected.
* Should anything bad happen only the expected state is
@@ -6717,17 +6728,17 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
*/
count = 0;
list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
- save_crtcs[count++] = *crtc;
+ config-save_crtcs[count++] = *crtc;
}
count = 0;
list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
- save_encoders[count++] = *encoder;
+ config-save_encoders[count++] = *encoder;
}
count = 0;
list_for_each_entry(connector, dev-mode_config.connector_list, head) {
- save_connectors[count++] = *connector;
+ config-save_connectors[count++] = *connector;
}
save_set.crtc = set-crtc;
@@ -6863,26 +6874,25 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
}
}
- kfree(save_connectors);
- kfree(save_encoders);
- kfree(save_crtcs);
+ intel_set_config_free(config);
+
return 0;
fail:
/* Restore all previous data. */
count = 0;
list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
- *crtc = save_crtcs[count++];
+ *crtc = config-save_crtcs[count++];
}
count = 0;
list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
-
[Intel-gfx] [PATCH 44/76] drm/i915: extract modeset config save/restore code
At the end this won't be of much use to us, but meanwhile just extract
it to get a better overview of what exactly set_config does.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 127 --
1 file changed, 76 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index c5c3078..2e5edc7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6660,11 +6660,82 @@ static void intel_set_config_free(struct
intel_set_config *config)
kfree(config);
}
+static int intel_set_config_save_state(struct drm_device *dev,
+ struct intel_set_config *config)
+{
+ struct drm_crtc *crtc;
+ struct drm_encoder *encoder;
+ struct drm_connector *connector;
+ int count;
+
+ /* Allocate space for the backup of all (non-pointer) crtc, encoder and
+* connector data. */
+ config-save_crtcs = kzalloc(dev-mode_config.num_crtc *
+sizeof(struct drm_crtc), GFP_KERNEL);
+ if (!config-save_crtcs)
+ return -ENOMEM;
+
+ config-save_encoders = kzalloc(dev-mode_config.num_encoder *
+ sizeof(struct drm_encoder), GFP_KERNEL);
+ if (!config-save_encoders)
+ return -ENOMEM;
+
+ config-save_connectors = kzalloc(dev-mode_config.num_connector *
+ sizeof(struct drm_connector),
GFP_KERNEL);
+ if (!config-save_connectors)
+ return -ENOMEM;
+
+ /* Copy data. Note that driver private data is not affected.
+* Should anything bad happen only the expected state is
+* restored, not the drivers personal bookkeeping.
+*/
+ count = 0;
+ list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
+ config-save_crtcs[count++] = *crtc;
+ }
+
+ count = 0;
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+ config-save_encoders[count++] = *encoder;
+ }
+
+ count = 0;
+ list_for_each_entry(connector, dev-mode_config.connector_list, head) {
+ config-save_connectors[count++] = *connector;
+ }
+
+ return 0;
+}
+
+static void intel_set_config_restore_state(struct drm_device *dev,
+ struct intel_set_config *config)
+{
+ struct drm_crtc *crtc;
+ struct drm_encoder *encoder;
+ struct drm_connector *connector;
+ int count;
+
+ count = 0;
+ list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
+ *crtc = config-save_crtcs[count++];
+ }
+
+ count = 0;
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+ *encoder = config-save_encoders[count++];
+ }
+
+ count = 0;
+ list_for_each_entry(connector, dev-mode_config.connector_list, head) {
+ *connector = config-save_connectors[count++];
+ }
+}
+
static int intel_crtc_set_config(struct drm_mode_set *set)
{
struct drm_device *dev;
- struct drm_crtc *new_crtc, *crtc;
- struct drm_encoder *new_encoder, *encoder;
+ struct drm_crtc *new_crtc;
+ struct drm_encoder *new_encoder;
struct drm_framebuffer *old_fb = NULL;
bool mode_changed = false; /* if true do a full mode set */
bool fb_changed = false; /* if true and !mode_changed just do a flip */
@@ -6705,42 +6776,10 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
if (!config)
goto out_config;
- /* Allocate space for the backup of all (non-pointer) crtc, encoder and
-* connector data. */
- config-save_crtcs = kzalloc(dev-mode_config.num_crtc *
-sizeof(struct drm_crtc), GFP_KERNEL);
- if (!config-save_crtcs)
- goto out_config;
-
- config-save_encoders = kzalloc(dev-mode_config.num_encoder *
- sizeof(struct drm_encoder), GFP_KERNEL);
- if (!config-save_encoders)
- goto out_config;
-
- config-save_connectors = kzalloc(dev-mode_config.num_connector *
- sizeof(struct drm_connector),
GFP_KERNEL);
- if (!config-save_connectors)
+ ret = intel_set_config_save_state(dev, config);
+ if (ret)
goto out_config;
- /* Copy data. Note that driver private data is not affected.
-* Should anything bad happen only the expected state is
-* restored, not the drivers personal bookkeeping.
-*/
- count = 0;
- list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
- config-save_crtcs[count++] = *crtc;
- }
-
- count = 0;
-
[Intel-gfx] [PATCH 45/76] drm/i915: extract intel_set_config_compute_mode_changes
This computes what exactly changed in the modeset configuration, i.e.
whether a full modeset is required or only an update of the
framebuffer base address or no change at all.
In the future we might add more checks for e.g. when only the output
mode changed, so that we could do a minimal modeset for outputs that
support this. Like the lvds/eDP panels where we only need to update
the panel fitter.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 81 +++---
drivers/gpu/drm/i915/intel_drv.h |3 ++
2 files changed, 48 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2e5edc7..b109710 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6731,14 +6731,46 @@ static void intel_set_config_restore_state(struct
drm_device *dev,
}
}
+static void
+intel_set_config_compute_mode_changes(struct drm_mode_set *set,
+ struct intel_set_config *config)
+{
+
+ /* We should be able to check here if the fb has the same properties
+* and then just flip_or_move it */
+ if (set-crtc-fb != set-fb) {
+ /* If we have no fb then treat it as a full mode set */
+ if (set-crtc-fb == NULL) {
+ DRM_DEBUG_KMS(crtc has no fb, full mode set\n);
+ config-mode_changed = true;
+ } else if (set-fb == NULL) {
+ config-mode_changed = true;
+ } else if (set-fb-depth != set-crtc-fb-depth) {
+ config-mode_changed = true;
+ } else if (set-fb-bits_per_pixel !=
+ set-crtc-fb-bits_per_pixel) {
+ config-mode_changed = true;
+ } else
+ config-fb_changed = true;
+ }
+
+ if (set-x != set-crtc-x || set-y != set-crtc-y)
+ config-fb_changed = true;
+
+ if (set-mode !drm_mode_equal(set-mode, set-crtc-mode)) {
+ DRM_DEBUG_KMS(modes are different, full mode set\n);
+ drm_mode_debug_printmodeline(set-crtc-mode);
+ drm_mode_debug_printmodeline(set-mode);
+ config-mode_changed = true;
+ }
+}
+
static int intel_crtc_set_config(struct drm_mode_set *set)
{
struct drm_device *dev;
struct drm_crtc *new_crtc;
struct drm_encoder *new_encoder;
struct drm_framebuffer *old_fb = NULL;
- bool mode_changed = false; /* if true do a full mode set */
- bool fb_changed = false; /* if true and !mode_changed just do a flip */
struct drm_connector *connector;
int count = 0, ro;
struct drm_mode_set save_set;
@@ -6786,33 +6818,11 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
save_set.y = set-crtc-y;
save_set.fb = set-crtc-fb;
- /* We should be able to check here if the fb has the same properties
-* and then just flip_or_move it */
- if (set-crtc-fb != set-fb) {
- /* If we have no fb then treat it as a full mode set */
- if (set-crtc-fb == NULL) {
- DRM_DEBUG_KMS(crtc has no fb, full mode set\n);
- mode_changed = true;
- } else if (set-fb == NULL) {
- mode_changed = true;
- } else if (set-fb-depth != set-crtc-fb-depth) {
- mode_changed = true;
- } else if (set-fb-bits_per_pixel !=
- set-crtc-fb-bits_per_pixel) {
- mode_changed = true;
- } else
- fb_changed = true;
- }
-
- if (set-x != set-crtc-x || set-y != set-crtc-y)
- fb_changed = true;
-
- if (set-mode !drm_mode_equal(set-mode, set-crtc-mode)) {
- DRM_DEBUG_KMS(modes are different, full mode set\n);
- drm_mode_debug_printmodeline(set-crtc-mode);
- drm_mode_debug_printmodeline(set-mode);
- mode_changed = true;
- }
+ /* Compute whether we need a full modeset, only an fb base update or no
+* change at all. In the future we might also check whether only the
+* mode changed, e.g. for LVDS where we only change the panel fitter in
+* such cases. */
+ intel_set_config_compute_mode_changes(set, config);
/* a) traverse passed in connector list and get encoders for them */
count = 0;
@@ -6828,7 +6838,7 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
if (new_encoder != connector-encoder) {
DRM_DEBUG_KMS(encoder changed, full mode switch\n);
- mode_changed = true;
+ config-mode_changed = true;
/* If the encoder is reused
[Intel-gfx] [PATCH 46/76] drm/i915: extract intel_set_config_update_output_state
Note that this function already clobbers the mode config state,
so we have to clean things up if something fails.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 121 +++---
1 file changed, 67 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b109710..d11d866 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6765,64 +6765,15 @@ intel_set_config_compute_mode_changes(struct
drm_mode_set *set,
}
}
-static int intel_crtc_set_config(struct drm_mode_set *set)
+static int
+intel_set_config_update_output_state(struct drm_device *dev,
+struct drm_mode_set *set,
+struct intel_set_config *config)
{
- struct drm_device *dev;
struct drm_crtc *new_crtc;
struct drm_encoder *new_encoder;
- struct drm_framebuffer *old_fb = NULL;
struct drm_connector *connector;
- int count = 0, ro;
- struct drm_mode_set save_set;
- struct intel_set_config *config;
- int ret;
- int i;
-
- DRM_DEBUG_KMS(\n);
-
- if (!set)
- return -EINVAL;
-
- if (!set-crtc)
- return -EINVAL;
-
- if (!set-crtc-helper_private)
- return -EINVAL;
-
- if (!set-mode)
- set-fb = NULL;
-
- if (set-fb) {
- DRM_DEBUG_KMS([CRTC:%d] [FB:%d] #connectors=%d (x y) (%i
%i)\n,
- set-crtc-base.id, set-fb-base.id,
- (int)set-num_connectors, set-x, set-y);
- } else {
- DRM_DEBUG_KMS([CRTC:%d] [NOFB]\n, set-crtc-base.id);
- return intel_crtc_helper_disable(set-crtc);
- }
-
- dev = set-crtc-dev;
-
- ret = -ENOMEM;
- config = kzalloc(sizeof(*config), GFP_KERNEL);
- if (!config)
- goto out_config;
-
- ret = intel_set_config_save_state(dev, config);
- if (ret)
- goto out_config;
-
- save_set.crtc = set-crtc;
- save_set.mode = set-crtc-mode;
- save_set.x = set-crtc-x;
- save_set.y = set-crtc-y;
- save_set.fb = set-crtc-fb;
-
- /* Compute whether we need a full modeset, only an fb base update or no
-* change at all. In the future we might also check whether only the
-* mode changed, e.g. for LVDS where we only change the panel fitter in
-* such cases. */
- intel_set_config_compute_mode_changes(set, config);
+ int count, ro;
/* a) traverse passed in connector list and get encoders for them */
count = 0;
@@ -6883,6 +6834,68 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
}
}
+ return 0;
+}
+
+static int intel_crtc_set_config(struct drm_mode_set *set)
+{
+ struct drm_device *dev;
+ struct drm_framebuffer *old_fb = NULL;
+ struct drm_mode_set save_set;
+ struct intel_set_config *config;
+ int ret;
+ int i;
+
+ DRM_DEBUG_KMS(\n);
+
+ if (!set)
+ return -EINVAL;
+
+ if (!set-crtc)
+ return -EINVAL;
+
+ if (!set-crtc-helper_private)
+ return -EINVAL;
+
+ if (!set-mode)
+ set-fb = NULL;
+
+ if (set-fb) {
+ DRM_DEBUG_KMS([CRTC:%d] [FB:%d] #connectors=%d (x y) (%i
%i)\n,
+ set-crtc-base.id, set-fb-base.id,
+ (int)set-num_connectors, set-x, set-y);
+ } else {
+ DRM_DEBUG_KMS([CRTC:%d] [NOFB]\n, set-crtc-base.id);
+ return intel_crtc_helper_disable(set-crtc);
+ }
+
+ dev = set-crtc-dev;
+
+ ret = -ENOMEM;
+ config = kzalloc(sizeof(*config), GFP_KERNEL);
+ if (!config)
+ goto out_config;
+
+ ret = intel_set_config_save_state(dev, config);
+ if (ret)
+ goto out_config;
+
+ save_set.crtc = set-crtc;
+ save_set.mode = set-crtc-mode;
+ save_set.x = set-crtc-x;
+ save_set.y = set-crtc-y;
+ save_set.fb = set-crtc-fb;
+
+ /* Compute whether we need a full modeset, only an fb base update or no
+* change at all. In the future we might also check whether only the
+* mode changed, e.g. for LVDS where we only change the panel fitter in
+* such cases. */
+ intel_set_config_compute_mode_changes(set, config);
+
+ ret = intel_set_config_update_output_state(dev, set, config);
+ if (ret)
+ goto fail;
+
if (config-mode_changed) {
set-crtc-enabled = drm_helper_crtc_in_use(set-crtc);
if (set-crtc-enabled) {
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
[Intel-gfx] [PATCH 47/76] drm/i915: implement crtc helper semantics relied upon by the fb helper
Yikes!
But yeah, we have to do this until someone volunteers to clean up the
fb helper and rid it of its incetious relationship with the crtc
helper code.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d11d866..c38d503 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6860,6 +6860,12 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
if (!set-mode)
set-fb = NULL;
+ /* The fb helper likes to play gross jokes with -mode_set_config.
+* Unfortunately the crtc helper doesn't do much at all for this case,
+* so we have to cope with this madness until the fb helper is fixed
up. */
+ if (set-fb set-num_connectors == 0)
+ return 0;
+
if (set-fb) {
DRM_DEBUG_KMS([CRTC:%d] [FB:%d] #connectors=%d (x y) (%i
%i)\n,
set-crtc-base.id, set-fb-base.id,
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 48/76] drm/i915: don't update the fb base if there is no fb
Otherwise we'll set_fb complains pretty loudly if we the crtc is off
and userspace moves the NULL fb around a bit. Yeah, this actually
happens in the wild ...
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index c38d503..79748c9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6754,7 +6754,7 @@ intel_set_config_compute_mode_changes(struct drm_mode_set
*set,
config-fb_changed = true;
}
- if (set-x != set-crtc-x || set-y != set-crtc-y)
+ if (set-fb (set-x != set-crtc-x || set-y != set-crtc-y))
config-fb_changed = true;
if (set-mode !drm_mode_equal(set-mode, set-crtc-mode)) {
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 49/76] drm/i915: convert pointless error checks in set_config to BUGs
Because they all are, the ioctl command never calls us with any of
these violated. Also drop a equally pointless empty debug message (and
also in set_cursor, while we're at it).
With all these changes, intel_crtc_set_config is neatly condensed down
to it's essence, the actual modeset code (or fb update calling code)
v2: The fb helper code is actually stretching -set_config semantics a bit,
it calls it with set-mode == NULL but set-fb != NULL.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 79748c9..b1a7633 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5391,8 +5391,6 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
uint32_t addr;
int ret;
- DRM_DEBUG_KMS(\n);
-
/* if we want to turn off the cursor ignore width and height */
if (!handle) {
DRM_DEBUG_KMS(cursor off\n);
@@ -6846,16 +6844,9 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
int ret;
int i;
- DRM_DEBUG_KMS(\n);
-
- if (!set)
- return -EINVAL;
-
- if (!set-crtc)
- return -EINVAL;
-
- if (!set-crtc-helper_private)
- return -EINVAL;
+ BUG_ON(!set);
+ BUG_ON(!set-crtc);
+ BUG_ON(!set-crtc-helper_private);
if (!set-mode)
set-fb = NULL;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 50/76] drm/i915: don't save all the encoder/crtc state in set_config
We actually only touch the connector - encoder and encoder - crtc
linking. So it's enough to just save/restore that.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 28 +++-
drivers/gpu/drm/i915/intel_drv.h |4 ++--
2 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b1a7633..3ee5af5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6651,8 +6651,8 @@ done:
static void intel_set_config_free(struct intel_set_config *config)
{
if (config) {
- kfree(config-save_connectors);
- kfree(config-save_encoders);
+ kfree(config-save_connector_encoders);
+ kfree(config-save_encoder_crtcs);
kfree(config-save_crtcs);
}
kfree(config);
@@ -6668,19 +6668,21 @@ static int intel_set_config_save_state(struct
drm_device *dev,
/* Allocate space for the backup of all (non-pointer) crtc, encoder and
* connector data. */
- config-save_crtcs = kzalloc(dev-mode_config.num_crtc *
+ config-save_crtcs = kcalloc(dev-mode_config.num_crtc,
sizeof(struct drm_crtc), GFP_KERNEL);
if (!config-save_crtcs)
return -ENOMEM;
- config-save_encoders = kzalloc(dev-mode_config.num_encoder *
- sizeof(struct drm_encoder), GFP_KERNEL);
- if (!config-save_encoders)
+ config-save_encoder_crtcs =
+ kcalloc(dev-mode_config.num_encoder,
+ sizeof(struct drm_crtc *), GFP_KERNEL);
+ if (!config-save_encoder_crtcs)
return -ENOMEM;
- config-save_connectors = kzalloc(dev-mode_config.num_connector *
- sizeof(struct drm_connector),
GFP_KERNEL);
- if (!config-save_connectors)
+ config-save_connector_encoders =
+ kcalloc(dev-mode_config.num_connector,
+ sizeof(struct drm_encoder *), GFP_KERNEL);
+ if (!config-save_connector_encoders)
return -ENOMEM;
/* Copy data. Note that driver private data is not affected.
@@ -6694,12 +6696,12 @@ static int intel_set_config_save_state(struct
drm_device *dev,
count = 0;
list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
- config-save_encoders[count++] = *encoder;
+ config-save_encoder_crtcs[count++] = encoder-crtc;
}
count = 0;
list_for_each_entry(connector, dev-mode_config.connector_list, head) {
- config-save_connectors[count++] = *connector;
+ config-save_connector_encoders[count++] = connector-encoder;
}
return 0;
@@ -6720,12 +6722,12 @@ static void intel_set_config_restore_state(struct
drm_device *dev,
count = 0;
list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
- *encoder = config-save_encoders[count++];
+ encoder-crtc = config-save_encoder_crtcs[count++];
}
count = 0;
list_for_each_entry(connector, dev-mode_config.connector_list, head) {
- *connector = config-save_connectors[count++];
+ connector-encoder = config-save_connector_encoders[count++];
}
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5f36119..826c7d4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -424,8 +424,8 @@ extern void intel_panel_destroy_backlight(struct drm_device
*dev);
extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
struct intel_set_config {
- struct drm_connector *save_connectors;
- struct drm_encoder *save_encoders;
+ struct drm_encoder **save_connector_encoders;
+ struct drm_crtc **save_encoder_crtcs;
struct drm_crtc *save_crtcs;
bool fb_changed;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 52/76] drm/i915: push crtc-fb update into pipe_set_base
Passing in the old fb, having overwritten the current fb, leads to
some neatly convoluted code. It's much simpler if we defer the
crtc-fb update to the place that updates the hw, in pipe_set_base.
This way we also don't need to restore anything in case something
fails - we only update crtc-fb once things have succeeded.
The real reason for this change is that now we keep the old fb
assigned to crtc-fb, which allows us to finally move the crtc disable
case into the common low-level set_mode function in the next patch.
Also don't clobber crtc-x and crtc-y, we neatly pass these down the
callchain already. Unfortunately we can't do the same with crtc-mode,
because that one is being used in the mode_set callbacks.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 84 ++
1 file changed, 34 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 23c0d0f..a691c76 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2200,16 +2200,17 @@ intel_finish_fb(struct drm_framebuffer *old_fb)
static int
intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- struct drm_framebuffer *old_fb)
+ struct drm_framebuffer *fb)
{
struct drm_device *dev = crtc-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
struct drm_i915_master_private *master_priv;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ struct drm_framebuffer *old_fb;
int ret;
/* no fb bound */
- if (!crtc-fb) {
+ if (!fb) {
DRM_ERROR(No FB bound\n);
return 0;
}
@@ -2223,7 +2224,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
mutex_lock(dev-struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev,
-to_intel_framebuffer(crtc-fb)-obj,
+to_intel_framebuffer(fb)-obj,
NULL);
if (ret != 0) {
mutex_unlock(dev-struct_mutex);
@@ -2231,17 +2232,20 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
return ret;
}
- if (old_fb)
- intel_finish_fb(old_fb);
+ if (crtc-fb)
+ intel_finish_fb(crtc-fb);
- ret = dev_priv-display.update_plane(crtc, crtc-fb, x, y);
+ ret = dev_priv-display.update_plane(crtc, fb, x, y);
if (ret) {
- intel_unpin_fb_obj(to_intel_framebuffer(crtc-fb)-obj);
+ intel_unpin_fb_obj(to_intel_framebuffer(fb)-obj);
mutex_unlock(dev-struct_mutex);
DRM_ERROR(failed to update base address\n);
return ret;
}
+ old_fb = crtc-fb;
+ crtc-fb = fb;
+
if (old_fb) {
intel_wait_for_vblank(dev, intel_crtc-pipe);
intel_unpin_fb_obj(to_intel_framebuffer(old_fb)-obj);
@@ -3776,6 +3780,7 @@ static inline bool intel_panel_use_ssc(struct
drm_i915_private *dev_priv)
* true if they don't match).
*/
static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
+struct drm_framebuffer *fb,
unsigned int *pipe_bpp,
struct drm_display_mode *mode)
{
@@ -3856,7 +3861,7 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc
*crtc,
* also stays within the max display bpc discovered above.
*/
- switch (crtc-fb-depth) {
+ switch (fb-depth) {
case 8:
bpc = 8; /* since we go through a colormap */
break;
@@ -4275,7 +4280,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode,
int x, int y,
- struct drm_framebuffer *old_fb)
+ struct drm_framebuffer *fb)
{
struct drm_device *dev = crtc-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
@@ -4465,7 +4470,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
I915_WRITE(DSPCNTR(plane), dspcntr);
POSTING_READ(DSPCNTR(plane));
- ret = intel_pipe_set_base(crtc, x, y, old_fb);
+ ret = intel_pipe_set_base(crtc, x, y, fb);
intel_update_watermarks(dev);
@@ -4623,7 +4628,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode,
int x, int y,
- struct drm_framebuffer *old_fb)
+ struct
[Intel-gfx] [PATCH 51/76] drm/i915: stage modeset output changes
This is the core of the new modeset logic.
The current code which is based upon the crtc helper code first
updates all the link of the new display pipeline and then calls the
lower-level set_mode function to execute the required callbacks to get
there. The issue with this approach is that for disabling we need to
know the _current_ display pipe state, not the new one.
Hence we need to stage the new state of the display pipe and only
update it once we have disabled the current configuration and before we
start to update the hw registers with the new configuration.
This patch here just prepares the ground by switching the new output
state computation to these staging pointers. To make it clearer,
rename the old update_output_state function to stage_output_state.
A few peculiarities:
- We're also calling the set_mode function at various places to update
properties. Hence after a successfule modeset we need to stage the
current configuration (for otherwise we might fall back again). This
happens automatically because as part of the (successful) modeset we
need to copy the staged state to the real one. But for the hw
readout code we need to make sure that this happens, too.
- Teach the new staged output state computation code the required
smarts to handle the disabling of outputs. The current code handles
this in a special case, but to better handle global modeset changes
covering more than one crtc, we want to do this all in the same
low-level modeset code.
- The actual modeset code is still a bit ugly and wants to know the new
crtc-enabled state a bit early. Follow-on patches will clean that
up, for now we have to apply the staged output configuration early,
outside of the set_mode functions.
- Improve/add comments in stage_output_state.
Essentially all that is left to do now is move the disabling code into
set_mode and then move the staged state update code also into
set_mode, at the right place between disabling things and calling the
mode_set callbacks for the new configuration.
v2: Disabling a crtc works by passing in a NULL mode or fb, userspace
doesn't hand in the list of connectors. We therefore need to detect
this case manually and tear down all the output links.
v3: Properly update the output staging pointers after having read out
the hw state.
v4: Simplify the code, add more DRM_DEBUG_KMS output and check a few
assumptions with WARN_ON. Essentially all things that I've noticed
while debugging issues in other places of the code.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 170 +-
drivers/gpu/drm/i915/intel_drv.h | 16
2 files changed, 142 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 3ee5af5..23c0d0f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6546,6 +6546,51 @@ intel_crtc_prepare_encoders(struct drm_device *dev)
}
}
+/**
+ * intel_modeset_update_staged_output_state
+ *
+ * Updates the staged output configuration state, e.g. after we've read out the
+ * current hw state.
+ */
+static void intel_modeset_update_staged_output_state(struct drm_device *dev)
+{
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+
+ list_for_each_entry(connector, dev-mode_config.connector_list,
+ base.head) {
+ connector-new_encoder =
+ to_intel_encoder(connector-base.encoder);
+ }
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+ encoder-new_crtc =
+ to_intel_crtc(encoder-base.crtc);
+ }
+}
+
+/**
+ * intel_modeset_commit_output_state
+ *
+ * This function copies the stage display pipe configuration to the real one.
+ */
+static void intel_modeset_commit_output_state(struct drm_device *dev)
+{
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+
+ list_for_each_entry(connector, dev-mode_config.connector_list,
+ base.head) {
+ connector-base.encoder = connector-new_encoder-base;
+ }
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+ encoder-base.crtc = encoder-new_crtc-base;
+ }
+}
+
bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *mode,
int x, int y, struct drm_framebuffer *old_fb)
@@ -6711,8 +6756,8 @@ static void intel_set_config_restore_state(struct
drm_device *dev,
struct intel_set_config *config)
{
struct drm_crtc *crtc;
- struct drm_encoder *encoder;
- struct drm_connector *connector;
+ struct intel_encoder *encoder;
+ struct intel_connector
[Intel-gfx] [PATCH 53/76] drm/i915: remove crtc disabling special case
Originally this has been introduced in
commit 6eebd6bb5f1ea04f04019e5c39f87a0f17ffb472
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Mon Nov 28 21:10:05 2011 +
drm: Fix lack of CRTC disable for drm_crtc_helper_set_config(.fb=NULL)
With the improvements of the output state staging and no longer
overwriting crtc-fb before the hw state is updated we can now handle
crtc disabling as part of the normal modeset sequence.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 25 -
1 file changed, 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index a691c76..e0cc193 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6512,30 +6512,6 @@ static bool intel_encoder_crtc_ok(struct drm_encoder
*encoder,
return false;
}
-static int
-intel_crtc_helper_disable(struct drm_crtc *crtc)
-{
- struct drm_device *dev = crtc-dev;
- struct drm_connector *connector;
- struct drm_encoder *encoder;
-
- /* Decouple all encoders and their attached connectors from this crtc */
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
- if (encoder-crtc != crtc)
- continue;
-
- list_for_each_entry(connector,
dev-mode_config.connector_list, head) {
- if (connector-encoder != encoder)
- continue;
-
- connector-encoder = NULL;
- }
- }
-
- drm_helper_disable_unused_functions(dev);
- return 0;
-}
-
static void
intel_crtc_prepare_encoders(struct drm_device *dev)
{
@@ -6938,7 +6914,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
(int)set-num_connectors, set-x, set-y);
} else {
DRM_DEBUG_KMS([CRTC:%d] [NOFB]\n, set-crtc-base.id);
- return intel_crtc_helper_disable(set-crtc);
}
dev = set-crtc-dev;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 54/76] drm/i915: move output commit and crtc disabling into set_mode
It's rather pointless to compute crtc-enabled twice right away ;-)
The only thing we really have to be careful about is that we frob the
dpms state only after a successful modeset and when we've actually
haven't just disabled the crtc.
Hooray for convoluted interfaces ...
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index e0cc193..d003fb3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6580,9 +6580,13 @@ bool intel_set_mode(struct drm_crtc *crtc,
struct drm_encoder *encoder;
bool ret = true;
+ intel_modeset_commit_output_state(dev);
+
crtc-enabled = drm_helper_crtc_in_use(crtc);
- if (!crtc-enabled)
+ if (!crtc-enabled) {
+ drm_helper_disable_unused_functions(dev);
return true;
+ }
adjusted_mode = drm_mode_duplicate(dev, mode);
if (!adjusted_mode)
@@ -6944,20 +6948,21 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
goto fail;
if (config-mode_changed) {
- intel_modeset_commit_output_state(dev);
-
- set-crtc-enabled = drm_helper_crtc_in_use(set-crtc);
- if (set-crtc-enabled) {
+ if (set-mode) {
DRM_DEBUG_KMS(attempting to set mode from
userspace\n);
drm_mode_debug_printmodeline(set-mode);
- if (!intel_set_mode(set-crtc, set-mode,
- set-x, set-y, set-fb)) {
- DRM_ERROR(failed to set mode on [CRTC:%d]\n,
- set-crtc-base.id);
- ret = -EINVAL;
- goto fail;
- }
+ }
+
+ if (!intel_set_mode(set-crtc, set-mode,
+ set-x, set-y, set-fb)) {
+ DRM_ERROR(failed to set mode on [CRTC:%d]\n,
+ set-crtc-base.id);
+ ret = -EINVAL;
+ goto fail;
+ }
+
+ if (set-crtc-enabled) {
DRM_DEBUG_KMS(Setting connector DPMS state to on\n);
for (i = 0; i set-num_connectors; i++) {
DRM_DEBUG_KMS(\t[CONNECTOR:%d:%s] set DPMS
on\n, set-connectors[i]-base.id,
@@ -6965,7 +6970,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
set-connectors[i]-funcs-dpms(set-connectors[i], DRM_MODE_DPMS_ON);
}
}
- drm_helper_disable_unused_functions(dev);
} else if (config-fb_changed) {
ret = intel_pipe_set_base(set-crtc,
set-x, set-y, set-fb);
@@ -6978,8 +6982,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
fail:
intel_set_config_restore_state(dev, config);
- intel_modeset_commit_output_state(dev);
-
/* Try to restore the config */
if (config-mode_changed
!intel_set_mode(save_set.crtc, save_set.mode,
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 55/76] drm/i915: extract adjusted mode computation
While at it, adjust a few things:
- Only assigng the new mode to crtc-mode right before calling the
mode_set callbacks - none of the previous callbacks depend upon
this, they all use the mode argument (as they should).
- Check encoder-new_crtc instead of the current crtc to check whether
the encoder will be used. This prepares for moving the staged output
committing further down in the sequence. Follow-on patches will fix
up individual -mode_fixup callbacks (only tv and lvds are affected
though).
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 75 +-
1 file changed, 47 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d003fb3..205bd7f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6569,6 +6569,48 @@ static void intel_modeset_commit_output_state(struct
drm_device *dev)
}
}
+static struct drm_display_mode *
+intel_modeset_adjusted_mode(struct drm_crtc *crtc,
+ struct drm_display_mode *mode)
+{
+ struct drm_device *dev = crtc-dev;
+ struct drm_display_mode *adjusted_mode;
+ struct drm_encoder_helper_funcs *encoder_funcs;
+ struct intel_encoder *encoder;
+
+ adjusted_mode = drm_mode_duplicate(dev, mode);
+ if (!adjusted_mode)
+ return ERR_PTR(-ENOMEM);
+
+ /* Pass our mode to the connectors and the CRTC to give them a chance to
+* adjust it according to limitations or connector properties, and also
+* a chance to reject the mode entirely.
+*/
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+
+ if (encoder-new_crtc-base != crtc)
+ continue;
+ encoder_funcs = encoder-base.helper_private;
+ if (!(encoder_funcs-mode_fixup(encoder-base, mode,
+ adjusted_mode))) {
+ DRM_DEBUG_KMS(Encoder fixup failed\n);
+ goto fail;
+ }
+ }
+
+ if (!(intel_crtc_mode_fixup(crtc, mode, adjusted_mode))) {
+ DRM_DEBUG_KMS(CRTC fixup failed\n);
+ goto fail;
+ }
+ DRM_DEBUG_KMS([CRTC:%d]\n, crtc-base.id);
+
+ return adjusted_mode;
+fail:
+ drm_mode_destroy(dev, adjusted_mode);
+ return ERR_PTR(-EINVAL);
+}
+
bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *mode,
int x, int y, struct drm_framebuffer *fb)
@@ -6588,44 +6630,21 @@ bool intel_set_mode(struct drm_crtc *crtc,
return true;
}
- adjusted_mode = drm_mode_duplicate(dev, mode);
- if (!adjusted_mode)
- return false;
saved_hwmode = crtc-hwmode;
saved_mode = crtc-mode;
- /* Update crtc values up front so the driver can rely on them for mode
-* setting.
-*/
- crtc-mode = *mode;
-
- /* Pass our mode to the connectors and the CRTC to give them a chance to
-* adjust it according to limitations or connector properties, and also
-* a chance to reject the mode entirely.
-*/
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
-
- if (encoder-crtc != crtc)
- continue;
- encoder_funcs = encoder-helper_private;
- if (!(ret = encoder_funcs-mode_fixup(encoder, mode,
- adjusted_mode))) {
- DRM_DEBUG_KMS(Encoder fixup failed\n);
- goto done;
- }
- }
-
- if (!(ret = intel_crtc_mode_fixup(crtc, mode, adjusted_mode))) {
- DRM_DEBUG_KMS(CRTC fixup failed\n);
- goto done;
+ adjusted_mode = intel_modeset_adjusted_mode(crtc, mode);
+ if (IS_ERR(adjusted_mode)) {
+ return false;
}
- DRM_DEBUG_KMS([CRTC:%d]\n, crtc-base.id);
intel_crtc_prepare_encoders(dev);
dev_priv-display.crtc_disable(crtc);
+ crtc-mode = *mode;
+
/* Set up the DPLL and any encoders state that needs to adjust or depend
* on the DPLL.
*/
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 56/76] drm/i915: use staged outuput config in tv-mode_fixup
The is this encoder cloned check will be reused by the lvds encoder,
hence exract it.
v2: Be a bit more careful about that we need to check the new, staged
ouput configuration in the check_non_cloned helper ...
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 22 ++
drivers/gpu/drm/i915/intel_drv.h |1 +
drivers/gpu/drm/i915/intel_tv.c |7 ++-
3 files changed, 25 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 205bd7f..021dde1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6490,6 +6490,28 @@ static struct drm_crtc_helper_funcs intel_helper_funcs =
{
.disable = intel_crtc_disable,
};
+bool intel_encoder_check_non_cloned(struct intel_encoder *encoder)
+{
+ struct intel_encoder *other_encoder;
+ struct drm_crtc *crtc = encoder-new_crtc-base;
+
+ if (WARN_ON(!crtc))
+ return true;
+
+ list_for_each_entry(other_encoder,
+ crtc-dev-mode_config.encoder_list,
+ base.head) {
+
+ if (other_encoder-new_crtc-base != crtc ||
+ encoder == other_encoder)
+ continue;
+ else
+ return false;
+ }
+
+ return true;
+}
+
static bool intel_encoder_crtc_ok(struct drm_encoder *encoder,
struct drm_crtc *crtc)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 16c9958..1384ab2 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -455,6 +455,7 @@ extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
extern void intel_encoder_disable(struct drm_encoder *encoder);
extern void intel_encoder_destroy(struct drm_encoder *encoder);
extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
+extern bool intel_encoder_check_non_cloned(struct intel_encoder *encoder);
extern void intel_connector_dpms(struct drm_connector *, int mode);
extern bool intel_connector_get_hw_state(struct intel_connector *connector);
extern void intel_connector_check_state(struct intel_connector *);
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 7828583..ad063de 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -910,17 +910,14 @@ intel_tv_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
- struct drm_device *dev = encoder-dev;
struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
- struct intel_encoder *other_encoder;
if (!tv_mode)
return false;
- for_each_encoder_on_crtc(dev, encoder-crtc, other_encoder)
- if (other_encoder-base != encoder)
- return false;
+ if (!intel_encoder_check_non_cloned(intel_tv-base))
+ return false;
adjusted_mode-clock = tv_mode-clock;
return true;
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 57/76] drm/i915: use staged outuput config in lvds-mode_fixup
- Use the check_cloned helper from the previous patch.
- Use encoder-new_crtc to check crtc properties.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_lvds.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index 52f9e7f..7f730af 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -250,9 +250,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder
*encoder,
{
struct drm_device *dev = encoder-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_crtc *intel_crtc = to_intel_crtc(encoder-crtc);
struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
- struct intel_encoder *tmp_encoder;
+ struct intel_crtc *intel_crtc = intel_lvds-base.new_crtc;
u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
int pipe;
@@ -262,14 +261,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder
*encoder,
return false;
}
- /* Should never happen!! */
- for_each_encoder_on_crtc(dev, encoder-crtc, tmp_encoder) {
- if (tmp_encoder-base != encoder) {
- DRM_ERROR(Can't enable LVDS and another
- encoder on the same pipe\n);
- return false;
- }
- }
+ if (!intel_encoder_check_non_cloned(intel_lvds-base))
+ return false;
/*
* We have timings from the BIOS for the panel, put them in
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 58/76] drm/i915: compute masks of crtcs affected in set_mode
This is definetely a bit more generic than currently required, but
if we keep track of all crtcs that need to be disabled/enable (because
they loose an encoder or something similar), crtcs that get completely
disabled and those that we need to do an actual mode change on nicely
prepares us for global modeset operations on multiple crtcs.
The only big thing missing here would be a global resource allocation
step (for e.g. pch plls), which would equally frob these bitmasks if
e.g. a crtc only needs a new pll.
These masks aren't yet put to use in this patch, this will follow in the
next one.
v2-v5: Fix up the computations for good (hopefully).
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 89 ++
1 file changed, 89 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 021dde1..0a116d5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6633,6 +6633,91 @@ fail:
return ERR_PTR(-EINVAL);
}
+/* Computes which crtcs are affected and sets the relevant bits in the mask.
For
+ * simplicity we use the crtc's pipe number (because it's easier to obtain). */
+static void
+intel_modeset_affected_pipes(struct drm_crtc *crtc, unsigned *modeset_pipes,
+unsigned *prepare_pipes, unsigned *disable_pipes)
+{
+ struct intel_crtc *intel_crtc;
+ struct drm_device *dev = crtc-dev;
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+ struct drm_crtc *tmp_crtc;
+
+ *disable_pipes = *modeset_pipes = *prepare_pipes = 0;
+
+ /* Check which crtcs have changed outputs connected to them, these need
+* to be part of the prepare_pipes mask. We don't (yet) support global
+* modeset across multiple crtcs, so modeset_pipes will only have one
+* bit set at most. */
+ list_for_each_entry(connector, dev-mode_config.connector_list,
+ base.head) {
+ if (connector-base.encoder == connector-new_encoder-base)
+ continue;
+
+ if (connector-base.encoder) {
+ tmp_crtc = connector-base.encoder-crtc;
+
+ *prepare_pipes |= 1 to_intel_crtc(tmp_crtc)-pipe;
+ }
+
+ if (connector-new_encoder)
+ *prepare_pipes |=
+ 1 connector-new_encoder-new_crtc-pipe;
+ }
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+ if (encoder-base.crtc == encoder-new_crtc-base)
+ continue;
+
+ if (encoder-base.crtc) {
+ tmp_crtc = encoder-base.crtc;
+
+ *prepare_pipes |= 1 to_intel_crtc(tmp_crtc)-pipe;
+ }
+
+ if (encoder-new_crtc)
+ *prepare_pipes |= 1 encoder-new_crtc-pipe;
+ }
+
+ /* Check for any pipes that will be fully disabled ... */
+ list_for_each_entry(intel_crtc, dev-mode_config.crtc_list,
+ base.head) {
+ bool used = false;
+
+ /* Don't try to disable disabled crtcs. */
+ if (!intel_crtc-base.enabled)
+ continue;
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+ if (encoder-new_crtc == intel_crtc)
+ used = true;
+ }
+
+ if (!used)
+ *disable_pipes |= 1 intel_crtc-pipe;
+ }
+
+
+ /* set_mode is also used to update properties on life display pipes. */
+ intel_crtc = to_intel_crtc(crtc);
+ if (!*disable_pipes crtc-enabled)
+ *prepare_pipes |= 1 intel_crtc-pipe;
+
+ /* We only support modeset on one single crtc, hence we need to do that
+* only for the passed in crtc iff we change anything else than just
+* disable crtcs. */
+ if (*prepare_pipes)
+ *modeset_pipes |= 1 intel_crtc-pipe;
+
+ /* ... and mask these out. */
+ *modeset_pipes = ~(*disable_pipes);
+ *prepare_pipes = ~(*disable_pipes);
+}
+
bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *mode,
int x, int y, struct drm_framebuffer *fb)
@@ -6642,8 +6727,12 @@ bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode;
struct drm_encoder_helper_funcs *encoder_funcs;
struct drm_encoder *encoder;
+ unsigned disable_pipe, prepare_pipes, modeset_pipes;
bool ret = true;
+ intel_modeset_affected_pipes(crtc, modeset_pipes,
+prepare_pipes,
[Intel-gfx] [PATCH 59/76] drm/i915: implement new set_mode code flow
... using the pipe masks from the previous patch.
Well, not quite:
- We still need to call the disable_unused_functions helper, until
we've moved the call to commit_output_state further down and
adjusted intel_crtc_disable a bit. The next patch will do that.
- Because we don't support (yet) mode changes on more than one crtc at
a time, some of the modeset_pipes checks are a bit hackish - but
that only needs fixing once we incorporate global modeset support.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 99 +-
1 file changed, 63 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 0a116d5..4a487a2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6718,6 +6718,12 @@ intel_modeset_affected_pipes(struct drm_crtc *crtc,
unsigned *modeset_pipes,
*prepare_pipes = ~(*disable_pipes);
}
+#define for_each_intel_crtc_masked(dev, mask, intel_crtc) \
+ list_for_each_entry((intel_crtc), \
+ (dev)-mode_config.crtc_list, \
+ base.head) \
+ if (mask (1 (intel_crtc)-pipe)) \
+
bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *mode,
int x, int y, struct drm_framebuffer *fb)
@@ -6727,73 +6733,92 @@ bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode;
struct drm_encoder_helper_funcs *encoder_funcs;
struct drm_encoder *encoder;
- unsigned disable_pipe, prepare_pipes, modeset_pipes;
+ struct intel_crtc *intel_crtc;
+ unsigned disable_pipes, prepare_pipes, modeset_pipes;
bool ret = true;
intel_modeset_affected_pipes(crtc, modeset_pipes,
-prepare_pipes, disable_pipe);
+prepare_pipes, disable_pipes);
+
+ DRM_DEBUG_KMS(set mode pipe masks: modeset: %x, prepare: %x, disable:
%x\n,
+ modeset_pipes, prepare_pipes, disable_pipes);
intel_modeset_commit_output_state(dev);
crtc-enabled = drm_helper_crtc_in_use(crtc);
- if (!crtc-enabled) {
- drm_helper_disable_unused_functions(dev);
- return true;
- }
+ for_each_intel_crtc_masked(dev, disable_pipes, intel_crtc)
+ drm_helper_disable_unused_functions(dev);
saved_hwmode = crtc-hwmode;
saved_mode = crtc-mode;
- adjusted_mode = intel_modeset_adjusted_mode(crtc, mode);
- if (IS_ERR(adjusted_mode)) {
- return false;
- }
+ /* Hack: Because we don't (yet) support global modeset on multiple
+* crtcs, we don't keep track of the new mode for more than one crtc.
+* Hence simply check whether any bit is set in modeset_pipes in all the
+* pieces of code that are not yet converted to deal with mutliple crtcs
+* changing their mode at the same time. */
+ adjusted_mode = NULL;
+ if (modeset_pipes) {
+ adjusted_mode = intel_modeset_adjusted_mode(crtc, mode);
+ if (IS_ERR(adjusted_mode)) {
+ return false;
+ }
- intel_crtc_prepare_encoders(dev);
+ intel_crtc_prepare_encoders(dev);
+ }
- dev_priv-display.crtc_disable(crtc);
+ for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc)
+ dev_priv-display.crtc_disable(intel_crtc-base);
- crtc-mode = *mode;
+ if (modeset_pipes) {
+ crtc-mode = *mode;
+ crtc-x = x;
+ crtc-y = y;
+ }
/* Set up the DPLL and any encoders state that needs to adjust or depend
* on the DPLL.
*/
- ret = !intel_crtc_mode_set(crtc, mode, adjusted_mode, x, y, fb);
- if (!ret)
- goto done;
+ for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) {
+ ret = !intel_crtc_mode_set(intel_crtc-base,
+ mode, adjusted_mode,
+ x, y, fb);
+ if (!ret)
+ goto done;
- list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
head) {
- if (encoder-crtc != crtc)
- continue;
+ if (encoder-crtc != intel_crtc-base)
+ continue;
- DRM_DEBUG_KMS([ENCODER:%d:%s] set [MODE:%d:%s]\n,
- encoder-base.id, drm_get_encoder_name(encoder),
- mode-base.id, mode-name);
- encoder_funcs = encoder-helper_private;
- encoder_funcs-mode_set(encoder, mode,
[Intel-gfx] [PATCH 60/76] drm/i915: push commit_output_state past crtc disabling
This requires a few changes
- We still need a noop function for crtc-disable, becuase the fb
helper is a bit too intimate with the crtc helper.
- We need to clear crtc-fb ourselves in intel_crtc_disable now that
we no longer rely on the helper's disable_unused_functions to do
that.
- We need to split out the sare update code, becuase the crtc code
can't call update_dpms any more, it needs to disable the crtc
unconditionally. This is because we now keep onto the encoder -
crtc mapping of the (still) active output pipe configuration.
- To check that we really disable a crtc that still has encoders,
insert a WARN_ON(!enabled) in the crtc disable function.
- Lastly, we need to walk over all crtcs to update their enabled state
after having called commit_output_state - for all disabled crtc the
crtc helper code has done that for us previously.
v2: Update connector dpms and encoder-connectors_active after
disabling the crtc, too.
v3: Noop-out intel_encoder_disable. Similarly to the crtc disable
callback used by the crtc helper code we can't simply remove all these
encoder callbacks: The fb helper (which we still use) has a rather
incetious relationship with the crtc helper code ...
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 81 ++
1 file changed, 53 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 4a487a2..bcf935d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3461,26 +3461,13 @@ static void i9xx_crtc_off(struct drm_crtc *crtc)
{
}
-/**
- * Sets the power management mode of the pipe and plane.
- */
-void intel_crtc_update_dpms(struct drm_crtc *crtc)
+static void intel_crtc_update_sarea(struct drm_crtc *crtc,
+ bool enabled)
{
struct drm_device *dev = crtc-dev;
- struct drm_i915_private *dev_priv = dev-dev_private;
struct drm_i915_master_private *master_priv;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_encoder *intel_encoder;
int pipe = intel_crtc-pipe;
- bool enabled, enable = false;
-
- for_each_encoder_on_crtc(dev, crtc, intel_encoder)
- enable |= intel_encoder-connectors_active;
-
- if (enable)
- dev_priv-display.crtc_enable(crtc);
- else
- dev_priv-display.crtc_disable(crtc);
if (!dev-primary-master)
return;
@@ -3489,8 +3476,6 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc)
if (!master_priv-sarea_priv)
return;
- enabled = crtc-enabled enable;
-
switch (pipe) {
case 0:
master_priv-sarea_priv-pipeA_w = enabled ?
crtc-mode.hdisplay : 0;
@@ -3506,14 +3491,42 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc)
}
}
+/**
+ * Sets the power management mode of the pipe and plane.
+ */
+void intel_crtc_update_dpms(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc-dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_encoder *intel_encoder;
+ bool enable = false;
+
+ for_each_encoder_on_crtc(dev, crtc, intel_encoder)
+ enable |= intel_encoder-connectors_active;
+
+ if (enable)
+ dev_priv-display.crtc_enable(crtc);
+ else
+ dev_priv-display.crtc_disable(crtc);
+
+ intel_crtc_update_sarea(crtc, enable);
+}
+
+static void intel_crtc_noop(struct drm_crtc *crtc)
+{
+}
+
static void intel_crtc_disable(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc-dev;
+ struct drm_connector *connector;
struct drm_i915_private *dev_priv = dev-dev_private;
- /* crtc-disable is only called when we have no encoders, hence this
-* will disable the pipe. */
- intel_crtc_update_dpms(crtc);
+ /* crtc should still be enabled when we disable it. */
+ WARN_ON(!crtc-enabled);
+
+ dev_priv-display.crtc_disable(crtc);
+ intel_crtc_update_sarea(crtc, false);
dev_priv-display.off(crtc);
assert_plane_disabled(dev-dev_private, to_intel_crtc(crtc)-plane);
@@ -3523,14 +3536,24 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
mutex_lock(dev-struct_mutex);
intel_unpin_fb_obj(to_intel_framebuffer(crtc-fb)-obj);
mutex_unlock(dev-struct_mutex);
+ crtc-fb = NULL;
+ }
+
+ /* Update computed state. */
+ list_for_each_entry(connector, dev-mode_config.connector_list, head) {
+ if (!connector-encoder || !connector-encoder-crtc)
+ continue;
+
+ if (connector-encoder-crtc != crtc)
+ continue;
+
+ connector-dpms = DRM_MODE_DPMS_OFF;
+
[Intel-gfx] [PATCH 62/76] drm/i915: WARN if the pipe won't turn off
This seems to be the symptom of a few neat bugs, hence be more
obnoxious when this fails.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 60843dd..b293d38 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1005,7 +1005,7 @@ void intel_wait_for_pipe_off(struct drm_device *dev, int
pipe)
/* Wait for the Pipe State to go off */
if (wait_for((I915_READ(reg) I965_PIPECONF_ACTIVE) == 0,
100))
- DRM_DEBUG_KMS(pipe_off wait timed out\n);
+ WARN(1, pipe_off wait timed out\n);
} else {
u32 last_line, line_mask;
int reg = PIPEDSL(pipe);
@@ -1023,7 +1023,7 @@ void intel_wait_for_pipe_off(struct drm_device *dev, int
pipe)
} while (((I915_READ(reg) line_mask) != last_line)
time_after(timeout, jiffies));
if (time_after(jiffies, timeout))
- DRM_DEBUG_KMS(pipe_off wait timed out\n);
+ WARN(1, pipe_off wait timed out\n);
}
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 64/76] drm/i915: push commit_output_state past the crtc/encoder preparing
With this change we can (finally!) rip out a few of the temporary hacks
and clean up a few other things:
- Kill intel_crtc_prepare_encoders, now unused.
- Kill the hacks in the crtc_disable/enable functions to always call the
encoder callbacks, we now always call the crtc functions with the right
encoder - crtc links.
- Also push down the crtc-enable, encoder and connector dpms state
updates. Unfortunately we can't add a WARN in the crtc_disable
callbacks to ensure that the crtc is always still enabled when
disabling an output pipe - the crtc sanitizer of the hw readout path
can hit this when it needs to disable an active pipe without any
enabled outputs.
- Only call crtc-disable if the pipe is already enabled - again avoids
running afoul of the new WARN.
v2: Copypaste our own version of crtc_in_use, too.
v3: We need to update the dpms an encoder-connectors_active states,
too.
v4: I've forgotten to kill the unconditional encoder-disable calls in
the crtc_disable functions.
v5: Rip out leftover debug printk.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 85 +++---
1 file changed, 47 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 6166708..99f4e55 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3220,10 +3220,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
WARN_ON(!crtc-enabled);
- /* XXX: For compatability with the crtc helper code, call the encoder's
-* enable function unconditionally for now. */
if (intel_crtc-active)
- goto encoders;
+ return;
intel_crtc-active = true;
intel_update_watermarks(dev);
@@ -3271,7 +3269,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_crtc_update_cursor(crtc, true);
-encoders:
for_each_encoder_on_crtc(dev, crtc, encoder)
encoder-enable(encoder);
@@ -3289,14 +3286,13 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
int plane = intel_crtc-plane;
u32 reg, temp;
- /* XXX: For compatability with the crtc helper code, call the encoder's
-* disable function unconditionally for now. */
- for_each_encoder_on_crtc(dev, crtc, encoder)
- encoder-disable(encoder);
if (!intel_crtc-active)
return;
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ encoder-disable(encoder);
+
intel_crtc_wait_for_pending_flips(crtc);
drm_vblank_off(dev, pipe);
intel_crtc_update_cursor(crtc, false);
@@ -3398,10 +3394,8 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
WARN_ON(!crtc-enabled);
- /* XXX: For compatability with the crtc helper code, call the encoder's
-* enable function unconditionally for now. */
if (intel_crtc-active)
- goto encoders;
+ return;
intel_crtc-active = true;
intel_update_watermarks(dev);
@@ -3417,7 +3411,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
intel_crtc_dpms_overlay(intel_crtc, true);
intel_crtc_update_cursor(crtc, true);
-encoders:
for_each_encoder_on_crtc(dev, crtc, encoder)
encoder-enable(encoder);
}
@@ -3431,14 +3424,13 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
int pipe = intel_crtc-pipe;
int plane = intel_crtc-plane;
- /* XXX: For compatability with the crtc helper code, call the encoder's
-* disable function unconditionally for now. */
- for_each_encoder_on_crtc(dev, crtc, encoder)
- encoder-disable(encoder);
if (!intel_crtc-active)
return;
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ encoder-disable(encoder);
+
/* Give the overlay scaler a chance to disable if it's on this pipe */
intel_crtc_wait_for_pending_flips(crtc);
drm_vblank_off(dev, pipe);
@@ -6558,18 +6550,6 @@ static bool intel_encoder_crtc_ok(struct drm_encoder
*encoder,
return false;
}
-static void
-intel_crtc_prepare_encoders(struct drm_device *dev)
-{
- struct intel_encoder *encoder;
-
- list_for_each_entry(encoder, dev-mode_config.encoder_list, base.head)
{
- /* Disable unused encoders */
- if (encoder-base.crtc == NULL)
- encoder-disable(encoder);
- }
-}
-
/**
* intel_modeset_update_staged_output_state
*
@@ -6742,6 +6722,18 @@ intel_modeset_affected_pipes(struct drm_crtc *crtc,
unsigned *modeset_pipes,
*prepare_pipes = ~(*disable_pipes);
}
+static bool intel_crtc_in_use(struct drm_crtc *crtc)
+{
+ struct drm_encoder *encoder;
+ struct drm_device *dev = crtc-dev;
+
+ list_for_each_entry(encoder,
[Intel-gfx] [PATCH 65/76] drm/i915: disable all crtcs at suspend time
We need this to avoid confusing the hw state readout code with the cpt
pch plls at resume time: We'd read the new pipe state (which is
disabled), but still believe that we have a life pll connected to that
pipe (from before the suspend). Hence properly disable pipes to clear
out all the residual state.
This has the neat side-effect that we don't enable ports prematurely
by restoring bogus state from the saved register values.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
Conflicts:
drivers/gpu/drm/i915/intel_drv.h
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
drivers/gpu/drm/i915/intel_display.c | 10 ++
drivers/gpu/drm/i915/intel_drv.h |1 +
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 04149e0..06b4d9d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -441,6 +441,9 @@ static int i915_drm_freeze(struct drm_device *dev)
GEM idle failed, resume might fail\n);
return error;
}
+
+ intel_modeset_disable(dev);
+
drm_irq_uninstall(dev);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 99f4e55..bd00dde 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3544,6 +3544,16 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
}
}
+void intel_modeset_disable(struct drm_device *dev)
+{
+ struct drm_crtc *crtc;
+
+ list_for_each_entry(crtc, dev-mode_config.crtc_list, head) {
+ if (crtc-enabled)
+ intel_crtc_disable(crtc);
+ }
+}
+
void intel_encoder_noop(struct drm_encoder *encoder)
{
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 24b23ed..995d5a0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -450,6 +450,7 @@ struct intel_set_config {
extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode
*mode,
int x, int y, struct drm_framebuffer *old_fb);
+extern void intel_modeset_disable(struct drm_device *dev);
extern void intel_crtc_load_lut(struct drm_crtc *crtc);
extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
extern void intel_encoder_noop(struct drm_encoder *encoder);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 66/76] drm/i915: add tons of modeset state checks
... let's see how whether this catches anything earlier and I can
track down a few bugs.
v2: Add more checks and also add DRM_DEBUG_KMS output so that it's
clear which connector/encoder/crtc is being checked atm. Which proved
rather useful for debugging ...
v3: Add a WARN in the common encoder dpms function, now that also
modeset changes properly update the dpms state ...
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 75 +-
1 file changed, 74 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bd00dde..09ee248 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3636,7 +3636,7 @@ void intel_connector_dpms(struct drm_connector
*connector, int mode)
if (encoder-base.crtc)
intel_encoder_dpms(encoder, mode);
else
- encoder-connectors_active = false;
+ WARN_ON(encoder-connectors_active != false);
intel_connector_check_state(to_intel_connector(connector));
}
@@ -6750,6 +6750,75 @@ static bool intel_crtc_in_use(struct drm_crtc *crtc)
base.head) \
if (mask (1 (intel_crtc)-pipe)) \
+static void
+intel_modeset_check_state(struct drm_device *dev)
+{
+ struct intel_crtc *crtc;
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+
+ list_for_each_entry(connector, dev-mode_config.connector_list,
+ base.head) {
+ /* This also checks the encoder/connector hw state with the
+* -get_hw_state callbacks. */
+ intel_connector_check_state(connector);
+
+ WARN_ON(connector-new_encoder-base !=
connector-base.encoder);
+ }
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+ bool enabled = false;
+ bool active = false;
+ enum pipe pipe;
+
+ DRM_DEBUG_KMS([ENCODER:%d:%s]\n,
+ encoder-base.base.id,
+ drm_get_encoder_name(encoder-base));
+
+ WARN_ON(encoder-new_crtc-base != encoder-base.crtc);
+ WARN_ON(encoder-connectors_active !encoder-base.crtc);
+
+ list_for_each_entry(connector, dev-mode_config.connector_list,
+ base.head) {
+ if (connector-base.encoder != encoder-base)
+ continue;
+ enabled = true;
+ if (connector-base.dpms == DRM_MODE_DPMS_ON)
+ active = true;
+ }
+ WARN_ON(!!encoder-base.crtc != enabled);
+ /* dpms on only implies active. */
+ WARN_ON(active !encoder-base.crtc);
+ WARN_ON(encoder-get_hw_state(encoder, pipe)
+!encoder-base.crtc);
+ }
+
+ list_for_each_entry(crtc, dev-mode_config.crtc_list,
+ base.head) {
+ bool enabled = false;
+ bool active = false;
+
+ DRM_DEBUG_KMS([CRTC:%d]\n,
+ crtc-base.base.id);
+
+ WARN_ON(crtc-active !crtc-base.enabled);
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list,
+ base.head) {
+ if (encoder-base.crtc != crtc-base)
+ continue;
+ enabled = true;
+ if (encoder-connectors_active)
+ active = true;
+ }
+ WARN_ON(active != crtc-active);
+ WARN_ON(enabled != crtc-base.enabled);
+
+ assert_pipe(dev-dev_private, crtc-pipe, crtc-active);
+ }
+}
+
bool intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *mode,
int x, int y, struct drm_framebuffer *fb)
@@ -6868,6 +6937,8 @@ done:
crtc-mode = saved_mode;
}
+ intel_modeset_check_state(dev);
+
return ret;
}
@@ -8076,6 +8147,8 @@ void intel_modeset_setup_hw_state(struct drm_device *dev)
}
intel_modeset_update_staged_output_state(dev);
+
+ intel_modeset_check_state(dev);
}
void intel_modeset_gem_init(struct drm_device *dev)
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 67/76] drm/i915: rip out intel_disable_pch_ports
Even with the old crtc helper code we should have disabled all
encoders on that pipe by now, and with the new code this would
definitely paper over a bug. We already have the necessary checks
in place in intel_disable_transcoder, so if we accidentally leave
a pch port on, this will be caught.
Hence just rip this all out.
Note that up to the patch in this giant modeset series that removes
the LVDS special case to avoid disabling LVDS in the encoder-prepare
callback (drm/i915/lvds: ditch -prepare special case), this was not
the case for all outputs.
Also note that in
commit 1b3c7a47f993bf9ab6c4c7cc3bbf5588052b58f4
Author: Zhenyu Wang zhen...@linux.intel.com
Date: Wed Nov 25 13:09:38 2009 +0800
drm/i915: Fix LVDS stability issue on Ironlake
this was already discovered independently and worked around. How I
bloody hate this entire mess of cludges piled on top of other cludges.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 60 --
1 file changed, 60 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 09ee248..cc21302 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1859,59 +1859,6 @@ static void intel_disable_plane(struct drm_i915_private
*dev_priv,
intel_wait_for_vblank(dev_priv-dev, pipe);
}
-static void disable_pch_dp(struct drm_i915_private *dev_priv,
- enum pipe pipe, int reg, u32 port_sel)
-{
- u32 val = I915_READ(reg);
- if (dp_pipe_enabled(dev_priv, pipe, port_sel, val)) {
- DRM_DEBUG_KMS(Disabling pch dp %x on pipe %d\n, reg, pipe);
- I915_WRITE(reg, val ~DP_PORT_EN);
- }
-}
-
-static void disable_pch_hdmi(struct drm_i915_private *dev_priv,
-enum pipe pipe, int reg)
-{
- u32 val = I915_READ(reg);
- if (hdmi_pipe_enabled(dev_priv, val, pipe)) {
- DRM_DEBUG_KMS(Disabling pch HDMI %x on pipe %d\n,
- reg, pipe);
- I915_WRITE(reg, val ~PORT_ENABLE);
- }
-}
-
-/* Disable any ports connected to this transcoder */
-static void intel_disable_pch_ports(struct drm_i915_private *dev_priv,
- enum pipe pipe)
-{
- u32 reg, val;
-
- val = I915_READ(PCH_PP_CONTROL);
- I915_WRITE(PCH_PP_CONTROL, val | PANEL_UNLOCK_REGS);
-
- disable_pch_dp(dev_priv, pipe, PCH_DP_B, TRANS_DP_PORT_SEL_B);
- disable_pch_dp(dev_priv, pipe, PCH_DP_C, TRANS_DP_PORT_SEL_C);
- disable_pch_dp(dev_priv, pipe, PCH_DP_D, TRANS_DP_PORT_SEL_D);
-
- reg = PCH_ADPA;
- val = I915_READ(reg);
- if (adpa_pipe_enabled(dev_priv, val, pipe))
- I915_WRITE(reg, val ~ADPA_DAC_ENABLE);
-
- reg = PCH_LVDS;
- val = I915_READ(reg);
- if (lvds_pipe_enabled(dev_priv, val, pipe)) {
- DRM_DEBUG_KMS(disable lvds on pipe %d val 0x%08x\n, pipe,
val);
- I915_WRITE(reg, val ~LVDS_PORT_EN);
- POSTING_READ(reg);
- udelay(100);
- }
-
- disable_pch_hdmi(dev_priv, pipe, HDMIB);
- disable_pch_hdmi(dev_priv, pipe, HDMIC);
- disable_pch_hdmi(dev_priv, pipe, HDMID);
-}
-
int
intel_pin_and_fence_fb_obj(struct drm_device *dev,
struct drm_i915_gem_object *obj,
@@ -3310,13 +3257,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
ironlake_fdi_disable(crtc);
- /* This is a horrible layering violation; we should be doing this in
-* the connector/encoder -prepare instead, but we don't always have
-* enough information there about the config to know whether it will
-* actually be necessary or just cause undesired flicker.
-*/
- intel_disable_pch_ports(dev_priv, pipe);
-
intel_disable_transcoder(dev_priv, pipe);
if (HAS_PCH_CPT(dev)) {
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 68/76] drm/i915: don't disable fdi links harder in ilk_crtc_enable
Because they should have been disabled when shutting down the display
pipe previously. To ensure that this is the case, add a few assserts
instead of unconditionally disabling the fdi link.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index cc21302..09c1a1c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3181,10 +3181,12 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
is_pch_port = intel_crtc_driving_pch(crtc);
- if (is_pch_port)
+ if (is_pch_port) {
ironlake_fdi_pll_enable(intel_crtc);
- else
- ironlake_fdi_disable(crtc);
+ } else {
+ assert_fdi_tx_disabled(dev_priv, pipe);
+ assert_fdi_rx_disabled(dev_priv, pipe);
+ }
/* Enable panel fitting for LVDS */
if (dev_priv-pch_pf_size
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 69/76] drm/i915: don't call dpms funcs after set_mode
... because our current set_mode implementation doesn't bother to adjust
for the dpms state, we just forcefully update it. So stop pretending that
we're better than we're are and rip out this extranous call.
Note that this totally confuses userspace, because the exposed connector
property isn't actually updated ...
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 09c1a1c..8979ad7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7112,7 +7112,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
struct drm_mode_set save_set;
struct intel_set_config *config;
int ret;
- int i;
BUG_ON(!set);
BUG_ON(!set-crtc);
@@ -7176,15 +7175,6 @@ static int intel_crtc_set_config(struct drm_mode_set
*set)
ret = -EINVAL;
goto fail;
}
-
- if (set-crtc-enabled) {
- DRM_DEBUG_KMS(Setting connector DPMS state to on\n);
- for (i = 0; i set-num_connectors; i++) {
- DRM_DEBUG_KMS(\t[CONNECTOR:%d:%s] set DPMS
on\n, set-connectors[i]-base.id,
-
drm_get_connector_name(set-connectors[i]));
-
set-connectors[i]-funcs-dpms(set-connectors[i], DRM_MODE_DPMS_ON);
- }
- }
} else if (config-fb_changed) {
ret = intel_pipe_set_base(set-crtc,
set-x, set-y, set-fb);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 70/76] drm/i915: update dpms property in set_mode
Hopefully this makes userspace slightly less confused about us
frobbing the dpms state behind its back. Yeah, it would be better
to be more careful with not changing the dpms state, but that is
quite more invasive.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 8979ad7..9de4dc1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6827,8 +6827,15 @@ bool intel_set_mode(struct drm_crtc *crtc,
intel_crtc = to_intel_crtc(connector-encoder-crtc);
- if (prepare_pipes (1 intel_crtc-pipe))
+ if (prepare_pipes (1 intel_crtc-pipe)) {
+ struct drm_property *dpms_property =
+ dev-mode_config.dpms_property;
+
connector-dpms = DRM_MODE_DPMS_ON;
+ drm_connector_property_set_value(connector,
+dpms_property,
+DRM_MODE_DPMS_ON);
+ }
to_intel_encoder(connector-encoder)-connectors_active = true;
}
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 71/76] drm/i915: add encoder-pre_enable/post_disable
The cpu eDP encoder has some horrible hacks to set up the DP pll at
the right time. To be able to move them to the right place, add some
more encoder callbacks so that this can happen at the right time.
LVDS has some similar funky hacks, but that would require more work
(we need to move around the pll setup a bit). Hence for now only
wiring these new callbacks up for ilk+ - we only have cpu eDP on these
platforms.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c |8
drivers/gpu/drm/i915/intel_drv.h |2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9de4dc1..2cf2cc9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3188,6 +3188,10 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
assert_fdi_rx_disabled(dev_priv, pipe);
}
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ if (encoder-pre_enable)
+ encoder-pre_enable(encoder);
+
/* Enable panel fitting for LVDS */
if (dev_priv-pch_pf_size
(intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) || HAS_eDP)) {
@@ -3257,6 +3261,10 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
I915_WRITE(PF_CTL(pipe), 0);
I915_WRITE(PF_WIN_SZ(pipe), 0);
+ for_each_encoder_on_crtc(dev, crtc, encoder)
+ if (encoder-post_disable)
+ encoder-post_disable(encoder);
+
ironlake_fdi_disable(crtc);
intel_disable_transcoder(dev_priv, pipe);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 995d5a0..0f780ee 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -148,7 +148,9 @@ struct intel_encoder {
bool connectors_active;
void (*hot_plug)(struct intel_encoder *);
void (*enable)(struct intel_encoder *);
+ void (*pre_enable)(struct intel_encoder *);
void (*disable)(struct intel_encoder *);
+ void (*post_disable)(struct intel_encoder *);
/* Read out the current hw state of this connector, returning true if
* the encoder is active. If the encoder is enabled it also set the pipe
* it is connected to in the pipe parameter. */
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 72/76] drm/i915: clean up the cpu edp pll special case
By using the new pre_enabel/post_disable functions.
To ensure that we only frob the cpu edp pll while the pipe is off add
the relevant asserts. Thanks to the new output state staging, this is
now really easy.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dp.c | 74 ++-
1 file changed, 27 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index df77929..0b92654 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -808,9 +808,6 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct
drm_display_mode *mode,
}
}
-static void ironlake_edp_pll_on(struct drm_encoder *encoder);
-static void ironlake_edp_pll_off(struct drm_encoder *encoder);
-
static void
intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
@@ -821,14 +818,6 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct
drm_display_mode *mode,
struct drm_crtc *crtc = intel_dp-base.base.crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- /* Turn on the eDP PLL if needed */
- if (is_edp(intel_dp)) {
- if (!is_pch_edp(intel_dp))
- ironlake_edp_pll_on(encoder);
- else
- ironlake_edp_pll_off(encoder);
- }
-
/*
* There are four kinds of DP registers:
*
@@ -1189,12 +1178,16 @@ static void ironlake_edp_backlight_off(struct intel_dp
*intel_dp)
msleep(intel_dp-backlight_off_delay);
}
-static void ironlake_edp_pll_on(struct drm_encoder *encoder)
+static void ironlake_edp_pll_on(struct intel_dp *intel_dp)
{
- struct drm_device *dev = encoder-dev;
+ struct drm_device *dev = intel_dp-base.base.dev;
+ struct drm_crtc *crtc = intel_dp-base.base.crtc;
struct drm_i915_private *dev_priv = dev-dev_private;
u32 dpa_ctl;
+ assert_pipe_disabled(dev_priv,
+to_intel_crtc(crtc)-pipe);
+
DRM_DEBUG_KMS(\n);
dpa_ctl = I915_READ(DP_A);
dpa_ctl |= DP_PLL_ENABLE;
@@ -1203,12 +1196,16 @@ static void ironlake_edp_pll_on(struct drm_encoder
*encoder)
udelay(200);
}
-static void ironlake_edp_pll_off(struct drm_encoder *encoder)
+static void ironlake_edp_pll_off(struct intel_dp *intel_dp)
{
- struct drm_device *dev = encoder-dev;
+ struct drm_device *dev = intel_dp-base.base.dev;
+ struct drm_crtc *crtc = intel_dp-base.base.crtc;
struct drm_i915_private *dev_priv = dev-dev_private;
u32 dpa_ctl;
+ assert_pipe_disabled(dev_priv,
+to_intel_crtc(crtc)-pipe);
+
dpa_ctl = I915_READ(DP_A);
dpa_ctl = ~DP_PLL_ENABLE;
I915_WRITE(DP_A, dpa_ctl);
@@ -1309,6 +1306,14 @@ static void intel_disable_dp(struct intel_encoder
*encoder)
ironlake_edp_panel_vdd_off(intel_dp, false);
}
+static void intel_post_disable_dp(struct intel_encoder *encoder)
+{
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
+
+ if (is_cpu_edp(intel_dp))
+ ironlake_edp_pll_off(intel_dp);
+}
+
static void intel_enable_dp(struct intel_encoder *encoder)
{
struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
@@ -1328,39 +1333,12 @@ static void intel_enable_dp(struct intel_encoder
*encoder)
ironlake_edp_backlight_on(intel_dp);
}
-static void
-intel_dp_dpms(struct drm_connector *connector, int mode)
+static void intel_pre_enable_dp(struct intel_encoder *encoder)
{
- struct intel_dp *intel_dp = intel_attached_dp(connector);
-
- /* DP supports only 2 dpms states. */
- if (mode != DRM_MODE_DPMS_ON)
- mode = DRM_MODE_DPMS_OFF;
-
- if (mode == connector-dpms)
- return;
-
- connector-dpms = mode;
-
- /* Only need to change hw state when actually enabled */
- if (!intel_dp-base.base.crtc) {
- intel_dp-base.connectors_active = false;
- return;
- }
-
- if (mode != DRM_MODE_DPMS_ON) {
- intel_encoder_dpms(intel_dp-base, mode);
-
- if (is_cpu_edp(intel_dp))
- ironlake_edp_pll_off(intel_dp-base.base);
- } else {
- if (is_cpu_edp(intel_dp))
- ironlake_edp_pll_on(intel_dp-base.base);
-
- intel_encoder_dpms(intel_dp-base, mode);
- }
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
- intel_connector_check_state(to_intel_connector(connector));
+ if (is_cpu_edp(intel_dp))
+ ironlake_edp_pll_on(intel_dp);
}
/*
@@ -2395,7 +2373,7 @@ static const struct drm_encoder_helper_funcs
intel_dp_helper_funcs = {
};
static const struct drm_connector_funcs intel_dp_connector_funcs = {
- .dpms = intel_dp_dpms,
+
[Intel-gfx] [PATCH 61/76] drm/i915: s/intel_encoder_disable/intel_encoder_noop
Because that's what it is. Unfortunately we can't rip this out because
the fb helper has an incetious relationship with the crtc helper - it
likes to call disable_unused_functions, among other things.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_crt.c |2 +-
drivers/gpu/drm/i915/intel_display.c |2 +-
drivers/gpu/drm/i915/intel_dp.c |2 +-
drivers/gpu/drm/i915/intel_drv.h |2 +-
drivers/gpu/drm/i915/intel_dvo.c |2 +-
drivers/gpu/drm/i915/intel_hdmi.c|4 ++--
drivers/gpu/drm/i915/intel_lvds.c|2 +-
drivers/gpu/drm/i915/intel_sdvo.c|2 +-
drivers/gpu/drm/i915/intel_tv.c |2 +-
9 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index c3c39a1..d19f72c 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -643,7 +643,7 @@ static void intel_crt_reset(struct drm_connector *connector)
static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
.mode_fixup = intel_crt_mode_fixup,
.mode_set = intel_crt_mode_set,
- .disable = intel_encoder_disable,
+ .disable = intel_encoder_noop,
};
static const struct drm_connector_funcs intel_crt_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bcf935d..60843dd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3552,7 +3552,7 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
}
}
-void intel_encoder_disable(struct drm_encoder *encoder)
+void intel_encoder_noop(struct drm_encoder *encoder)
{
}
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 26fdeeb..df77929 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2391,7 +2391,7 @@ static void intel_dp_encoder_destroy(struct drm_encoder
*encoder)
static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
.mode_fixup = intel_dp_mode_fixup,
.mode_set = intel_dp_mode_set,
- .disable = intel_encoder_disable,
+ .disable = intel_encoder_noop,
};
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1384ab2..24b23ed 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -452,7 +452,7 @@ extern bool intel_set_mode(struct drm_crtc *crtc, struct
drm_display_mode *mode,
int x, int y, struct drm_framebuffer *old_fb);
extern void intel_crtc_load_lut(struct drm_crtc *crtc);
extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
-extern void intel_encoder_disable(struct drm_encoder *encoder);
+extern void intel_encoder_noop(struct drm_encoder *encoder);
extern void intel_encoder_destroy(struct drm_encoder *encoder);
extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
extern bool intel_encoder_check_non_cloned(struct intel_encoder *encoder);
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 17dc8be..aa1bf57 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -346,7 +346,7 @@ static void intel_dvo_destroy(struct drm_connector
*connector)
static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
.mode_fixup = intel_dvo_mode_fixup,
.mode_set = intel_dvo_mode_set,
- .disable = intel_encoder_disable,
+ .disable = intel_encoder_noop,
};
static const struct drm_connector_funcs intel_dvo_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index e7d5078..7acf2d9 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -907,13 +907,13 @@ static void intel_hdmi_destroy(struct drm_connector
*connector)
static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs_hsw = {
.mode_fixup = intel_hdmi_mode_fixup,
.mode_set = intel_ddi_mode_set,
- .disable = intel_encoder_disable,
+ .disable = intel_encoder_noop,
};
static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
.mode_fixup = intel_hdmi_mode_fixup,
.mode_set = intel_hdmi_mode_set,
- .disable = intel_encoder_disable,
+ .disable = intel_encoder_noop,
};
static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index 7f730af..38ba2e8 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -590,7 +590,7 @@ static int intel_lvds_set_property(struct drm_connector
*connector,
static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
.mode_fixup = intel_lvds_mode_fixup,
[Intel-gfx] [PATCH 73/76] drm/i915: robustify edp_pll_on/off
With the previous patch to clean up where exactly these two functions
are getting called, this patch can tackle the enable/disable code
itself:
- WARN if the port enable bit is in the wrong state or if the edp pll
bit is in the wrong state, just for paranoia's sake.
- Don't disable the edp pll harder in the modeset functions just for
fun.
- Don't set the edp pll enable flag in intel_dp-DP in modeset, do
that while changing the actual hw state. We do the same with the
actual port enable bit, so this is a bit more consistent.
- Track the current DP register value when setting things up and add
some comments how intel_dp-DP is used in the disable code.
v2: Be more careful with resetting intel_dp-DP - otherwise dpms
off-on will fail spectacularly, becuase we enable the eDP port when
we should only enable the eDP pll.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dp.c | 29 ++---
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0b92654..b0ca02e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -889,7 +889,6 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct
drm_display_mode *mode,
intel_dp-DP |= intel_crtc-pipe 29;
/* don't miss out required setting for eDP */
- intel_dp-DP |= DP_PLL_ENABLE;
if (adjusted_mode-clock 20)
intel_dp-DP |= DP_PLL_FREQ_160MHZ;
else
@@ -911,7 +910,6 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct
drm_display_mode *mode,
if (is_cpu_edp(intel_dp)) {
/* don't miss out required setting for eDP */
- intel_dp-DP |= DP_PLL_ENABLE;
if (adjusted_mode-clock 20)
intel_dp-DP |= DP_PLL_FREQ_160MHZ;
else
@@ -1190,8 +1188,15 @@ static void ironlake_edp_pll_on(struct intel_dp
*intel_dp)
DRM_DEBUG_KMS(\n);
dpa_ctl = I915_READ(DP_A);
- dpa_ctl |= DP_PLL_ENABLE;
- I915_WRITE(DP_A, dpa_ctl);
+ WARN(dpa_ctl DP_PLL_ENABLE, dp pll on, should be off\n);
+ WARN(dpa_ctl DP_PORT_EN, dp port still on, should be off\n);
+
+ /* We don't adjust intel_dp-DP while tearing down the link, to
+* facilitate link retraining (e.g. after hotplug). Hence clear all
+* enable bits here to ensure that we don't enable too much. */
+ intel_dp-DP = ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE);
+ intel_dp-DP |= DP_PLL_ENABLE;
+ I915_WRITE(DP_A, intel_dp-DP);
POSTING_READ(DP_A);
udelay(200);
}
@@ -1207,6 +1212,13 @@ static void ironlake_edp_pll_off(struct intel_dp
*intel_dp)
to_intel_crtc(crtc)-pipe);
dpa_ctl = I915_READ(DP_A);
+ WARN((dpa_ctl DP_PLL_ENABLE) == 0,
+dp pll off, should be on\n);
+ WARN(dpa_ctl DP_PORT_EN, dp port still on, should be off\n);
+
+ /* We can't rely on the value tracked for the DP register in
+* intel_dp-DP because link_down must not change that (otherwise link
+* re-training will fail. */
dpa_ctl = ~DP_PLL_ENABLE;
I915_WRITE(DP_A, dpa_ctl);
POSTING_READ(DP_A);
@@ -1906,13 +1918,6 @@ intel_dp_link_down(struct intel_dp *intel_dp)
DRM_DEBUG_KMS(\n);
- if (is_edp(intel_dp)) {
- DP = ~DP_PLL_ENABLE;
- I915_WRITE(intel_dp-output_reg, DP);
- POSTING_READ(intel_dp-output_reg);
- udelay(100);
- }
-
if (HAS_PCH_CPT(dev) (IS_GEN7(dev) || !is_cpu_edp(intel_dp))) {
DP = ~DP_LINK_TRAIN_MASK_CPT;
I915_WRITE(intel_dp-output_reg, DP |
DP_LINK_TRAIN_PAT_IDLE_CPT);
@@ -2460,6 +2465,8 @@ intel_dp_init(struct drm_device *dev, int output_reg,
enum port port)
intel_dp-output_reg = output_reg;
intel_dp-port = port;
+ /* Preserve the current hw state. */
+ intel_dp-DP = I915_READ(intel_dp-output_reg);
intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
if (!intel_connector) {
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 74/76] drm/i915: rip out dp port enabling cludges^Wchecks
These have been added because dp links are fiddle things and don't
like it when we try to re-train an enabled output (or disable a
disable output harder). And because the crtc helper code is
ridiculously bad add tracking the modeset state.
But with the new code in place it is simply a bug to disable a disable
encoder or to enable an enabled encoder again. Hence convert these to
WARNs (and bail out for safety), but flatten all conditionals in the
code itself.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dp.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b0ca02e..d825fa9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1333,15 +1333,15 @@ static void intel_enable_dp(struct intel_encoder
*encoder)
struct drm_i915_private *dev_priv = dev-dev_private;
uint32_t dp_reg = I915_READ(intel_dp-output_reg);
+ if (WARN_ON(dp_reg DP_PORT_EN))
+ return;
+
ironlake_edp_panel_vdd_on(intel_dp);
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
- if (!(dp_reg DP_PORT_EN)) {
- intel_dp_start_link_train(intel_dp);
- ironlake_edp_panel_on(intel_dp);
- ironlake_edp_panel_vdd_off(intel_dp, true);
- intel_dp_complete_link_train(intel_dp);
- } else
- ironlake_edp_panel_vdd_off(intel_dp, false);
+ intel_dp_start_link_train(intel_dp);
+ ironlake_edp_panel_on(intel_dp);
+ ironlake_edp_panel_vdd_off(intel_dp, true);
+ intel_dp_complete_link_train(intel_dp);
ironlake_edp_backlight_on(intel_dp);
}
@@ -1913,7 +1913,7 @@ intel_dp_link_down(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dev-dev_private;
uint32_t DP = intel_dp-DP;
- if ((I915_READ(intel_dp-output_reg) DP_PORT_EN) == 0)
+ if (WARN_ON((I915_READ(intel_dp-output_reg) DP_PORT_EN) == 0))
return;
DRM_DEBUG_KMS(\n);
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 75/76] drm/i915: disable the cpu edp port after the cpu pipe
See bspec, Vol3 Part2, Section 1.1.3 Display Mode Set Sequence. This
applies to all platforms where we currently support eDP on, i.e. ilk,
snb ivb.
Without this change we fail to light up the eDP port on previously
unused crtcs (likely because something is stuck on the old pipe), and
we also fail to properly disable the old pipe (i.e. bit 30 in the
PIPECONF register is stuck as set until the next reboot).
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=44001
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dp.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d825fa9..42209e4 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1314,16 +1314,23 @@ static void intel_disable_dp(struct intel_encoder
*encoder)
ironlake_edp_panel_off(intel_dp);
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
- intel_dp_link_down(intel_dp);
- ironlake_edp_panel_vdd_off(intel_dp, false);
+
+ /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */
+ if (!is_cpu_edp(intel_dp)) {
+ intel_dp_link_down(intel_dp);
+ ironlake_edp_panel_vdd_off(intel_dp, false);
+ }
}
static void intel_post_disable_dp(struct intel_encoder *encoder)
{
struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
- if (is_cpu_edp(intel_dp))
+ if (is_cpu_edp(intel_dp)) {
+ intel_dp_link_down(intel_dp);
+ ironlake_edp_panel_vdd_off(intel_dp, false);
ironlake_edp_pll_off(intel_dp);
+ }
}
static void intel_enable_dp(struct intel_encoder *encoder)
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 76/76] drm/i915: move encoder-mode_set calls to crtc_mode_set
Makes more sense to group the entire mode_set stage into one function.
Noticed while discussion the rather confusing set of function names
with Paulo Zanoni. Unfortunately I don't have an idea to make the
function names lesss confusion.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 33 ++---
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2cf2cc9..7919058 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5009,6 +5009,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
+ struct drm_encoder_helper_funcs *encoder_funcs;
+ struct drm_encoder *encoder;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc-pipe;
int ret;
@@ -5019,7 +5021,22 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
x, y, fb);
drm_vblank_post_modeset(dev, pipe);
- return ret;
+ if (ret != 0)
+ return ret;
+
+ list_for_each_entry(encoder, dev-mode_config.encoder_list, head) {
+
+ if (encoder-crtc != intel_crtc-base)
+ continue;
+
+ DRM_DEBUG_KMS([ENCODER:%d:%s] set [MODE:%d:%s]\n,
+ encoder-base.id, drm_get_encoder_name(encoder),
+ mode-base.id, mode-name);
+ encoder_funcs = encoder-helper_private;
+ encoder_funcs-mode_set(encoder, mode, adjusted_mode);
+ }
+
+ return 0;
}
static bool intel_eld_uptodate(struct drm_connector *connector,
@@ -6776,8 +6793,6 @@ bool intel_set_mode(struct drm_crtc *crtc,
struct drm_device *dev = crtc-dev;
drm_i915_private_t *dev_priv = dev-dev_private;
struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode;
- struct drm_encoder_helper_funcs *encoder_funcs;
- struct drm_encoder *encoder;
struct intel_crtc *intel_crtc;
struct drm_connector *connector;
unsigned disable_pipes, prepare_pipes, modeset_pipes;
@@ -6857,18 +6872,6 @@ bool intel_set_mode(struct drm_crtc *crtc,
x, y, fb);
if (!ret)
goto done;
-
- list_for_each_entry(encoder, dev-mode_config.encoder_list,
head) {
-
- if (encoder-crtc != intel_crtc-base)
- continue;
-
- DRM_DEBUG_KMS([ENCODER:%d:%s] set [MODE:%d:%s]\n,
- encoder-base.id, drm_get_encoder_name(encoder),
- mode-base.id, mode-name);
- encoder_funcs = encoder-helper_private;
- encoder_funcs-mode_set(encoder, mode, adjusted_mode);
- }
}
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
--
1.7.10.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Set DERRMR around batches required vblank events
In order for the Display Engine to send messages to the Render Engine,
that event must be unmasked in the Display Engine Render Response Mask
Register (DERRMR). By default all events are masked to prevent unwanted
messages to conserve power, and it is strongly recommended that only
single events be unmasked at any time. So in order to pipeline the
register writes around individual batchbuffers, userspace must notify
the kernel when it requires a vblank event, this patch implements an
interface to do so with an single (pipe, event) request through the
execbuffer flags.
Note that another workaround is required for IVB, in that we must also
prevent RC6 sleeps whilst waiting upon an event. To do that we also
pipeline a forcewake into the second MT slot.
Open issues:
* How to handle failure to pipeline the register changes? Abort? Sync
undo?
* Serialising DERRMR across rings.
* Enabling vblank interrupts?
References: https://bugs.freedesktop.org/show_bug.cgi?id=50244
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_dma.c|3 ++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 65
drivers/gpu/drm/i915/i915_reg.h|1 +
include/drm/i915_drm.h | 17
4 files changed, 86 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 8921c4f..5debf31 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1009,6 +1009,9 @@ static int i915_getparam(struct drm_device *dev, void
*data,
case I915_PARAM_HAS_WAIT_TIMEOUT:
value = 1;
break;
+ case I915_PARAM_HAS_EXEC_VSYNC:
+ value = 1;
+ break;
default:
DRM_DEBUG_DRIVER(Unknown parameter %d\n,
param-param);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index d84ca98..90d8847 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1050,6 +1050,48 @@ i915_gem_do_execbuffer(struct drm_device *dev, void
*data,
if (ret)
goto err;
+ if (args-flags I915_EXEC_VSYNC_ENABLE
+ INTEL_INFO(dev)-gen = 6) {
+ int pipe, event;
+
+ printk(KERN_ERR enabling sync\n);
+
+ /* XXX Inter-ring serialisation? */
+
+ event = I915_EXEC_VSYNC_GET_EVENT(args-flags);
+ if (event I915_EXEC_VSYNC_VBLANK) {
+ ret = -EINVAL;
+ goto err;
+ }
+ pipe = I915_EXEC_VSYNC_GET_PIPE(args-flags);
+ if (pipe = dev_priv-num_pipe) {
+ ret = -EINVAL;
+ goto err;
+ }
+
+ printk(KERN_ERR event=%x, pipe=%d\n, event, pipe);
+ event = 1 (event + 8 * pipe);
+
+ ret = intel_ring_begin(ring, 4);
+ if (ret)
+ goto err;
+
+ intel_ring_emit(ring, MI_NOOP);
+ intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
+ intel_ring_emit(ring, DERRMR);
+ intel_ring_emit(ring, ~event);
+ intel_ring_advance(ring);
+
+ if (INTEL_INFO(dev)-gen = 7
+ intel_ring_begin(ring, 4) == 0) {
+ intel_ring_emit(ring, MI_NOOP);
+ intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
+ intel_ring_emit(ring, FORCEWAKE_MT);
+ intel_ring_emit(ring, _MASKED_BIT_ENABLE(2));
+ intel_ring_advance(ring);
+ }
+ }
+
trace_i915_gem_ring_dispatch(ring, seqno);
exec_start = batch_obj-gtt_offset + args-batch_start_offset;
@@ -1072,6 +1114,29 @@ i915_gem_do_execbuffer(struct drm_device *dev, void
*data,
goto err;
}
+ if (args-flags I915_EXEC_VSYNC_ENABLE
+ INTEL_INFO(dev)-gen = 6) {
+ bool was_interruptible = dev_priv-mm.interruptible;
+
+ dev_priv-mm.interruptible = false;
+ if (INTEL_INFO(dev)-gen = 7
+ intel_ring_begin(ring, 4) == 0) {
+ intel_ring_emit(ring, MI_NOOP);
+ intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
+ intel_ring_emit(ring, FORCEWAKE_MT);
+ intel_ring_emit(ring, _MASKED_BIT_DISABLE(2));
+ intel_ring_advance(ring);
+ }
+ if (intel_ring_begin(ring, 4) == 0) {
+ intel_ring_emit(ring, MI_NOOP);
+ intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
+ intel_ring_emit(ring, DERRMR);
+ intel_ring_emit(ring, 0x);
+
Re: [Intel-gfx] [PATCH 1/1] drm/i915: prevent possible pin leak on error path
On Mon, Jun 18, 2012 at 11:04:30PM +0100, Chris Wilson wrote: On Mon, 18 Jun 2012 19:03:38 -0300, Eugeni Dodonov eugeni.dodo...@intel.com wrote: We should not hit this under any sane conditions, but still, this does not looks right. For pedagology. CC: Chris Wilson ch...@chris-wilson.co.uk CC: Daniel Vetter daniel.vet...@ffwll.ch CC: sta...@vger.kernel.org Reported-by: Herton Ronaldo Krzesinski herton.krzesin...@canonical.com Signed-off-by: Eugeni Dodonov eugeni.dodo...@intel.com Whoever hits this has much bigger issues at hand... Reviewed-by: Chris Wlison ch...@chris-wilson.co.uk Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: PIPE_CONTROL TLB invalidation fix
The IVB simulator really doesn't like a TLB invalidate with no post-sync operation, in fact it blows up in an assertion failure. The documentation states that we must issue the TLB invalidate with a CS stall: Also Requires stall bit ([20] of DW1) set. This patch doesn't comply with the docs, but we're able to satisfy the simulator with this very small change, and I think simulator has historically trumped docs. Note, I don't think this belongs in stable as our TLB invalidation should be correct since we use the global invalidation per batch. Using TLB invalidation is itself only a requirement of HW contexts. Signed-off-by: Ben Widawsky b...@bwidawsk.net --- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index c58f1b9..339712a 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -198,8 +198,12 @@ intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring) if (ret) return ret; + /* NOTE: we want the TLB invalidate for render ring flush, but it must +* be sent with a non-zero post sync op. So it can be stuffed in here +* for convenience. +*/ intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(5)); - intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE); + intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_TLB_INVALIDATE); intel_ring_emit(ring, scratch_addr | PIPE_CONTROL_GLOBAL_GTT); /* address */ intel_ring_emit(ring, 0); intel_ring_emit(ring, 0); @@ -225,10 +229,10 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring, /* Just flush everything. Experiments have shown that reducing the * number of bits based on the write domains has little performance -* impact. +* impact. Note to copy/pasters: the TLB invlidate we want is tucked +* into intel_emit_post_sync_nonzero_flush(). */ flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; - flags |= PIPE_CONTROL_TLB_INVALIDATE; flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH; -- 1.7.11.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/4] drm/i915: l3 parity sysfs interface
Who will monitor this sysfs interface, 2D driver or 3D driver or other
application ?
Now, I don't find any user of this sysfs interface in 2D driver or 3D driver.
thanks
-Original Message-
From: intel-gfx-bounces+xiong.y.zhang=intel@lists.freedesktop.org
[mailto:intel-gfx-bounces+xiong.y.zhang=intel@lists.freedesktop.org] On
Behalf Of Ben Widawsky
Sent: Saturday, May 26, 2012 7:56 AM
To: intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky
Subject: [Intel-gfx] [PATCH 4/4] drm/i915: l3 parity sysfs interface
Dumb binary interfaces which allow root-only updates of the cache remapping
registers. As mentioned in a previous patch, software using this interface
needs to know about HW limits, and other programming considerations as the
kernel interface does no checking for these things on the root-only interface.
v1: Drop extra posting reads (Chris)
Return negative values in the sysfs interfaces on errors (Chris)
v2: Return -EINVAL for offset % 4 (Jesse) Move schizo userspace check out
(Jesse) Cleaner sysfs item initializers (Daniel)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_sysfs.c | 121 -
1 file changed, 119 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index 79f8344..c201327 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -29,6 +29,7 @@
#include linux/module.h
#include linux/stat.h
#include linux/sysfs.h
+#include intel_drv.h
#include i915_drv.h
static u32 calc_residency(struct drm_device *dev, const u32 reg) @@ -92,20
+93,136 @@ static struct attribute_group rc6_attr_group = {
.attrs = rc6_attrs
};
+static int l3_access_valid(struct drm_device *dev, loff_t offset) {
+ if (!IS_IVYBRIDGE(dev))
+ return -EPERM;
+
+ if (offset % 4 != 0)
+ return -EINVAL;
+
+ if (offset = GEN7_L3LOG_SIZE)
+ return -ENXIO;
+
+ return 0;
+}
+
+static ssize_t
+i915_l3_read(struct file *filp, struct kobject *kobj,
+struct bin_attribute *attr, char *buf,
+loff_t offset, size_t count)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
+ struct drm_device *drm_dev = dminor-dev;
+ struct drm_i915_private *dev_priv = drm_dev-dev_private;
+ uint32_t misccpctl;
+ int i, ret;
+
+ ret = l3_access_valid(drm_dev, offset);
+ if (ret)
+ return ret;
+
+ ret = i915_mutex_lock_interruptible(drm_dev);
+ if (ret)
+ return ret;
+
+ misccpctl = I915_READ(GEN7_MISCCPCTL);
+ I915_WRITE(GEN7_MISCCPCTL, misccpctl ~GEN7_DOP_CLOCK_GATE_ENABLE);
+
+ for (i = offset; count = 4 i GEN7_L3LOG_SIZE; i += 4, count -= 4)
+ *((uint32_t *)(buf[i])) = I915_READ(GEN7_L3LOG_BASE + i);
+
+ I915_WRITE(GEN7_MISCCPCTL, misccpctl);
+
+ mutex_unlock(drm_dev-struct_mutex);
+
+ return i - offset;
+}
+
+static ssize_t
+i915_l3_write(struct file *filp, struct kobject *kobj,
+ struct bin_attribute *attr, char *buf,
+ loff_t offset, size_t count)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
+ struct drm_device *drm_dev = dminor-dev;
+ struct drm_i915_private *dev_priv = drm_dev-dev_private;
+ u32 *temp = NULL; /* Just here to make handling failures easy */
+ int ret;
+
+ ret = l3_access_valid(drm_dev, offset);
+ if (ret)
+ return ret;
+
+ ret = i915_mutex_lock_interruptible(drm_dev);
+ if (ret)
+ return ret;
+
+ if (!dev_priv-mm.l3_remap_info) {
+ temp = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
+ if (!temp) {
+ mutex_unlock(drm_dev-struct_mutex);
+ return -ENOMEM;
+ }
+ }
+
+ ret = i915_gpu_idle(drm_dev);
+ if (ret) {
+ kfree(temp);
+ mutex_unlock(drm_dev-struct_mutex);
+ return ret;
+ }
+
+ /* TODO: Ideally we really want a GPU reset here to make sure errors
+* aren't propagated. Since I cannot find a stable way to reset the GPU
+* at this point it is left as a TODO.
+ */
+ if (temp)
+ dev_priv-mm.l3_remap_info = temp;
+
+ memcpy(dev_priv-mm.l3_remap_info + (offset/4),
+ buf + (offset/4),
+ count);
+
+ i915_gem_l3_remap(drm_dev);
+
+ mutex_unlock(drm_dev-struct_mutex);
+
+ return count;
+}
+
+static struct bin_attribute dpf_attrs = {
+ .attr = {.name = l3_parity, .mode = (S_IRUSR | S_IWUSR)},
+ .size = GEN7_L3LOG_SIZE,
+ .read = i915_l3_read,
+ .write =
Re: [Intel-gfx] [PATCH] drm/i915: PIPE_CONTROL TLB invalidation fix
On Thu, Jul 26, 2012 at 04:48:43PM -0700, Ben Widawsky wrote: The IVB simulator really doesn't like a TLB invalidate with no post-sync operation, in fact it blows up in an assertion failure. The documentation states that we must issue the TLB invalidate with a CS stall: Also Requires stall bit ([20] of DW1) set. This patch doesn't comply with the docs, but we're able to satisfy the simulator with this very small change, and I think simulator has historically trumped docs. Note, I don't think this belongs in stable as our TLB invalidation should be correct since we use the global invalidation per batch. Using TLB invalidation is itself only a requirement of HW contexts. Signed-off-by: Ben Widawsky b...@bwidawsk.net I have another patch from Chris that kills the non-zero post-sync op workaround for ivb ... So I guess we can't do this this easily. -Daniel --- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index c58f1b9..339712a 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -198,8 +198,12 @@ intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring) if (ret) return ret; + /* NOTE: we want the TLB invalidate for render ring flush, but it must + * be sent with a non-zero post sync op. So it can be stuffed in here + * for convenience. + */ intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(5)); - intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE); + intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_TLB_INVALIDATE); intel_ring_emit(ring, scratch_addr | PIPE_CONTROL_GLOBAL_GTT); /* address */ intel_ring_emit(ring, 0); intel_ring_emit(ring, 0); @@ -225,10 +229,10 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring, /* Just flush everything. Experiments have shown that reducing the * number of bits based on the write domains has little performance - * impact. + * impact. Note to copy/pasters: the TLB invlidate we want is tucked + * into intel_emit_post_sync_nonzero_flush(). */ flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; - flags |= PIPE_CONTROL_TLB_INVALIDATE; flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH; -- 1.7.11.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
