[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Refactor CT access to use iosys_map (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Refactor CT access to use iosys_map (rev4)
URL   : https://patchwork.freedesktop.org/series/101148/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11473 -> Patchwork_22823


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22823 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22823, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/index.html

Participating hosts (46 -> 47)
--

  Additional (4): bat-rpls-1 bat-rpls-2 fi-tgl-u2 fi-pnv-d510 
  Missing(3): fi-bsw-cyan fi-bwr-2160 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22823:

### CI changes ###

 Possible regressions 

  * boot:
- fi-pnv-d510:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-pnv-d510/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-tgl-u2:  NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-tgl-u2/igt@gem_lmem_swapp...@basic.html

  * igt@i915_pm_rpm@basic-rte:
- fi-tgl-u2:  NOTRUN -> [SKIP][3] +1 similar issue
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-tgl-u2/igt@i915_pm_...@basic-rte.html

  
 Warnings 

  * igt@gem_lmem_swapping@basic:
- fi-rkl-guc: [FAIL][4] ([i915#5602]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-rkl-guc/igt@gem_lmem_swapp...@basic.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-rkl-guc/igt@gem_lmem_swapp...@basic.html
- fi-hsw-4770:[SKIP][6] ([fdo#109271]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-hsw-4770/igt@gem_lmem_swapp...@basic.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-hsw-4770/igt@gem_lmem_swapp...@basic.html
- fi-glk-j4005:   [FAIL][8] ([i915#5602]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html

  * igt@runner@aborted:
- fi-cfl-8109u:   [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-cfl-8109u/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-cfl-8109u/igt@run...@aborted.html
- fi-kbl-soraka:  [FAIL][12] ([i915#4312]) -> [FAIL][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-kbl-soraka/igt@run...@aborted.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-kbl-soraka/igt@run...@aborted.html
- fi-bxt-dsi: [FAIL][14] ([i915#4312]) -> [FAIL][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-bxt-dsi/igt@run...@aborted.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-bxt-dsi/igt@run...@aborted.html
- fi-kbl-x1275:   [FAIL][16] ([i915#4312]) -> [FAIL][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-kbl-x1275/igt@run...@aborted.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-kbl-x1275/igt@run...@aborted.html
- fi-kbl-8809g:   [FAIL][18] ([i915#2722]) -> [FAIL][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-kbl-8809g/igt@run...@aborted.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-kbl-8809g/igt@run...@aborted.html
- fi-hsw-g3258:   [FAIL][20] ([i915#4312]) -> [FAIL][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-hsw-g3258/igt@run...@aborted.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-hsw-g3258/igt@run...@aborted.html
- fi-snb-2600:[FAIL][22] ([i915#4312]) -> [FAIL][23]
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11473/fi-snb-2600/igt@run...@aborted.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/fi-snb-2600/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_basic@basic:
- {bat-rpls-1}:   NOTRUN -> [SKIP][24] +145 similar issues
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22823/bat-rpls-1/igt@gem_exec_ba...@basic.html

  * igt@gem_lmem_swapping@basic:
- {fi-tgl-dsi}:   NOTRUN -> [SKIP][25] +2 similar issues
   [25]: 

Re: [Intel-gfx] [PATCH] drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL

[Lucas De Marchi]

On Thu, Apr 07, 2022 at 09:18:39AM -0700, Matt Roper wrote:

The intent of the version check in the mmap ioctl was to maintain
support for existing platforms (i.e., ADL/RPL and earlier), but drop
support on all future igpu platforms.  As we've seen on the dgpu side,
the hardware teams are using a more fine-grained numbering system for IP
version numbers these days, so it's possible the version number
associated with our next igpu could be some form of "12.xx" rather than
13 or higher.  Comparing against the full ver.release number will ensure
the intent of the check is maintained no matter what numbering the
hardware teams settle on.

Fixes: d3f3baa3562a ("drm/i915: Reinstate the mmap ioctl for some platforms")
Cc: Thomas Hellström 
Cc: Lucas De Marchi 
Signed-off-by: Matt Roper 



Reviewed-by: Lucas De Marchi 

thanks
Lucas De Marchi


---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c3ea243d414d..0c5c43852e24 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -70,7 +70,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
 * mmap ioctl is disallowed for all discrete platforms,
 * and for all platforms with GRAPHICS_VER > 12.
 */
-   if (IS_DGFX(i915) || GRAPHICS_VER(i915) > 12)
+   if (IS_DGFX(i915) || GRAPHICS_VER_FULL(i915) > IP_VER(12, 0))
return -EOPNOTSUPP;

if (args->flags & ~(I915_MMAP_WC))
--
2.34.1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Refactor CT access to use iosys_map (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Refactor CT access to use iosys_map (rev4)
URL   : https://patchwork.freedesktop.org/series/101148/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 2/2] drm/i915: fix i915_gem_object_wait_moving_fence

[Lucas De Marchi]

On Thu, Apr 07, 2022 at 05:45:32PM +0100, Matthew Auld wrote:

All of CI is just failing with the following, which prevents loading of
the module:

   i915 :03:00.0: [drm] *ERROR* Scratch setup failed

Best guess is that this comes from the pin_map() for the scratch page,
which does an i915_gem_object_wait_moving_fence() somewhere. It looks
like this now calls into dma_resv_wait_timeout() which can return the
remaining timeout, leading to the caller thinking this is an error.

Fixes: 1d7f5e6c5240 ("drm/i915: drop bo->moving dependency")
Signed-off-by: Matthew Auld 
Cc: Christian König 
Cc: Daniel Vetter 
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 2998d895a6b3..1c88d4121658 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -772,9 +772,14 @@ int i915_gem_object_get_moving_fence(struct 
drm_i915_gem_object *obj,
int i915_gem_object_wait_moving_fence(struct drm_i915_gem_object *obj,
  bool intr)
{
+   long ret;
+
assert_object_held(obj);
-   return dma_resv_wait_timeout(obj->base. resv, DMA_RESV_USAGE_KERNEL,
-intr, MAX_SCHEDULE_TIMEOUT);
+
+   ret = dma_resv_wait_timeout(obj->base. resv, DMA_RESV_USAGE_KERNEL,
+   intr, MAX_SCHEDULE_TIMEOUT);
+
+   return ret < 0 ? ret : 0;


shouldn't == 0 also be an error since it would be a timeout?

Lucas De Marchi

Re: [Intel-gfx] [PATCH 2/2] drm/i915: fix i915_gem_object_wait_moving_fence

[Lucas De Marchi]

On Thu, Apr 07, 2022 at 05:45:32PM +0100, Matthew Auld wrote:

All of CI is just failing with the following, which prevents loading of
the module:

   i915 :03:00.0: [drm] *ERROR* Scratch setup failed

Best guess is that this comes from the pin_map() for the scratch page,
which does an i915_gem_object_wait_moving_fence() somewhere. It looks
like this now calls into dma_resv_wait_timeout() which can return the
remaining timeout, leading to the caller thinking this is an error.

Fixes: 1d7f5e6c5240 ("drm/i915: drop bo->moving dependency")
Signed-off-by: Matthew Auld 
Cc: Christian König 
Cc: Daniel Vetter 


This indeed brings CI back to life.


Acked-by: Lucas De Marchi 


thanks
Lucas De Marchi

[Intel-gfx] linux-next: build failure after merge of the drm-misc tree

[Stephen Rothwell]

Hi all,

After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:

In file included from include/drm/drm_gem.h:38,
 from include/drm/ttm/ttm_bo_api.h:34,
 from drivers/gpu/drm/i915/i915_deps.c:9:
drivers/gpu/drm/i915/i915_deps.c: In function 'i915_deps_add_resv':
drivers/gpu/drm/i915/i915_deps.c:229:46: error: implicit conversion from 'enum 
' to 'enum dma_resv_usage' [-Werror=enum-conversion]
  229 | dma_resv_for_each_fence(, resv, true, fence) {
  |  ^~~~
include/linux/dma-resv.h:297:47: note: in definition of macro 
'dma_resv_for_each_fence'
  297 | for (dma_resv_iter_begin(cursor, obj, usage),   \
  |   ^
cc1: all warnings being treated as errors

Caused by commit

  7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")

I have used the drm-misc tree from next-20220407 for today.

-- 
Cheers,
Stephen Rothwell


pgpFnCCmHSzOz.pgp
Description: OpenPGP digital signature

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: fix broken build

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: fix broken build
URL   : https://patchwork.freedesktop.org/series/102354/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472_full -> Patchwork_22820_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22820_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22820_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (12 -> 10)
--

  Missing(2): shard-rkl shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_22820_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: NOTRUN -> [DMESG-WARN][1] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-iclb2/igt@gem_exec_balan...@parallel-bb-first.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-tglb: NOTRUN -> [DMESG-WARN][2] +2 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-tglb1/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: NOTRUN -> [DMESG-FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-iclb4/igt@gem_exec_balan...@parallel-ordering.html

  
 Warnings 

  * igt@gem_exec_balancer@parallel:
- shard-kbl:  [SKIP][4] ([fdo#109271]) -> [DMESG-WARN][5] +3 
similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/shard-kbl4/igt@gem_exec_balan...@parallel.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-kbl4/igt@gem_exec_balan...@parallel.html

  * igt@gem_exec_balancer@parallel-ordering:
- shard-tglb: [SKIP][6] ([fdo#109315] / [i915#2575]) -> 
[DMESG-FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/shard-tglb6/igt@gem_exec_balan...@parallel-ordering.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-tglb8/igt@gem_exec_balan...@parallel-ordering.html
- shard-kbl:  [SKIP][8] ([fdo#109271]) -> [DMESG-FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/shard-kbl4/igt@gem_exec_balan...@parallel-ordering.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-kbl6/igt@gem_exec_balan...@parallel-ordering.html

  * igt@gem_exec_balancer@parallel-out-fence:
- shard-tglb: [SKIP][10] ([fdo#109315] / [i915#2575]) -> 
[DMESG-WARN][11] +2 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/shard-tglb6/igt@gem_exec_balan...@parallel-out-fence.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-tglb2/igt@gem_exec_balan...@parallel-out-fence.html

  
Known issues


  Here are the changes found in Patchwork_22820_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][12] ([fdo#111827])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-tglb6/igt@feature_discov...@chamelium.html
- shard-iclb: NOTRUN -> [SKIP][13] ([fdo#111827])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-iclb5/igt@feature_discov...@chamelium.html

  * igt@feature_discovery@display-4x:
- shard-iclb: NOTRUN -> [SKIP][14] ([i915#1839]) +1 similar issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-iclb1/igt@feature_discov...@display-4x.html

  * igt@gem_ccs@block-copy-inplace:
- shard-tglb: NOTRUN -> [SKIP][15] ([i915#3555] / [i915#5325]) +2 
similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-tglb2/igt@gem_...@block-copy-inplace.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#5325])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-tglb1/igt@gem_...@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@suspend-resume:
- shard-iclb: NOTRUN -> [SKIP][17] ([i915#5327]) +4 similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-iclb4/igt@gem_...@suspend-resume.html

  * igt@gem_create@create-massive:
- shard-iclb: NOTRUN -> [DMESG-WARN][18] ([i915#4991]) +1 similar 
issue
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/shard-iclb2/igt@gem_cre...@create-massive.html
- shard-snb:  NOTRUN -> [DMESG-WARN][19] ([i915#4991]) +1 similar 
issue
   [19]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()
URL   : https://patchwork.freedesktop.org/series/102360/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22822


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22822 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22822, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/index.html

Participating hosts (49 -> 37)
--

  Additional (2): fi-bwr-2160 fi-pnv-d510 
  Missing(14): fi-bdw-samus shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 
bat-dg2-8 bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 shard-rkl shard-dg1 
bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22822:

### CI changes ###

 Possible regressions 

  * boot:
- fi-pnv-d510:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-pnv-d510/boot.html
- fi-bwr-2160:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-snb-2600:NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-snb-2600/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-bsw-nick:NOTRUN -> [FAIL][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-bsw-nick/igt@gem_lmem_swapp...@parallel-random-engines.html
- fi-hsw-g3258:   NOTRUN -> [FAIL][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-hsw-g3258/igt@gem_lmem_swapp...@parallel-random-engines.html

  
 Warnings 

  * igt@runner@aborted:
- fi-rkl-guc: [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-guc/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-rkl-guc/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][8] ([i915#4312]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-kbl-7567u/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22822 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_close_race@basic-process:
- fi-ivb-3770:NOTRUN -> [SKIP][10] ([fdo#109271]) +146 similar 
issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-ivb-3770/igt@gem_close_r...@basic-process.html

  * igt@gem_exec_fence@basic-await:
- fi-bsw-nick:NOTRUN -> [SKIP][11] ([fdo#109271]) +151 similar 
issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-bsw-nick/igt@gem_exec_fe...@basic-await.html

  * igt@i915_getparams_basic@basic-eu-total:
- fi-snb-2600:NOTRUN -> [SKIP][12] ([fdo#109271]) +150 similar 
issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-snb-2600/igt@i915_getparams_ba...@basic-eu-total.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][13] ([fdo#109271]) +146 similar 
issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-bsw-nick:NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#5341])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-bsw-nick/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#5341])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-snb-2600:NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#5341])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-snb-2600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-ivb-3770:NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22822/fi-ivb-3770/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html

  
 Warnings 

  * igt@gem_lmem_swapping@basic:
- fi-hsw-g3258:   [FAIL][18] -> [SKIP][19] ([fdo#109271])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-hsw-g3258/igt@gem_lmem_swapp...@basic.html
   [19]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()
URL   : https://patchwork.freedesktop.org/series/102360/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:315:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/edid: low level EDID block read refactoring etc. (rev3)

[Patchwork]

== Series Details ==

Series: drm/edid: low level EDID block read refactoring etc. (rev3)
URL   : https://patchwork.freedesktop.org/series/102329/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22821


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22821 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22821, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/index.html

Participating hosts (49 -> 35)
--

  Additional (1): fi-bwr-2160 
  Missing(15): fi-bdw-samus shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 
bat-dg2-8 bat-dg2-9 fi-bsw-cyan bat-adlp-6 fi-hsw-4770 bat-rpls-1 shard-rkl 
shard-dg1 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22821:

### CI changes ###

 Possible regressions 

  * boot:
- fi-bwr-2160:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-bwr-2160/boot.html

  

### IGT changes ###

 Warnings 

  * igt@runner@aborted:
- fi-rkl-11600:   [FAIL][2] ([i915#4312]) -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-11600/igt@run...@aborted.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-rkl-11600/igt@run...@aborted.html
- fi-bdw-5557u:   [FAIL][4] ([i915#4312]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-bdw-5557u/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-bdw-5557u/igt@run...@aborted.html
- fi-rkl-guc: [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-guc/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-rkl-guc/igt@run...@aborted.html
- fi-skl-guc: [FAIL][8] ([i915#4312] / [i915#5257]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-skl-guc/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-skl-guc/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_lmem_swapping@basic:
- {fi-tgl-dsi}:   NOTRUN -> [SKIP][10] +2 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-tgl-dsi/igt@gem_lmem_swapp...@basic.html
- {fi-jsl-1}: [FAIL][11] -> [SKIP][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@gem_lmem_swapp...@basic.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-jsl-1/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- {fi-jsl-1}: NOTRUN -> [FAIL][13]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-jsl-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  
Known issues


  Here are the changes found in Patchwork_22821 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   NOTRUN -> [SKIP][14] ([fdo#109271]) +1 similar issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@fbdev@eof:
- fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][15] ([i915#5557])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-kbl-8809g/igt@fb...@eof.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][16] ([fdo#109271]) +146 similar 
issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-kbl-soraka:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html

  
 Warnings 

  * igt@runner@aborted:
- fi-kbl-8809g:   [FAIL][18] -> [FAIL][19] ([i915#2722])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-8809g/igt@run...@aborted.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-kbl-8809g/igt@run...@aborted.html
- fi-kbl-soraka:  [FAIL][20] -> [FAIL][21] ([i915#4312])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-soraka/igt@run...@aborted.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22821/fi-kbl-soraka/igt@run...@aborted.html
- fi-kbl-7500u:   

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()
URL   : https://patchwork.freedesktop.org/series/102360/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f5b222e754b5 drm/dp: Export drm_dp_dpcd_access()
d3f620ce16fb drm/i915/dp: Add workaround for spurious AUX timeouts/hotplugs on 
LTTPR links
-:73: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#73: FILE: drivers/gpu/drm/i915/display/intel_dp_link_training.c:203:
+  
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV, , 1) != 1)

total: 0 errors, 1 warnings, 0 checks, 49 lines checked

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL

[Matt Roper]

On Thu, Apr 07, 2022 at 10:23:34PM +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL
> URL   : https://patchwork.freedesktop.org/series/102352/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22819
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_22819 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_22819, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/index.html
> 
> Participating hosts (49 -> 35)
> --
> 
>   Additional (1): fi-bwr-2160 
>   Missing(15): fi-bdw-samus shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 
> bat-dg2-8 shard-rkl bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 fi-blb-e6850 
> shard-dg1 bat-jsl-2 bat-jsl-1 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_22819:
> 
> ### CI changes ###
> 
>  Possible regressions 
> 
>   * boot:
> - fi-bwr-2160:NOTRUN -> [FAIL][1]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-bwr-2160/boot.html
> 

It looks like something failed during the initial driver probe (not sure
what; there don't seem to be any obvious warnings/errors) and then
driver cleanup started triggering more warnings and an eventual panic
since not everything being cleaned up had been fully setup at that
point.

Not related to this patch (which shouldn't have any functional impact on
any currently-existing platform).


Matt

>   
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@gem_lmem_swapping@basic:
> - fi-cfl-8109u:   NOTRUN -> [FAIL][2]
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html
> 
>   
>  Warnings 
> 
>   * igt@runner@aborted:
> - fi-kbl-x1275:   [FAIL][3] ([i915#4312]) -> [FAIL][4]
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-x1275/igt@run...@aborted.html
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-x1275/igt@run...@aborted.html
> - fi-kbl-guc: [FAIL][5] ([i915#4312] / [i915#5257]) -> [FAIL][6]
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-guc/igt@run...@aborted.html
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-guc/igt@run...@aborted.html
> - fi-kbl-7567u:   [FAIL][7] ([i915#4312]) -> [FAIL][8]
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-7567u/igt@run...@aborted.html
> 
>   
>  Suppressed 
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@runner@aborted:
> - {fi-jsl-1}: [FAIL][9] ([i915#4312]) -> [FAIL][10]
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@run...@aborted.html
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-jsl-1/igt@run...@aborted.html
> 
>   
> Known issues
> 
> 
>   Here are the changes found in Patchwork_22819 that come from known issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@core_auth@basic-auth:
> - fi-kbl-8809g:   NOTRUN -> [SKIP][11] ([fdo#109271]) +1 similar issue
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-8809g/igt@core_a...@basic-auth.html
> 
>   * igt@fbdev@eof:
> - fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][12] ([i915#5557])
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-8809g/igt@fb...@eof.html
> 
>   * igt@gem_close_race@basic-process:
> - fi-ivb-3770:NOTRUN -> [SKIP][13] ([fdo#109271]) +146 similar 
> issues
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-ivb-3770/igt@gem_close_r...@basic-process.html
> 
>   * igt@kms_flip@basic-flip-vs-dpms:
> - fi-kbl-soraka:  NOTRUN -> [SKIP][14] ([fdo#109271]) +146 similar 
> issues
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
> - fi-cfl-8109u:   NOTRUN -> [SKIP][15] ([fdo#109271]) +145 similar 
> issues
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
> - fi-cfl-8109u:   

Re: [Intel-gfx] [PATCH] drm/atomic-helpers: remove legacy_cursor_update hacks

[Rob Clark]

On Thu, Apr 7, 2022 at 3:59 PM Abhinav Kumar  wrote:
>
> Hi Rob and Daniel
>
> On 4/7/2022 3:51 PM, Rob Clark wrote:
> > On Wed, Apr 6, 2022 at 6:27 PM Jessica Zhang  
> > wrote:
> >>
> >>
> >>
> >> On 3/31/2022 8:20 AM, Daniel Vetter wrote:
> >>> The stuff never really worked, and leads to lots of fun because it
> >>> out-of-order frees atomic states. Which upsets KASAN, among other
> >>> things.
> >>>
> >>> For async updates we now have a more solid solution with the
> >>> ->atomic_async_check and ->atomic_async_commit hooks. Support for that
> >>> for msm and vc4 landed. nouveau and i915 have their own commit
> >>> routines, doing something similar.
> >>>
> >>> For everyone else it's probably better to remove the use-after-free
> >>> bug, and encourage folks to use the async support instead. The
> >>> affected drivers which register a legacy cursor plane and don't either
> >>> use the new async stuff or their own commit routine are: amdgpu,
> >>> atmel, mediatek, qxl, rockchip, sti, sun4i, tegra, virtio, and vmwgfx.
> >>>
> >>> Inspired by an amdgpu bug report.
> >>>
> >>> v2: Drop RFC, I think with amdgpu converted over to use
> >>> atomic_async_check/commit done in
> >>>
> >>> commit 674e78acae0dfb4beb56132e41cbae5b60f7d662
> >>> Author: Nicholas Kazlauskas 
> >>> Date:   Wed Dec 5 14:59:07 2018 -0500
> >>>
> >>>   drm/amd/display: Add fast path for cursor plane updates
> >>>
> >>> we don't have any driver anymore where we have userspace expecting
> >>> solid legacy cursor support _and_ they are using the atomic helpers in
> >>> their fully glory. So we can retire this.
> >>>
> >>> v3: Paper over msm and i915 regression. The complete_all is the only
> >>> thing missing afaict.
> >>>
> >>> v4: Fixup i915 fixup ...
> >>>
> >>> References: https://bugzilla.kernel.org/show_bug.cgi?id=199425
> >>> References: 
> >>> https://lore.kernel.org/all/20220221134155.125447-9-max...@cerno.tech/
> >>> References: https://bugzilla.kernel.org/show_bug.cgi?id=199425
> >>> Cc: Maxime Ripard 
> >>> Tested-by: Maxime Ripard 
> >>> Cc: mikita.lip...@amd.com
> >>> Cc: Michel Dänzer 
> >>> Cc: harry.wentl...@amd.com
> >>> Cc: Rob Clark 
> >>
> >> Hey Rob,
> >>
> >> I saw your tested-by and reviewed-by tags on Patchwork. Just curious,
> >> what device did you test on?
> >
> > I was testing on strongbad.. v5.18-rc1 + patches (notably, revert
> > 80253168dbfd ("drm: of: Lookup if child node has panel or bridge")
> >
> > I think the display setup shouldn't be significantly different than
> > limozeen (ie. it's an eDP panel).  But I didn't do much start/stop
> > ui.. I was mostly looking to make sure cursor movements weren't
> > causing fps drops ;-)
> >
> > BR,
> > -R
>
> start ui/ stop ui is a basic operation for us to use IGT on msm-next.
> So we cannot let that break.
>
> I think we need to check whats causing this splat.
>
> Can we hold back this change till then?

Can you reproduce on v5.18-rc1 (plus 80253168dbfd)?  I'm running a
loop of stop ui / start ui and hasn't triggered a splat yet.

 Otherwise maybe you can addr2line to figure out where it crashed?

BR,
-R

> Thanks
>
> Abhinav
> >
> >> I'm hitting several instances of this error when doing a start/stop ui
> >> on Lazor Chromebook with this patch:
> >>
> >> [ 3092.608322] CPU: 2 PID: 18579 Comm: DrmThread Tainted: GW
> >>5.17.0-rc2-lockdep-00089-g7f17ab7bf567 #155
> >> e5912cd286513b064a82a38938b3fdef86b079aa
> >> [ 3092.622880] Hardware name: Google Lazor Limozeen without Touchscreen
> >> (rev4) (DT)
> >> [ 3092.630492] pstate: 8049 (Nzcv daif +PAN -UAO -TCO -DIT -SSBS
> >> BTYPE=--)
> >> [ 3092.637664] pc : dpu_crtc_atomic_flush+0x9c/0x144
> >> [ 3092.642523] lr : dpu_crtc_atomic_flush+0x60/0x144
> >> [ 3092.647379] sp : ffc00c1e3760
> >> [ 3092.650805] x29: ffc00c1e3760 x28: ff80985dd800 x27:
> >> 0425
> >> [ 3092.658164] x26: ff80985dc500 x25: ff80985ddc00 x24:
> >> ffdf8ae3b6f0
> >> [ 3092.665522] x23:  x22:  x21:
> >> ff809b82da00
> >> [ 3092.672890] x20: ff80840e1000 x19: ff80840e2000 x18:
> >> 1000
> >> [ 3092.680255] x17: 0400 x16: 0100 x15:
> >> 003b
> >> [ 3092.687622] x14:  x13: 0002 x12:
> >> 0003
> >> [ 3092.694979] x11: ff8084009000 x10: 0040 x9 :
> >> 0040
> >> [ 3092.702340] x8 : 0300 x7 : 000c x6 :
> >> 0004
> >> [ 3092.709698] x5 : 0320 x4 : 0018 x3 :
> >> 
> >> [ 3092.717056] x2 :  x1 : 7bfb38b2a3a89800 x0 :
> >> ff809a1eb300
> >> [ 3092.724424] Call trace:
> >> [ 3092.726958]  dpu_crtc_atomic_flush+0x9c/0x144
> >> [ 3092.731463]  drm_atomic_helper_commit_planes+0x1bc/0x1c4
> >> [ 3092.736944]  msm_atomic_commit_tail+0x23c/0x3e0
> >> [ 3092.741627]  commit_tail+0x7c/0xfc
> >> [ 3092.745145]  drm_atomic_helper_commit+0x158/0x15c
> >> [ 

Re: [Intel-gfx] [PATCH] drm/atomic-helpers: remove legacy_cursor_update hacks

[Abhinav Kumar]

Hi Rob and Daniel

On 4/7/2022 3:51 PM, Rob Clark wrote:

On Wed, Apr 6, 2022 at 6:27 PM Jessica Zhang  wrote:




On 3/31/2022 8:20 AM, Daniel Vetter wrote:

The stuff never really worked, and leads to lots of fun because it
out-of-order frees atomic states. Which upsets KASAN, among other
things.

For async updates we now have a more solid solution with the
->atomic_async_check and ->atomic_async_commit hooks. Support for that
for msm and vc4 landed. nouveau and i915 have their own commit
routines, doing something similar.

For everyone else it's probably better to remove the use-after-free
bug, and encourage folks to use the async support instead. The
affected drivers which register a legacy cursor plane and don't either
use the new async stuff or their own commit routine are: amdgpu,
atmel, mediatek, qxl, rockchip, sti, sun4i, tegra, virtio, and vmwgfx.

Inspired by an amdgpu bug report.

v2: Drop RFC, I think with amdgpu converted over to use
atomic_async_check/commit done in

commit 674e78acae0dfb4beb56132e41cbae5b60f7d662
Author: Nicholas Kazlauskas 
Date:   Wed Dec 5 14:59:07 2018 -0500

  drm/amd/display: Add fast path for cursor plane updates

we don't have any driver anymore where we have userspace expecting
solid legacy cursor support _and_ they are using the atomic helpers in
their fully glory. So we can retire this.

v3: Paper over msm and i915 regression. The complete_all is the only
thing missing afaict.

v4: Fixup i915 fixup ...

References: https://bugzilla.kernel.org/show_bug.cgi?id=199425
References: 
https://lore.kernel.org/all/20220221134155.125447-9-max...@cerno.tech/
References: https://bugzilla.kernel.org/show_bug.cgi?id=199425
Cc: Maxime Ripard 
Tested-by: Maxime Ripard 
Cc: mikita.lip...@amd.com
Cc: Michel Dänzer 
Cc: harry.wentl...@amd.com
Cc: Rob Clark 


Hey Rob,

I saw your tested-by and reviewed-by tags on Patchwork. Just curious,
what device did you test on?


I was testing on strongbad.. v5.18-rc1 + patches (notably, revert
80253168dbfd ("drm: of: Lookup if child node has panel or bridge")

I think the display setup shouldn't be significantly different than
limozeen (ie. it's an eDP panel).  But I didn't do much start/stop
ui.. I was mostly looking to make sure cursor movements weren't
causing fps drops ;-)

BR,
-R


start ui/ stop ui is a basic operation for us to use IGT on msm-next.
So we cannot let that break.

I think we need to check whats causing this splat.

Can we hold back this change till then?

Thanks

Abhinav



I'm hitting several instances of this error when doing a start/stop ui
on Lazor Chromebook with this patch:

[ 3092.608322] CPU: 2 PID: 18579 Comm: DrmThread Tainted: GW
   5.17.0-rc2-lockdep-00089-g7f17ab7bf567 #155
e5912cd286513b064a82a38938b3fdef86b079aa
[ 3092.622880] Hardware name: Google Lazor Limozeen without Touchscreen
(rev4) (DT)
[ 3092.630492] pstate: 8049 (Nzcv daif +PAN -UAO -TCO -DIT -SSBS
BTYPE=--)
[ 3092.637664] pc : dpu_crtc_atomic_flush+0x9c/0x144
[ 3092.642523] lr : dpu_crtc_atomic_flush+0x60/0x144
[ 3092.647379] sp : ffc00c1e3760
[ 3092.650805] x29: ffc00c1e3760 x28: ff80985dd800 x27:
0425
[ 3092.658164] x26: ff80985dc500 x25: ff80985ddc00 x24:
ffdf8ae3b6f0
[ 3092.665522] x23:  x22:  x21:
ff809b82da00
[ 3092.672890] x20: ff80840e1000 x19: ff80840e2000 x18:
1000
[ 3092.680255] x17: 0400 x16: 0100 x15:
003b
[ 3092.687622] x14:  x13: 0002 x12:
0003
[ 3092.694979] x11: ff8084009000 x10: 0040 x9 :
0040
[ 3092.702340] x8 : 0300 x7 : 000c x6 :
0004
[ 3092.709698] x5 : 0320 x4 : 0018 x3 :

[ 3092.717056] x2 :  x1 : 7bfb38b2a3a89800 x0 :
ff809a1eb300
[ 3092.724424] Call trace:
[ 3092.726958]  dpu_crtc_atomic_flush+0x9c/0x144
[ 3092.731463]  drm_atomic_helper_commit_planes+0x1bc/0x1c4
[ 3092.736944]  msm_atomic_commit_tail+0x23c/0x3e0
[ 3092.741627]  commit_tail+0x7c/0xfc
[ 3092.745145]  drm_atomic_helper_commit+0x158/0x15c
[ 3092.749998]  drm_atomic_commit+0x60/0x74
[ 3092.754055]  drm_atomic_helper_update_plane+0x100/0x110
[ 3092.759449]  __setplane_atomic+0x11c/0x120
[ 3092.763685]  drm_mode_cursor_universal+0x188/0x22c
[ 3092.768633]  drm_mode_cursor_common+0x120/0x1f8
[ 3092.773310]  drm_mode_cursor_ioctl+0x68/0x8c
[ 3092.21]  drm_ioctl_kernel+0xe8/0x168
[ 3092.781770]  drm_ioctl+0x320/0x370
[ 3092.785289]  drm_compat_ioctl+0x40/0xdc
[ 3092.789257]  __arm64_compat_sys_ioctl+0xe0/0x150
[ 3092.794030]  invoke_syscall+0x80/0x114
[ 3092.797905]  el0_svc_common.constprop.3+0xc4/0xf8
[ 3092.802765]  do_el0_svc_compat+0x2c/0x54
[ 3092.806811]  el0_svc_compat+0x4c/0xe4
[ 3092.810598]  el0t_32_sync_handler+0xc4/0xf4
[ 3092.814914]  el0t_32_sync+0x174/0x178
[ 3092.818701] irq event stamp: 55940
[ 3092.822217] hardirqs last  enabled at 

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: fix broken build

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: fix broken build
URL   : https://patchwork.freedesktop.org/series/102354/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22820


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/index.html

Participating hosts (49 -> 36)
--

  Additional (2): fi-bwr-2160 fi-pnv-d510 
  Missing(15): fi-bdw-samus fi-bdw-5557u bat-adls-5 bat-dg1-6 bat-dg1-5 
shard-tglu bat-dg2-8 bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 shard-rkl 
shard-dg1 bat-jsl-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_22820 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- fi-elk-e7500:   [FAIL][1] -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-elk-e7500/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-elk-e7500/boot.html
- fi-blb-e6850:   [FAIL][3] -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-blb-e6850/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-blb-e6850/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@cs-sdma:
- fi-hsw-g3258:   NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#109315]) +17 
similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-hsw-g3258/igt@amdgpu/amd_ba...@cs-sdma.html

  * igt@amdgpu/amd_cs_nop@nop-compute0:
- fi-ilk-650: NOTRUN -> [SKIP][6] ([fdo#109271]) +39 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-ilk-650/igt@amdgpu/amd_cs_...@nop-compute0.html

  * igt@amdgpu/amd_prime@amd-to-i915:
- fi-kbl-x1275:   NOTRUN -> [SKIP][7] ([fdo#109271]) +19 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-kbl-x1275/igt@amdgpu/amd_pr...@amd-to-i915.html

  * igt@amdgpu/amd_prime@i915-to-amd:
- fi-snb-2520m:   NOTRUN -> [SKIP][8] ([fdo#109271]) +41 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-snb-2520m/igt@amdgpu/amd_pr...@i915-to-amd.html

  * igt@core_hotunplug@unbind-rebind:
- fi-skl-6700k2:  NOTRUN -> [DMESG-WARN][9] ([i915#5437])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-skl-6700k2/igt@core_hotunp...@unbind-rebind.html
- fi-rkl-guc: NOTRUN -> [DMESG-WARN][10] ([i915#5577])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-rkl-guc/igt@core_hotunp...@unbind-rebind.html
- fi-bsw-n3050:   NOTRUN -> [DMESG-WARN][11] ([i915#5437])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-bsw-n3050/igt@core_hotunp...@unbind-rebind.html
- fi-cfl-guc: NOTRUN -> [DMESG-WARN][12] ([i915#5437])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-cfl-guc/igt@core_hotunp...@unbind-rebind.html
- fi-kbl-soraka:  NOTRUN -> [DMESG-WARN][13] ([i915#5437])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-kbl-soraka/igt@core_hotunp...@unbind-rebind.html
- fi-tgl-1115g4:  NOTRUN -> [DMESG-WARN][14] ([i915#5577])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-tgl-1115g4/igt@core_hotunp...@unbind-rebind.html
- fi-bxt-dsi: NOTRUN -> [DMESG-WARN][15] ([i915#5437])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-bxt-dsi/igt@core_hotunp...@unbind-rebind.html
- fi-adl-ddr5:NOTRUN -> [DMESG-WARN][16] ([i915#5577])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-adl-ddr5/igt@core_hotunp...@unbind-rebind.html
- fi-cfl-8700k:   NOTRUN -> [DMESG-WARN][17] ([i915#5437])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-cfl-8700k/igt@core_hotunp...@unbind-rebind.html
- fi-glk-j4005:   NOTRUN -> [DMESG-WARN][18] ([i915#5437])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-glk-j4005/igt@core_hotunp...@unbind-rebind.html
- fi-kbl-7500u:   NOTRUN -> [DMESG-WARN][19] ([i915#5437])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-kbl-7500u/igt@core_hotunp...@unbind-rebind.html
- fi-bsw-nick:NOTRUN -> [DMESG-WARN][20] ([i915#5437])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-bsw-nick/igt@core_hotunp...@unbind-rebind.html
- fi-cfl-8109u:   NOTRUN -> [DMESG-WARN][21] ([i915#5437])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-cfl-8109u/igt@core_hotunp...@unbind-rebind.html
- fi-skl-guc: NOTRUN -> [DMESG-WARN][22] ([i915#5437])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22820/fi-skl-guc/igt@core_hotunp...@unbind-rebind.html
- fi-kbl-7567u:   NOTRUN -> 

Re: [Intel-gfx] [PATCH] drm/atomic-helpers: remove legacy_cursor_update hacks

[Rob Clark]

On Wed, Apr 6, 2022 at 6:27 PM Jessica Zhang  wrote:
>
>
>
> On 3/31/2022 8:20 AM, Daniel Vetter wrote:
> > The stuff never really worked, and leads to lots of fun because it
> > out-of-order frees atomic states. Which upsets KASAN, among other
> > things.
> >
> > For async updates we now have a more solid solution with the
> > ->atomic_async_check and ->atomic_async_commit hooks. Support for that
> > for msm and vc4 landed. nouveau and i915 have their own commit
> > routines, doing something similar.
> >
> > For everyone else it's probably better to remove the use-after-free
> > bug, and encourage folks to use the async support instead. The
> > affected drivers which register a legacy cursor plane and don't either
> > use the new async stuff or their own commit routine are: amdgpu,
> > atmel, mediatek, qxl, rockchip, sti, sun4i, tegra, virtio, and vmwgfx.
> >
> > Inspired by an amdgpu bug report.
> >
> > v2: Drop RFC, I think with amdgpu converted over to use
> > atomic_async_check/commit done in
> >
> > commit 674e78acae0dfb4beb56132e41cbae5b60f7d662
> > Author: Nicholas Kazlauskas 
> > Date:   Wed Dec 5 14:59:07 2018 -0500
> >
> >  drm/amd/display: Add fast path for cursor plane updates
> >
> > we don't have any driver anymore where we have userspace expecting
> > solid legacy cursor support _and_ they are using the atomic helpers in
> > their fully glory. So we can retire this.
> >
> > v3: Paper over msm and i915 regression. The complete_all is the only
> > thing missing afaict.
> >
> > v4: Fixup i915 fixup ...
> >
> > References: https://bugzilla.kernel.org/show_bug.cgi?id=199425
> > References: 
> > https://lore.kernel.org/all/20220221134155.125447-9-max...@cerno.tech/
> > References: https://bugzilla.kernel.org/show_bug.cgi?id=199425
> > Cc: Maxime Ripard 
> > Tested-by: Maxime Ripard 
> > Cc: mikita.lip...@amd.com
> > Cc: Michel Dänzer 
> > Cc: harry.wentl...@amd.com
> > Cc: Rob Clark 
>
> Hey Rob,
>
> I saw your tested-by and reviewed-by tags on Patchwork. Just curious,
> what device did you test on?

I was testing on strongbad.. v5.18-rc1 + patches (notably, revert
80253168dbfd ("drm: of: Lookup if child node has panel or bridge")

I think the display setup shouldn't be significantly different than
limozeen (ie. it's an eDP panel).  But I didn't do much start/stop
ui.. I was mostly looking to make sure cursor movements weren't
causing fps drops ;-)

BR,
-R

> I'm hitting several instances of this error when doing a start/stop ui
> on Lazor Chromebook with this patch:
>
> [ 3092.608322] CPU: 2 PID: 18579 Comm: DrmThread Tainted: GW
>   5.17.0-rc2-lockdep-00089-g7f17ab7bf567 #155
> e5912cd286513b064a82a38938b3fdef86b079aa
> [ 3092.622880] Hardware name: Google Lazor Limozeen without Touchscreen
> (rev4) (DT)
> [ 3092.630492] pstate: 8049 (Nzcv daif +PAN -UAO -TCO -DIT -SSBS
> BTYPE=--)
> [ 3092.637664] pc : dpu_crtc_atomic_flush+0x9c/0x144
> [ 3092.642523] lr : dpu_crtc_atomic_flush+0x60/0x144
> [ 3092.647379] sp : ffc00c1e3760
> [ 3092.650805] x29: ffc00c1e3760 x28: ff80985dd800 x27:
> 0425
> [ 3092.658164] x26: ff80985dc500 x25: ff80985ddc00 x24:
> ffdf8ae3b6f0
> [ 3092.665522] x23:  x22:  x21:
> ff809b82da00
> [ 3092.672890] x20: ff80840e1000 x19: ff80840e2000 x18:
> 1000
> [ 3092.680255] x17: 0400 x16: 0100 x15:
> 003b
> [ 3092.687622] x14:  x13: 0002 x12:
> 0003
> [ 3092.694979] x11: ff8084009000 x10: 0040 x9 :
> 0040
> [ 3092.702340] x8 : 0300 x7 : 000c x6 :
> 0004
> [ 3092.709698] x5 : 0320 x4 : 0018 x3 :
> 
> [ 3092.717056] x2 :  x1 : 7bfb38b2a3a89800 x0 :
> ff809a1eb300
> [ 3092.724424] Call trace:
> [ 3092.726958]  dpu_crtc_atomic_flush+0x9c/0x144
> [ 3092.731463]  drm_atomic_helper_commit_planes+0x1bc/0x1c4
> [ 3092.736944]  msm_atomic_commit_tail+0x23c/0x3e0
> [ 3092.741627]  commit_tail+0x7c/0xfc
> [ 3092.745145]  drm_atomic_helper_commit+0x158/0x15c
> [ 3092.749998]  drm_atomic_commit+0x60/0x74
> [ 3092.754055]  drm_atomic_helper_update_plane+0x100/0x110
> [ 3092.759449]  __setplane_atomic+0x11c/0x120
> [ 3092.763685]  drm_mode_cursor_universal+0x188/0x22c
> [ 3092.768633]  drm_mode_cursor_common+0x120/0x1f8
> [ 3092.773310]  drm_mode_cursor_ioctl+0x68/0x8c
> [ 3092.21]  drm_ioctl_kernel+0xe8/0x168
> [ 3092.781770]  drm_ioctl+0x320/0x370
> [ 3092.785289]  drm_compat_ioctl+0x40/0xdc
> [ 3092.789257]  __arm64_compat_sys_ioctl+0xe0/0x150
> [ 3092.794030]  invoke_syscall+0x80/0x114
> [ 3092.797905]  el0_svc_common.constprop.3+0xc4/0xf8
> [ 3092.802765]  do_el0_svc_compat+0x2c/0x54
> [ 3092.806811]  el0_svc_compat+0x4c/0xe4
> [ 3092.810598]  el0t_32_sync_handler+0xc4/0xf4
> [ 3092.814914]  el0t_32_sync+0x174/0x178
> [ 3092.818701] irq event stamp: 55940
> [ 3092.822217] hardirqs 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL

[Patchwork]

== Series Details ==

Series: drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL
URL   : https://patchwork.freedesktop.org/series/102352/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22819


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22819 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22819, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/index.html

Participating hosts (49 -> 35)
--

  Additional (1): fi-bwr-2160 
  Missing(15): fi-bdw-samus shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 
bat-dg2-8 shard-rkl bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 fi-blb-e6850 
shard-dg1 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22819:

### CI changes ###

 Possible regressions 

  * boot:
- fi-bwr-2160:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  
 Warnings 

  * igt@runner@aborted:
- fi-kbl-x1275:   [FAIL][3] ([i915#4312]) -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-x1275/igt@run...@aborted.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-x1275/igt@run...@aborted.html
- fi-kbl-guc: [FAIL][5] ([i915#4312] / [i915#5257]) -> [FAIL][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-guc/igt@run...@aborted.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-guc/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][7] ([i915#4312]) -> [FAIL][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
- {fi-jsl-1}: [FAIL][9] ([i915#4312]) -> [FAIL][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@run...@aborted.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-jsl-1/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22819 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   NOTRUN -> [SKIP][11] ([fdo#109271]) +1 similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@fbdev@eof:
- fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][12] ([i915#5557])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-8809g/igt@fb...@eof.html

  * igt@gem_close_race@basic-process:
- fi-ivb-3770:NOTRUN -> [SKIP][13] ([fdo#109271]) +146 similar 
issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-ivb-3770/igt@gem_close_r...@basic-process.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][14] ([fdo#109271]) +146 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   NOTRUN -> [SKIP][15] ([fdo#109271]) +145 similar 
issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-cfl-8109u:   NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#5341])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-ivb-3770:NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#5341])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22819/fi-ivb-3770/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html

  
 Warnings 

  * igt@runner@aborted:
- fi-cfl-8700k:   [FAIL][19] ([i915#4312] / 

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Fix warnings about PSR lock not held (rev3)

[Souza, Jose]

On Thu, 2022-04-07 at 21:01 +, Patchwork wrote:
Patch Details
Series: drm/i915/display: Fix warnings about PSR lock not held (rev3)
URL:https://patchwork.freedesktop.org/series/102298/
State:  failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/index.html
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22818
Summary

FAILURE

Serious unknown changes coming with Patchwork_22818 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22818, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/index.html

Participating hosts (48 -> 46)

Additional (4): bat-hsw-1 bat-rpls-2 fi-bwr-2160 bat-adlp-4
Missing (6): shard-tglu shard-rkl fi-bsw-cyan bat-rpls-1 fi-blb-e6850 
fi-bdw-samus

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_22818:

CI changes
Possible regressions

  *   boot:
 *   fi-bwr-2160: NOTRUN -> 
FAIL

Hi Lakshmi

Can you please take a look at this?
There is other series with the same failure: 
https://patchwork.freedesktop.org/series/102333/

IGT changes
Possible regressions

  *   igt@gem_lmem_swapping@basic:

 *   bat-dg1-5: NOTRUN -> 
SKIP
 +2 similar issues

 *   fi-cfl-8109u: NOTRUN -> 
FAIL

Warnings

  *   igt@runner@aborted:

 *   fi-rkl-11600: 
FAIL
 (i915#4312) -> 
FAIL

 *   fi-kbl-guc: 
FAIL
 (i915#4312 / 
i915#5257) -> 
FAIL

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *   igt@runner@aborted:
 *   {bat-hsw-1}: NOTRUN -> 
FAIL

Known issues

Here are the changes found in Patchwork_22818 that come from known issues:

IGT changes
Issues hit

  *   igt@core_auth@basic-auth:

 *   fi-kbl-8809g: NOTRUN -> 
SKIP
 (fdo#109271) +1 similar 
issue
  *   igt@fbdev@eof:

 *   fi-kbl-8809g: NOTRUN -> 
INCOMPLETE
 (i915#5557)
  *   igt@fbdev@write:

 *   bat-dg1-5: NOTRUN -> 
SKIP
 (i915#2582) +4 similar 
issues
  *   igt@gem_close_race@basic-process:

 *   fi-ivb-3770: NOTRUN -> 
SKIP
 (fdo#109271) +146 similar 
issues
  *   igt@kms_flip@basic-flip-vs-dpms:

 *   fi-kbl-soraka: NOTRUN -> 
SKIP
 (fdo#109271) +146 similar 
issues
  *   igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:

 *   fi-cfl-8109u: NOTRUN -> 
SKIP
 (fdo#109271) +145 similar 
issues
  *   igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:

 *   bat-dg1-5: NOTRUN -> 
SKIP
 (i915#2575 / 
i915#5341)

 *   fi-cfl-8109u: NOTRUN -> 
SKIP
 (fdo#109271 / 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Fix warnings about PSR lock not held (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Fix warnings about PSR lock not held (rev3)
URL   : https://patchwork.freedesktop.org/series/102298/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22818


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22818 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22818, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/index.html

Participating hosts (48 -> 46)
--

  Additional (4): bat-hsw-1 bat-rpls-2 fi-bwr-2160 bat-adlp-4 
  Missing(6): shard-tglu shard-rkl fi-bsw-cyan bat-rpls-1 fi-blb-e6850 
fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22818:

### CI changes ###

 Possible regressions 

  * boot:
- fi-bwr-2160:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][2] +2 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/bat-dg1-5/igt@gem_lmem_swapp...@basic.html
- fi-cfl-8109u:   NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  
 Warnings 

  * igt@runner@aborted:
- fi-rkl-11600:   [FAIL][4] ([i915#4312]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-11600/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-rkl-11600/igt@run...@aborted.html
- fi-kbl-guc: [FAIL][6] ([i915#4312] / [i915#5257]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-guc/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-kbl-guc/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
- {bat-hsw-1}:NOTRUN -> [FAIL][8]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/bat-hsw-1/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22818 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   NOTRUN -> [SKIP][9] ([fdo#109271]) +1 similar issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@fbdev@eof:
- fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][10] ([i915#5557])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-kbl-8809g/igt@fb...@eof.html

  * igt@fbdev@write:
- bat-dg1-5:  NOTRUN -> [SKIP][11] ([i915#2582]) +4 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/bat-dg1-5/igt@fb...@write.html

  * igt@gem_close_race@basic-process:
- fi-ivb-3770:NOTRUN -> [SKIP][12] ([fdo#109271]) +146 similar 
issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-ivb-3770/igt@gem_close_r...@basic-process.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][13] ([fdo#109271]) +146 similar 
issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   NOTRUN -> [SKIP][14] ([fdo#109271]) +145 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- bat-dg1-5:  NOTRUN -> [SKIP][15] ([i915#2575] / [i915#5341])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/bat-dg1-5/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-cfl-8109u:   NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#5341])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-ivb-3770:NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#5341])
   [18]: 

Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Use platform specific defaults for GuC/HuC enabling

[John Harrison]

On 4/7/2022 08:49, Tvrtko Ursulin wrote:

On 03/06/2021 17:48, Matthew Brost wrote:

From: John Harrison 

The meaning of 'default' for the enable_guc module parameter has been
updated to accurately reflect what is supported on current platforms.
So start using the defaults instead of forcing everything off.
Although, note that right now, the default is for everything to be off
anyway. So this is not a change for current platforms.

Signed-off-by: John Harrison 
Signed-off-by: Matthew Brost 
Reviewed-by: Daniele Ceraolo Spurio 
---
  drivers/gpu/drm/i915/i915_params.c | 2 +-
  drivers/gpu/drm/i915/i915_params.h | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c

index 0320878d96b0..e07f4cfea63a 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -160,7 +160,7 @@ i915_param_named_unsafe(edp_vswing, int, 0400,
  i915_param_named_unsafe(enable_guc, int, 0400,
  "Enable GuC load for GuC submission and/or HuC load. "
  "Required functionality can be selected using bitmask values. "
-    "(-1=auto, 0=disable [default], 1=GuC submission, 2=HuC load)");
+    "(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
    i915_param_named(guc_log_level, int, 0400,
  "GuC firmware logging level. Requires GuC to be loaded. "
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h

index 4a114a5ad000..f27eceb82c0f 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -59,7 +59,7 @@ struct drm_printer;
  param(int, disable_power_well, -1, 0400) \
  param(int, enable_ips, 1, 0600) \
  param(int, invert_brightness, 0, 0600) \
-    param(int, enable_guc, 0, 0400) \
+    param(int, enable_guc, -1, 0400) \
  param(int, guc_log_level, -1, 0400) \
  param(char *, guc_firmware_path, NULL, 0400) \
  param(char *, huc_firmware_path, NULL, 0400) \


What is the BKM to use this with multi-GPU setups? Specifically I have 
a TGL+DG1 laptop (off the shelf) and want to have GuC with DG1 only. 
If I pass i915.enable_guc=3 it seems it wants to enable it for TGL as 
well and wedges the GPU if it can't?



I don't think there is one.

Module parameters are driver global and therefore apply to all cards in 
the system, both discrete and integrated. The '-1' default can and does 
have different meanings for each card. So in the TGL+DG1 case, TGL 
should default to execlist and DG1 should already be defaulting to GuC. 
So the -1 setting should do what you want. But if you did need to 
override for one specific card only then I think you would need to do 
that with a code change and rebuild.


John.



Regards,

Tvrtko

[Intel-gfx] [CI] PR for new GuC v70.1.1

[John . C . Harrison]

The following changes since commit 681281e49fb6778831370e5d94e6e1d97f0752d6:

  amdgpu: update PSP 13.0.8 firmware (2022-03-18 07:35:54 -0400)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-firmware guc_v70.1.1_dg2

for you to fetch changes up to 0a2cdf9b1b74322bf90154d316434e2b0ec15357:

  i915: Add GuC v70.1.1 for DG2 (2022-04-07 13:15:01 -0700)


John Harrison (2):
  i915: Add GuC v70.1.1 for all platforms
  i915: Add GuC v70.1.1 for DG2

 WHENCE   |  33 +
 i915/adlp_guc_70.1.1.bin | Bin 0 -> 289472 bytes
 i915/bxt_guc_70.1.1.bin  | Bin 0 -> 206464 bytes
 i915/cml_guc_70.1.1.bin  | Bin 0 -> 206976 bytes
 i915/dg1_guc_70.1.1.bin  | Bin 0 -> 265152 bytes
 i915/dg2_guc_70.1.1.bin  | Bin 0 -> 365568 bytes
 i915/ehl_guc_70.1.1.bin  | Bin 0 -> 274496 bytes
 i915/glk_guc_70.1.1.bin  | Bin 0 -> 206784 bytes
 i915/icl_guc_70.1.1.bin  | Bin 0 -> 274496 bytes
 i915/kbl_guc_70.1.1.bin  | Bin 0 -> 206976 bytes
 i915/skl_guc_70.1.1.bin  | Bin 0 -> 206208 bytes
 i915/tgl_guc_70.1.1.bin  | Bin 0 -> 277440 bytes
 12 files changed, 33 insertions(+)
 create mode 100644 i915/adlp_guc_70.1.1.bin
 create mode 100644 i915/bxt_guc_70.1.1.bin
 create mode 100644 i915/cml_guc_70.1.1.bin
 create mode 100644 i915/dg1_guc_70.1.1.bin
 create mode 100644 i915/dg2_guc_70.1.1.bin
 create mode 100644 i915/ehl_guc_70.1.1.bin
 create mode 100644 i915/glk_guc_70.1.1.bin
 create mode 100644 i915/icl_guc_70.1.1.bin
 create mode 100644 i915/kbl_guc_70.1.1.bin
 create mode 100644 i915/skl_guc_70.1.1.bin
 create mode 100644 i915/tgl_guc_70.1.1.bin

Re: [Intel-gfx] [PATCH 1/2] drm/dp: Export drm_dp_dpcd_access()

[Jani Nikula]

On Thu, 07 Apr 2022, Imre Deak  wrote:
> The next patch needs a way to read a DPCD register without the preceding
> wake-up read in drm_dp_dpcd_read(). Export drm_dp_dpcd_access() to allow
> this.

I think I'd rather you added a special "probe" function for this
specific purpose. I think drm_dp_dpcd_access() is a too generic low
level function to export, and runs the risk of complicating any
potential future refactoring of the DP AUX code.

Something like this:

ssize_t drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset);

And you could reuse that for the wakeup in drm_dp_dpcd_read() too.


BR,
Jani.

>
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Imre Deak 
> ---
>  drivers/gpu/drm/dp/drm_dp.c| 19 +--
>  include/drm/dp/drm_dp_helper.h |  2 ++
>  2 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/dp/drm_dp.c b/drivers/gpu/drm/dp/drm_dp.c
> index 580016a1b9eb7..8b181314edcbe 100644
> --- a/drivers/gpu/drm/dp/drm_dp.c
> +++ b/drivers/gpu/drm/dp/drm_dp.c
> @@ -470,8 +470,22 @@ drm_dp_dump_access(const struct drm_dp_aux *aux,
>   * Both native and I2C-over-AUX transactions are supported.
>   */
>  
> -static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
> -   unsigned int offset, void *buffer, size_t size)
> +/**
> + * drm_dp_dpcd_access() - read or write a series of bytes from/to the DPCD
> + * @aux: DisplayPort AUX channel (SST)
> + * @request: DP_AUX_NATIVE_READ or DP_AUX_NATIVE_WRITE
> + * @offset: address of the (first) register to read or write
> + * @buffer: buffer with the register values to write or the register values 
> read
> + * @size: number of bytes in @buffer
> + *
> + * Returns the number of bytes transferred on success, or a negative error
> + * code on failure. This is a low-level function only for SST sinks and cases
> + * where calling drm_dp_dpcd_read()/write() is not possible (for instance due
> + * to the wake-up register read in drm_dp_dpcd_read()). For all other cases
> + * the latter functions should be used.
> + */
> +int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
> +unsigned int offset, void *buffer, size_t size)
>  {
>   struct drm_dp_aux_msg msg;
>   unsigned int retry, native_reply;
> @@ -526,6 +540,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 
> request,
>   mutex_unlock(>hw_mutex);
>   return ret;
>  }
> +EXPORT_SYMBOL(drm_dp_dpcd_access);
>  
>  /**
>   * drm_dp_dpcd_read() - read a series of bytes from the DPCD
> diff --git a/include/drm/dp/drm_dp_helper.h b/include/drm/dp/drm_dp_helper.h
> index 1eccd97419436..7cf6e83434a8c 100644
> --- a/include/drm/dp/drm_dp_helper.h
> +++ b/include/drm/dp/drm_dp_helper.h
> @@ -2053,6 +2053,8 @@ struct drm_dp_aux {
>   bool is_remote;
>  };
>  
> +int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
> +unsigned int offset, void *buffer, size_t size);
>  ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
>void *buffer, size_t size);
>  ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.BAT: failure for Inherit GPU scheduling priority from process nice

[Patchwork]

== Series Details ==

Series: Inherit GPU scheduling priority from process nice
URL   : https://patchwork.freedesktop.org/series/102348/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22817


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22817 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22817, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/index.html

Participating hosts (48 -> 36)
--

  Additional (2): fi-bwr-2160 fi-pnv-d510 
  Missing(14): fi-bdw-samus shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 
bat-dg2-8 shard-rkl bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 fi-blb-e6850 
bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22817:

### CI changes ###

 Possible regressions 

  * boot:
- fi-pnv-d510:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-pnv-d510/boot.html
- fi-bwr-2160:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  
 Warnings 

  * igt@runner@aborted:
- fi-rkl-11600:   [FAIL][4] ([i915#4312]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-11600/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-rkl-11600/igt@run...@aborted.html
- fi-rkl-guc: [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-guc/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-rkl-guc/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][8] ([i915#4312]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
- {fi-jsl-1}: [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-jsl-1/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22817 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   NOTRUN -> [SKIP][12] ([fdo#109271]) +1 similar issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@fbdev@eof:
- fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][13] ([i915#5557])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-kbl-8809g/igt@fb...@eof.html

  * igt@gem_close_race@basic-process:
- fi-ivb-3770:NOTRUN -> [SKIP][14] ([fdo#109271]) +146 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-ivb-3770/igt@gem_close_r...@basic-process.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][15] ([fdo#109271]) +146 similar 
issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   NOTRUN -> [SKIP][16] ([fdo#109271]) +145 similar 
issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-cfl-8109u:   NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#5341])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22817/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-ivb-3770:NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#5341])
   [19]: 

[Intel-gfx] [PATCH 1/2] drm/dp: Export drm_dp_dpcd_access()

[Imre Deak]

The next patch needs a way to read a DPCD register without the preceding
wake-up read in drm_dp_dpcd_read(). Export drm_dp_dpcd_access() to allow
this.

Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/dp/drm_dp.c| 19 +--
 include/drm/dp/drm_dp_helper.h |  2 ++
 2 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/dp/drm_dp.c b/drivers/gpu/drm/dp/drm_dp.c
index 580016a1b9eb7..8b181314edcbe 100644
--- a/drivers/gpu/drm/dp/drm_dp.c
+++ b/drivers/gpu/drm/dp/drm_dp.c
@@ -470,8 +470,22 @@ drm_dp_dump_access(const struct drm_dp_aux *aux,
  * Both native and I2C-over-AUX transactions are supported.
  */
 
-static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
- unsigned int offset, void *buffer, size_t size)
+/**
+ * drm_dp_dpcd_access() - read or write a series of bytes from/to the DPCD
+ * @aux: DisplayPort AUX channel (SST)
+ * @request: DP_AUX_NATIVE_READ or DP_AUX_NATIVE_WRITE
+ * @offset: address of the (first) register to read or write
+ * @buffer: buffer with the register values to write or the register values 
read
+ * @size: number of bytes in @buffer
+ *
+ * Returns the number of bytes transferred on success, or a negative error
+ * code on failure. This is a low-level function only for SST sinks and cases
+ * where calling drm_dp_dpcd_read()/write() is not possible (for instance due
+ * to the wake-up register read in drm_dp_dpcd_read()). For all other cases
+ * the latter functions should be used.
+ */
+int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
+  unsigned int offset, void *buffer, size_t size)
 {
struct drm_dp_aux_msg msg;
unsigned int retry, native_reply;
@@ -526,6 +540,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 
request,
mutex_unlock(>hw_mutex);
return ret;
 }
+EXPORT_SYMBOL(drm_dp_dpcd_access);
 
 /**
  * drm_dp_dpcd_read() - read a series of bytes from the DPCD
diff --git a/include/drm/dp/drm_dp_helper.h b/include/drm/dp/drm_dp_helper.h
index 1eccd97419436..7cf6e83434a8c 100644
--- a/include/drm/dp/drm_dp_helper.h
+++ b/include/drm/dp/drm_dp_helper.h
@@ -2053,6 +2053,8 @@ struct drm_dp_aux {
bool is_remote;
 };
 
+int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
+  unsigned int offset, void *buffer, size_t size);
 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
 void *buffer, size_t size);
 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
-- 
2.30.2

[Intel-gfx] [PATCH 2/2] drm/i915/dp: Add workaround for spurious AUX timeouts/hotplugs on LTTPR links

[Imre Deak]

Some ADLP DP link configuration at least with multiple LTTPRs expects
the first DPCD access during the LTTPR/DPCD detection after hotplug to
be a read from the LTTPR range starting with
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV. The side effect of
this read is to put each LTTPR into the LTTPR transparent or LTTPR
non-transparent mode.

The lack of the above read may leave some of the LTTPRs in non-LTTPR
mode, while other LTTPRs in LTTPR transparent or LTTPR non-transparent
mode (for instance LTTPRs after system suspend/resume that kept their
mode from before suspend). Due to the different AUX timeouts the
different modes imply, the DPCD access from a non-LTTPR range will
timeout and lead to an LTTPR generated hotplug towards the source (which
the LTTPR firmware uses to account for buggy TypeC adapters with a long
wake-up delay).

To avoid the above AUX timeout and subsequent hotplug interrupt, make
sure that the first DPCD access during detection is a read from an
LTTPR register.

VLK: SYSCROS-72939

Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_dp_link_training.c | 29 ---
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 26f9e2b748e40..b933b7a7bc70e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -82,19 +82,8 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp 
*intel_dp,
const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 {
struct intel_encoder *encoder = _to_dig_port(intel_dp)->base;
-   struct drm_i915_private *i915 = to_i915(encoder->base.dev);
int ret;
 
-   if (intel_dp_is_edp(intel_dp))
-   return false;
-
-   /*
-* Detecting LTTPRs must be avoided on platforms with an AUX timeout
-* period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
-*/
-   if (DISPLAY_VER(i915) < 10 || IS_GEMINILAKE(i915))
-   return false;
-
ret = drm_dp_read_lttpr_common_caps(_dp->aux, dpcd,
intel_dp->lttpr_common_caps);
if (ret < 0)
@@ -197,12 +186,30 @@ static int intel_dp_init_lttpr(struct intel_dp *intel_dp, 
const u8 dpcd[DP_RECEI
  */
 int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
 {
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+   /*
+* Detecting LTTPRs must be avoided on platforms with an AUX timeout
+* period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
+*/
+   bool init_lttpr = !intel_dp_is_edp(intel_dp) &&
+ (DISPLAY_VER(i915) >= 10 && !IS_GEMINILAKE(i915));
u8 dpcd[DP_RECEIVER_CAP_SIZE];
int lttpr_count;
 
+   if (init_lttpr) {
+   u8 tmp;
+
+   if (drm_dp_dpcd_access(_dp->aux, DP_AUX_NATIVE_READ,
+  
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV, , 1) != 1)
+   return -EIO;
+   }
+
if (drm_dp_read_dpcd_caps(_dp->aux, dpcd))
return -EIO;
 
+   if (!init_lttpr)
+   return 0;
+
lttpr_count = intel_dp_init_lttpr(intel_dp, dpcd);
 
/*
-- 
2.30.2

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/atomic-helpers: remove legacy_cursor_update hacks (rev2)

[Patchwork]

== Series Details ==

Series: drm/atomic-helpers: remove legacy_cursor_update hacks (rev2)
URL   : https://patchwork.freedesktop.org/series/102028/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11471_full -> Patchwork_22809_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 12)
--

  Missing(1): shard-dg1 

Known issues


  Here are the changes found in Patchwork_22809_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][1], [PASS][2], [PASS][3], [PASS][4], 
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], 
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], 
[PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], 
[PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], 
[FAIL][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], 
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], 
[PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], 
[PASS][48], [PASS][49], [PASS][50]) ([i915#4392])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk1/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk1/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk2/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk2/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk2/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk3/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk3/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk3/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk4/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk4/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk5/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk5/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk6/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk6/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk6/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk7/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk7/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk7/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk8/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk8/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk8/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk9/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk9/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/shard-glk9/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk2/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk1/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk1/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk1/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk2/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk9/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk9/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk8/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk8/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk8/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk7/boot.html
   [37]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk7/boot.html
   [38]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk7/boot.html
   [39]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk6/boot.html
   [40]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk2/boot.html
   [41]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk6/boot.html
   [42]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk6/boot.html
   [43]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/shard-glk5/boot.html
   [44]: 

Re: [Intel-gfx] [PATCH v3 08/22] drm/i915/bios: Generate LFP data table pointers if the VBT lacks them

[Jani Nikula]

On Thu, 07 Apr 2022, Jani Nikula  wrote:
> On Wed, 06 Apr 2022, Ville Syrjala  wrote:
>> From: Ville Syrjälä 
>>
>> Modern VBTs no longer contain the LFP data table pointers
>> block (41). We are expecting to have one in order to be able
>> to parse the LFP data block (42), so let's make one up.
>>
>> Since the fp_timing table has variable size we must somehow
>> determine its size. Rather than just hardcode it we look for
>> the terminator bytes (0x) to figure out where each table
>> entry starts. dvo_timing, panel_pnp_id, and panel_name are
>> expected to have fixed size.
>>
>> This has been observed on various machines, eg. TGL with BDB
>> version 240, CML with BDB version 231, etc. The most recent
>> VBT I've observed that still had block 41 had BDB version
>> 228. So presumably the cutoff (if an exact cutoff even exists)
>> is somewhere around BDB version 229-231.
>>
>> v2: kfree the thing we allocated, not the thing+3 bytes
>> v3: Do the debugprint only if we found the LFP data block
>>
>> Signed-off-by: Ville Syrjälä 
>> ---
>>  drivers/gpu/drm/i915/display/intel_bios.c | 136 +-
>>  1 file changed, 135 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
>> b/drivers/gpu/drm/i915/display/intel_bios.c
>> index 8b118c54314d..d32091dad1b0 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -310,16 +310,146 @@ static bool fixup_lfp_data_ptrs(const void *bdb, void 
>> *ptrs_block)
>>  return validate_lfp_data_ptrs(bdb, ptrs);
>>  }
>>  
>> +static const void *find_fp_timing_terminator(const u8 *data, int size)
>> +{
>> +int i;
>> +
>> +if (!data)
>> +return NULL;
>> +
>> +for (i = 0; i < size - 1; i++) {
>> +if (data[i] == 0xff && data[i+1] == 0xff)
>> +return [i];
>> +}
>> +
>> +return NULL;
>> +}
>> +
>> +static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
>> + int table_size, int total_size)
>> +{
>> +if (total_size < table_size)
>> +return total_size;
>> +
>> +table->table_size = table_size;
>> +table->offset = total_size - table_size;
>> +
>> +return total_size - table_size;
>> +}
>> +
>> +static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
>> +  const struct lvds_lfp_data_ptr_table *prev,
>> +  int size)
>> +{
>> +next->table_size = prev->table_size;
>> +next->offset = prev->offset + size;
>> +}
>> +
>> +static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
>> +const void *bdb)
>> +{
>> +int i, size, table_size, block_size, offset;
>> +const void *t0, *t1, *block;
>> +struct bdb_lvds_lfp_data_ptrs *ptrs;
>> +void *ptrs_block;
>> +
>> +block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
>> +if (!block)
>> +return NULL;
>> +
>> +drm_dbg_kms(>drm, "Generating LFP data table pointers\n");
>> +
>> +block_size = get_blocksize(block);
>> +
>> +size = block_size;
>> +t0 = find_fp_timing_terminator(block, size);
>> +
>> +size -= t0 - block - 2;
>> +t1 = find_fp_timing_terminator(t0 + 2, size);
>
> Need to NULL check t0 before using it.
>
> I'll still keep trying to wrap my head around the below stuff.

I guess I'll try again tomorrow with fresh eyes, but I have a hard time
following what's going on here. x_X

BR,
Jani.

>
>> +
>> +if (!t0 || !t1)
>> +return NULL;
>> +
>> +size = t1 - t0;
>> +if (size * 16 > block_size)
>> +return NULL;
>> +
>> +ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
>> +if (!ptrs_block)
>> +return NULL;
>> +
>> +*(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
>> +*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
>> +ptrs = ptrs_block + 3;
>> +
>> +table_size = sizeof(struct lvds_pnp_id);
>> +size = make_lfp_data_ptr(>ptr[0].panel_pnp_id, table_size, size);
>> +
>> +table_size = sizeof(struct lvds_dvo_timing);
>> +size = make_lfp_data_ptr(>ptr[0].dvo_timing, table_size, size);
>> +
>> +table_size = t0 - block + 2;
>> +size = make_lfp_data_ptr(>ptr[0].fp_timing, table_size, size);
>> +
>> +if (ptrs->ptr[0].fp_timing.table_size)
>> +ptrs->lvds_entries++;
>> +if (ptrs->ptr[0].dvo_timing.table_size)
>> +ptrs->lvds_entries++;
>> +if (ptrs->ptr[0].panel_pnp_id.table_size)
>> +ptrs->lvds_entries++;
>> +
>> +if (size != 0 || ptrs->lvds_entries != 3) {
>> +kfree(ptrs);
>> +return NULL;
>> +}
>> +
>> +size = t1 - t0;
>> +for (i = 1; i < 16; i++) {
>> +next_lfp_data_ptr(>ptr[i].fp_timing, 
>> >ptr[i-1].fp_timing, size);
>> +next_lfp_data_ptr(>ptr[i].dvo_timing, 
>> >ptr[i-1].dvo_timing, size);
>> +next_lfp_data_ptr(>ptr[i].panel_pnp_id, 
>> 

Re: [Intel-gfx] [PATCH v2 22/22] drm/i915/bios: Dump PNPID and panel name

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Dump the panel PNPID and name from the VBT.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 24 +++
>  1 file changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index d561551d6324..953526a7dc5d 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -25,6 +25,7 @@
>   *
>   */
>  
> +#include 
>  #include 
>  
>  #include "display/intel_display.h"
> @@ -597,6 +598,19 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
>   return NULL;
>  }
>  
> +static void dump_pnp_id(struct drm_i915_private *i915,
> + const struct lvds_pnp_id *pnp_id,
> + const char *name)
> +{
> + u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);

Might just add the __be16 in the struct member?

Reviewed-by: Jani Nikula 

> + char vend[4];
> +
> + drm_dbg_kms(>drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, 
> week: %d, year: %d\n",
> + name, drm_edid_decode_mfg_id(mfg_name, vend),
> + pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
> + pnp_id->mfg_week, pnp_id->mfg_year + 1990);
> +}
> +
>  static int pnp_id_panel_type(struct drm_i915_private *i915,
>const struct edid *edid)
>  {
> @@ -615,6 +629,8 @@ static int pnp_id_panel_type(struct drm_i915_private 
> *i915,
>   edid_id_nodate.mfg_week = 0;
>   edid_id_nodate.mfg_year = 0;
>  
> + dump_pnp_id(i915, edid_id, "EDID");
> +
>   ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
>   if (!ptrs)
>   return -1;
> @@ -802,6 +818,7 @@ parse_lfp_data(struct drm_i915_private *i915)
>   const struct bdb_lvds_lfp_data *data;
>   const struct bdb_lvds_lfp_data_tail *tail;
>   const struct bdb_lvds_lfp_data_ptrs *ptrs;
> + const struct lvds_pnp_id *pnp_id;
>   int panel_type = i915->vbt.panel_type;
>  
>   ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
> @@ -815,10 +832,17 @@ parse_lfp_data(struct drm_i915_private *i915)
>   if (!i915->vbt.lfp_lvds_vbt_mode)
>   parse_lfp_panel_dtd(i915, data, ptrs);
>  
> + pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
> + dump_pnp_id(i915, pnp_id, "Panel");
> +
>   tail = get_lfp_data_tail(data, ptrs);
>   if (!tail)
>   return;
>  
> + drm_dbg_kms(>drm, "Panel name: %.*s\n",
> + (int)sizeof(tail->panel_name[0].name),
> + tail->panel_name[panel_type].name);
> +
>   if (i915->vbt.version >= 188) {
>   i915->vbt.seamless_drrs_min_refresh_rate =
>   tail->seamless_drrs_min_refresh_rate[panel_type];

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.BAT: failure for Inherit GPU scheduling priority from process nice (rev2)

[Patchwork]

== Series Details ==

Series: Inherit GPU scheduling priority from process nice (rev2)
URL   : https://patchwork.freedesktop.org/series/102203/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22816


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22816 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22816, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/index.html

Participating hosts (47 -> 49)
--

  Additional (5): bat-adlm-1 bat-adlp-4 bat-hsw-1 fi-pnv-d510 bat-rpls-2 
  Missing(3): fi-bsw-cyan shard-tglu fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22816:

### CI changes ###

 Possible regressions 

  * boot:
- fi-pnv-d510:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-pnv-d510/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-hsw-4770:NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-hsw-4770/igt@gem_lmem_swapp...@parallel-random-engines.html

  
 Warnings 

  * igt@gem_lmem_swapping@basic:
- fi-skl-guc: [FAIL][4] ([i915#4547]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-skl-guc/igt@gem_lmem_swapp...@basic.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-skl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@runner@aborted:
- fi-rkl-guc: [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-guc/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-rkl-guc/igt@run...@aborted.html
- fi-adl-ddr5:[FAIL][8] ([i915#4312]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-adl-ddr5/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-adl-ddr5/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_busy@busy:
- {bat-adlp-6}:   NOTRUN -> [SKIP][12] +146 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-adlp-6/igt@gem_b...@busy.html

  * igt@gem_lmem_swapping@basic:
- {bat-rpls-2}:   NOTRUN -> [SKIP][13] +146 similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-rpls-2/igt@gem_lmem_swapp...@basic.html
- {bat-dg2-9}:NOTRUN -> [SKIP][14]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-dg2-9/igt@gem_lmem_swapp...@basic.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- {bat-jsl-2}:NOTRUN -> [SKIP][15] +146 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-jsl-2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-a:
- {bat-adlm-1}:   NOTRUN -> [SKIP][16] +77 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-adlm-1/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-a.html

  * igt@runner@aborted:
- {bat-adls-5}:   [FAIL][17] ([i915#4312]) -> [FAIL][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/bat-adls-5/igt@run...@aborted.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-adls-5/igt@run...@aborted.html
- {bat-hsw-1}:NOTRUN -> [FAIL][19]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-hsw-1/igt@run...@aborted.html
- {bat-jsl-1}:[FAIL][20] ([i915#4312]) -> [FAIL][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/bat-jsl-1/igt@run...@aborted.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22816/bat-jsl-1/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22816 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- 

Re: [Intel-gfx] [PATCH v2 21/22] drm/edid: Extract drm_edid_decode_mfg_id()

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Make the PNPID decoding available for other users.
>
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  include/drm/drm_edid.h | 21 +
>  1 file changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index b7e170584000..5e9d7fcda8e7 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -508,6 +508,22 @@ static inline u8 drm_eld_get_conn_type(const uint8_t 
> *eld)
>   return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_CONN_TYPE_MASK;
>  }
>  
> +/**
> + * drm_edid_decode_mfg_id - Decode the manufacturer ID
> + * @mfg_id: The manufacturer ID
> + * @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0'
> + * termination
> + */
> +static inline const char *drm_edid_decode_mfg_id(u16 mfg_id, char vend[4])
> +{
> + vend[0] = '@' + ((mfg_id >> 10) & 0x1f);
> + vend[1] = '@' + ((mfg_id >> 5) & 0x1f);
> + vend[2] = '@' + ((mfg_id >> 0) & 0x1f);
> + vend[3] = '\0';
> +
> + return vend;
> +}
> +
>  /**
>   * drm_edid_encode_panel_id - Encode an ID for matching against 
> drm_edid_get_panel_id()
>   * @vend_chr_0: First character of the vendor string.
> @@ -548,10 +564,7 @@ static inline u8 drm_eld_get_conn_type(const uint8_t 
> *eld)
>  static inline void drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 
> *product_id)
>  {
>   *product_id = (u16)(panel_id & 0x);
> - vend[0] = '@' + ((panel_id >> 26) & 0x1f);
> - vend[1] = '@' + ((panel_id >> 21) & 0x1f);
> - vend[2] = '@' + ((panel_id >> 16) & 0x1f);
> - vend[3] = '\0';
> + drm_edid_decode_mfg_id(panel_id >> 16, vend);
>  }
>  
>  bool drm_probe_ddc(struct i2c_adapter *adapter);

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 20/22] drm/i915: Respect VBT seamless DRRS min refresh rate

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Make sure our choice of downclock mode respects the VBT
> seameless DRRS min refresh rate limit.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_panel.c | 10 +++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c 
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 03398feb6676..35d8676438a3 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -75,13 +75,17 @@ const struct drm_display_mode *
>  intel_panel_downclock_mode(struct intel_connector *connector,
>  const struct drm_display_mode *adjusted_mode)
>  {
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
>   const struct drm_display_mode *fixed_mode, *best_mode = NULL;
> - int vrefresh = drm_mode_vrefresh(adjusted_mode);
> + int min_vrefresh = i915->vbt.seamless_drrs_min_refresh_rate;

Just remembered the rabbit hole goes deeper with dual eDP and supporting
multiple copies of all the panel type specific stuff... ;)

> + int max_vrefresh = drm_mode_vrefresh(adjusted_mode);
>  
>   /* pick the fixed_mode with the lowest refresh rate */
>   list_for_each_entry(fixed_mode, >panel.fixed_modes, head) {
> - if (drm_mode_vrefresh(fixed_mode) < vrefresh) {
> - vrefresh = drm_mode_vrefresh(fixed_mode);
> + int vrefesh = drm_mode_vrefresh(fixed_mode);

*vrefresh

Reviewed-by: Jani Nikula 


> +
> + if (vrefesh >= min_vrefresh && vrefesh < max_vrefresh) {
> + max_vrefresh = vrefesh;
>   best_mode = fixed_mode;
>   }
>   }

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/4] drm/fourcc: Introduce format modifiers for DG2 render and media compression

[Juha-Pekka Heikkilä]

Seems my first mail didn't come through so here's second time for this patch:

Reviewed-by: Juha-Pekka Heikkila 

On Mon, Apr 4, 2022 at 4:39 PM Imre Deak  wrote:
>
> From: Matt Roper 
>
> The render/media engines on DG2 unify render compression and media
> compression into a single format for the first time, using the Tile 4
> layout for main surfaces. The compression algorithm is different from
> any previous platform and the display engine must still be configured to
> decompress either a render or media compressed surface; as such, we
> need new RC and MC framebuffer modifiers to represent buffers in this
> format.
>
> v2: Clarify modifier layout description.
>
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Matt Roper 
> Signed-off-by: Imre Deak 
> Acked-by: Nanley Chery 
> ---
>  include/uapi/drm/drm_fourcc.h | 22 ++
>  1 file changed, 22 insertions(+)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index b73fe6797fc37..4a5117715db3c 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -583,6 +583,28 @@ extern "C" {
>   */
>  #define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9)
>
> +/*
> + * Intel color control surfaces (CCS) for DG2 render compression.
> + *
> + * The main surface is Tile 4 and at plane index 0. The CCS data is stored
> + * outside of the GEM object in a reserved memory area dedicated for the
> + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
> + * main surface pitch is required to be a multiple of four Tile 4 widths.
> + */
> +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10)
> +
> +/*
> + * Intel color control surfaces (CCS) for DG2 media compression.
> + *
> + * The main surface is Tile 4 and at plane index 0. For semi-planar formats
> + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
> + * 0 and 1, respectively. The CCS for all planes are stored outside of the
> + * GEM object in a reserved memory area dedicated for the storage of the
> + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface
> + * pitch is required to be a multiple of four Tile 4 widths.
> + */
> +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11)
> +
>  /*
>   * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
>   *
> --
> 2.30.2
>

Re: [Intel-gfx] [PATCH v2 19/22] drm/i915/bios: Parse the seamless DRRS min refresh rate

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Extract the seamless DRRS min refresh rate from the VBT.
>
> v2: Do a version check
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 9 -
>  drivers/gpu/drm/i915/i915_drv.h   | 1 +
>  2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index cfdfe91d4ccf..d561551d6324 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -802,6 +802,7 @@ parse_lfp_data(struct drm_i915_private *i915)
>   const struct bdb_lvds_lfp_data *data;
>   const struct bdb_lvds_lfp_data_tail *tail;
>   const struct bdb_lvds_lfp_data_ptrs *ptrs;
> + int panel_type = i915->vbt.panel_type;
>  
>   ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
>   if (!ptrs)
> @@ -818,7 +819,13 @@ parse_lfp_data(struct drm_i915_private *i915)
>   if (!tail)
>   return;
>  
> - (void)tail;
> + if (i915->vbt.version >= 188) {
> + i915->vbt.seamless_drrs_min_refresh_rate =
> + tail->seamless_drrs_min_refresh_rate[panel_type];
> + drm_dbg_kms(>drm,
> + "Seamless DRRS min refresh rate: %d Hz\n",
> + i915->vbt.seamless_drrs_min_refresh_rate);
> + }
>  }
>  
>  static void
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9274417cd87a..7b6858651420 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -327,6 +327,7 @@ struct intel_vbt_data {
>   bool override_afc_startup;
>   u8 override_afc_startup_val;
>  
> + u8 seamless_drrs_min_refresh_rate;
>   enum drrs_type drrs_type;
>  
>   struct {

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v4 18/22] drm/i915/bios: Determine panel type via PNPID match

[Jani Nikula]

On Wed, 06 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Apparently when the VBT panel_type==0xff we should trawl through
> the PNPID table and check for a match against the EDID. If a
> match is found the index gives us the panel_type.
>
> Tried to match the Windows behaviour here with first looking
> for an exact match, and if one isn't found we fall back to
> looking for a match w/o the mfg year/week.

Does Windows also probe the EDID first, or does it use some side channel
to use the GOP probed EDID? ISTR there's something in the EFI interface
for this, but never looked deeper.

>
> v2: Rebase due to vlv_dsi changes
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5545
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c|  2 +-
>  drivers/gpu/drm/i915/display/intel_bios.c | 82 ---
>  drivers/gpu/drm/i915/display/intel_bios.h |  4 +-
>  drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
>  drivers/gpu/drm/i915/display/intel_lvds.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_sdvo.c |  2 +-
>  drivers/gpu/drm/i915/display/vlv_dsi.c|  2 +-
>  7 files changed, 82 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 688176d4a54a..49715485a3a6 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -2048,7 +2048,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
>   /* attach connector to encoder */
>   intel_connector_attach_encoder(intel_connector, encoder);
>  
> - intel_bios_init_panel(dev_priv);
> + intel_bios_init_panel(dev_priv, NULL);
>  
>   mutex_lock(>mode_config.mutex);
>   intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 0e76c554581a..4c0680356134 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -582,6 +582,14 @@ get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
>   return (const void *)data + ptrs->ptr[index].fp_timing.offset;
>  }
>  
> +static const struct lvds_pnp_id *
> +get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
> + const struct bdb_lvds_lfp_data_ptrs *ptrs,
> + int index)
> +{
> + return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
> +}
> +
>  static const struct bdb_lvds_lfp_data_tail *
>  get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
> const struct bdb_lvds_lfp_data_ptrs *ptrs)
> @@ -592,6 +600,52 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
>   return NULL;
>  }
>  
> +static int pnp_id_panel_type(struct drm_i915_private *i915,
> +  const struct edid *edid)
> +{
> + const struct bdb_lvds_lfp_data *data;
> + const struct bdb_lvds_lfp_data_ptrs *ptrs;
> + const struct lvds_pnp_id *edid_id;
> + struct lvds_pnp_id edid_id_nodate;
> + int i, best = -1;
> +
> + if (!edid)
> + return -1;
> +
> + edid_id = (const void *)>mfg_id[0];
> +
> + edid_id_nodate = *edid_id;
> + edid_id_nodate.mfg_week = 0;
> + edid_id_nodate.mfg_year = 0;
> +
> + ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
> + if (!ptrs)
> + return -1;
> +
> + data = find_section(i915, BDB_LVDS_LFP_DATA);
> + if (!data)
> + return -1;
> +
> + for (i = 0; i < 16; i++) {
> + const struct lvds_pnp_id *vbt_id =
> + get_lvds_pnp_id(data, ptrs, i);
> +
> + /* full match? */
> + if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
> + return i;
> +
> + /*
> +  * Accept a match w/o date if no full match is found,
> +  * and the VBT entry does not specify a date.
> +  */
> + if (best < 0 &&
> + !memcmp(vbt_id, _id_nodate, sizeof(*vbt_id)))
> + best = i;
> + }
> +
> + return best;
> +}
> +
>  static int vbt_panel_type(struct drm_i915_private *i915)
>  {
>   const struct bdb_lvds_options *lvds_options;
> @@ -600,7 +654,8 @@ static int vbt_panel_type(struct drm_i915_private *i915)
>   if (!lvds_options)
>   return -1;
>  
> - if (lvds_options->panel_type > 0xf) {
> + if (lvds_options->panel_type > 0xf &&
> + lvds_options->panel_type != 0xff) {
>   drm_dbg_kms(>drm, "Invalid VBT panel type 0x%x\n",
>   lvds_options->panel_type);
>   return -1;
> @@ -612,10 +667,12 @@ static int vbt_panel_type(struct drm_i915_private *i915)
>  enum panel_type {
>   PANEL_TYPE_OPREGION,
>   PANEL_TYPE_VBT,
> + PANEL_TYPE_PNPID,
>   PANEL_TYPE_FALLBACK,
>  };
>  
> -static int get_panel_type(struct 

Re: [Intel-gfx] [PATCH v2 17/22] drm/i915/bios: Refactor panel_type code

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Make the panel type code a bit more abstract along the
> lines of the source of the panel type. For the moment
> we have three classes: OpRegion, VBT, fallback.
> Well introduce another one shortly.
>
> We can now also print out all the different panel types,
> and indicate which one we ultimately selected. Could help
> with debugging.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 47 ---
>  1 file changed, 34 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 26839263abf0..feef5aa97398 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -606,25 +606,46 @@ static int vbt_panel_type(struct drm_i915_private *i915)
>   return lvds_options->panel_type;
>  }
>  
> +enum panel_type {
> + PANEL_TYPE_OPREGION,
> + PANEL_TYPE_VBT,
> + PANEL_TYPE_FALLBACK,
> +};
> +
>  static int get_panel_type(struct drm_i915_private *i915)
>  {
> - int ret;
> + struct {
> + const char *name;
> + int panel_type;
> + } panel_types[] = {
> + [PANEL_TYPE_OPREGION] = { .name = "OpRegion", .panel_type = -1, 
> },
> + [PANEL_TYPE_VBT] = { .name = "VBT", .panel_type = -1, },
> + [PANEL_TYPE_FALLBACK] = { .name = "fallback", .panel_type = 0, 
> },
> + };
> + int i;
>  
> - ret = intel_opregion_get_panel_type(i915);
> - if (ret >= 0) {
> - drm_WARN_ON(>drm, ret > 0xf);
> - drm_dbg_kms(>drm, "Panel type: %d (OpRegion)\n", ret);
> - return ret;
> - }
> + panel_types[PANEL_TYPE_OPREGION].panel_type = 
> intel_opregion_get_panel_type(i915);
> + panel_types[PANEL_TYPE_VBT].panel_type = vbt_panel_type(i915);

I'd probably add a function pointer in the array, to be able to call
these nicely in the loop. Needs a static wrapper function for
intel_opregion_get_panel_type() in the follow-up to eat the edid
parameter, but I think it's worth it.

> +
> + for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
> + drm_WARN_ON(>drm, panel_types[i].panel_type > 0xf);

I know that's loud, but it's kind of annoying that the out of bounds
value still goes through here.

>  
> - ret = vbt_panel_type(i915);
> - if (ret >= 0) {
> - drm_WARN_ON(>drm, ret > 0xf);
> - drm_dbg_kms(>drm, "Panel type: %d (VBT)\n", ret);
> - return ret;
> + if (panel_types[i].panel_type >= 0)
> + drm_dbg_kms(>drm, "Panel type (%s): %d\n",
> + panel_types[i].name, 
> panel_types[i].panel_type);
>   }
>  
> - return 0; /* fallback */
> + if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
> + i = PANEL_TYPE_OPREGION;
> + else if (panel_types[PANEL_TYPE_VBT].panel_type >= 0)
> + i = PANEL_TYPE_VBT;
> + else
> + i = PANEL_TYPE_FALLBACK;

At this stage, we could set this in the loop too, but dunno how
complicated that gets with the pnpid match rules.

Reviewed-by: Jani Nikula 

> +
> + drm_dbg_kms(>drm, "Selected panel type (%s): %d\n",
> + panel_types[i].name, panel_types[i].panel_type);
> +
> + return panel_types[i].panel_type;
>  }
>  
>  /* Parse general panel options */

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/edid: low level EDID block read refactoring etc. (rev2)

[Patchwork]

== Series Details ==

Series: drm/edid: low level EDID block read refactoring etc. (rev2)
URL   : https://patchwork.freedesktop.org/series/102329/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22815


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22815 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22815, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/index.html

Participating hosts (47 -> 48)
--

  Additional (4): bat-hsw-1 bat-rpls-2 fi-bwr-2160 bat-adlp-4 
  Missing(3): fi-bsw-cyan shard-tglu fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22815:

### CI changes ###

 Possible regressions 

  * boot:
- fi-bwr-2160:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-hsw-4770:NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-hsw-4770/igt@gem_lmem_swapp...@parallel-random-engines.html

  
 Warnings 

  * igt@runner@aborted:
- fi-rkl-11600:   [FAIL][4] ([i915#4312]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-11600/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-rkl-11600/igt@run...@aborted.html
- fi-kbl-7500u:   [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7500u/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-kbl-7500u/igt@run...@aborted.html
- fi-bxt-dsi: [FAIL][8] ([i915#4312]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-bxt-dsi/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-bxt-dsi/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_lmem_swapping@basic:
- {bat-rpls-2}:   NOTRUN -> [SKIP][12] +146 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/bat-rpls-2/igt@gem_lmem_swapp...@basic.html
- {fi-jsl-1}: [FAIL][13] -> [SKIP][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@gem_lmem_swapp...@basic.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-jsl-1/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- {fi-jsl-1}: NOTRUN -> [FAIL][15]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-jsl-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- {bat-jsl-2}:NOTRUN -> [SKIP][16] +146 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/bat-jsl-2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html

  * igt@runner@aborted:
- {bat-hsw-1}:NOTRUN -> [FAIL][17]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/bat-hsw-1/igt@run...@aborted.html
- {fi-ehl-2}: [FAIL][18] ([i915#4312]) -> [FAIL][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-ehl-2/igt@run...@aborted.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-ehl-2/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22815 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][20] ([fdo#109271]) +146 similar 
issues
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22815/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   NOTRUN -> [SKIP][21] ([fdo#109271]) +145 similar 
issues
   [21]: 

Re: [Intel-gfx] [PATCH v2 16/22] drm/i915/bios: Extract get_panel_type()

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Pull the code to determine the panel type into its own set of
> sane functions.
>
> v2: rebase
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 58 +++
>  1 file changed, 39 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index da2b1932e10d..26839263abf0 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -589,6 +589,44 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
>   return NULL;
>  }
>  
> +static int vbt_panel_type(struct drm_i915_private *i915)
> +{
> + const struct bdb_lvds_options *lvds_options;
> +
> + lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
> + if (!lvds_options)
> + return -1;
> +
> + if (lvds_options->panel_type > 0xf) {
> + drm_dbg_kms(>drm, "Invalid VBT panel type 0x%x\n",
> + lvds_options->panel_type);
> + return -1;
> + }
> +
> + return lvds_options->panel_type;
> +}
> +
> +static int get_panel_type(struct drm_i915_private *i915)
> +{
> + int ret;
> +
> + ret = intel_opregion_get_panel_type(i915);
> + if (ret >= 0) {
> + drm_WARN_ON(>drm, ret > 0xf);
> + drm_dbg_kms(>drm, "Panel type: %d (OpRegion)\n", ret);
> + return ret;
> + }
> +
> + ret = vbt_panel_type(i915);
> + if (ret >= 0) {
> + drm_WARN_ON(>drm, ret > 0xf);
> + drm_dbg_kms(>drm, "Panel type: %d (VBT)\n", ret);
> + return ret;
> + }
> +
> + return 0; /* fallback */
> +}
> +
>  /* Parse general panel options */
>  static void
>  parse_panel_options(struct drm_i915_private *i915)
> @@ -596,7 +634,6 @@ parse_panel_options(struct drm_i915_private *i915)
>   const struct bdb_lvds_options *lvds_options;
>   int panel_type;
>   int drrs_mode;
> - int ret;
>  
>   lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
>   if (!lvds_options)
> @@ -604,24 +641,7 @@ parse_panel_options(struct drm_i915_private *i915)
>  
>   i915->vbt.lvds_dither = lvds_options->pixel_dither;
>  
> - ret = intel_opregion_get_panel_type(i915);
> - if (ret >= 0) {
> - drm_WARN_ON(>drm, ret > 0xf);
> - panel_type = ret;
> - drm_dbg_kms(>drm, "Panel type: %d (OpRegion)\n",
> - panel_type);
> - } else {
> - if (lvds_options->panel_type > 0xf) {
> - drm_dbg_kms(>drm,
> - "Invalid VBT panel type 0x%x, assuming 0\n",
> - lvds_options->panel_type);
> - panel_type = 0;
> - } else {
> - panel_type = lvds_options->panel_type;
> - drm_dbg_kms(>drm, "Panel type: %d (VBT)\n",
> - panel_type);
> - }
> - }
> + panel_type = get_panel_type(i915);
>  
>   i915->vbt.panel_type = panel_type;

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 18/19] Revert "fbdev: Prevent probing generic drivers if a FB is already registered"

[Greg KH]

On Tue, Apr 05, 2022 at 07:29:22PM +0200, Daniel Vetter wrote:
> On Tue, 5 Apr 2022 at 18:45, Greg KH  wrote:
> >
> > On Tue, Apr 05, 2022 at 06:12:59PM +0200, Daniel Vetter wrote:
> > > On Tue, Apr 05, 2022 at 03:33:17PM +0200, Greg KH wrote:
> > > > On Tue, Apr 05, 2022 at 03:24:40PM +0200, Geert Uytterhoeven wrote:
> > > > > Hi Daniel,
> > > > >
> > > > > On Tue, Apr 5, 2022 at 1:48 PM Daniel Vetter  wrote:
> > > > > > On Tue, 5 Apr 2022 at 11:52, Javier Martinez Canillas
> > > > > >  wrote:
> > > > > > > On 4/5/22 11:24, Daniel Vetter wrote:
> > > > > > > > On Tue, 5 Apr 2022 at 11:19, Javier Martinez Canillas
> > > > > > > >> This is how I think that work, please let me know if you see 
> > > > > > > >> something
> > > > > > > >> wrong in my logic:
> > > > > > > >>
> > > > > > > >> 1) A PCI device of OF device is registered for the GPU, this 
> > > > > > > >> attempt to
> > > > > > > >>match a registered driver but no driver was registered that 
> > > > > > > >> match yet.
> > > > > > > >>
> > > > > > > >> 2) The efifb driver is built-in, will be initialized according 
> > > > > > > >> to the link
> > > > > > > >>order of the objects under drivers/video and the fbdev 
> > > > > > > >> driver is registered.
> > > > > > > >>
> > > > > > > >>There is no platform device or PCI/OF device registered 
> > > > > > > >> that matches.
> > > > > > > >>
> > > > > > > >> 3) The DRM driver is built-in, will be initialized according 
> > > > > > > >> to the link
> > > > > > > >>order of the objects under drivers/gpu and the DRM driver 
> > > > > > > >> is registered.
> > > > > > > >>
> > > > > > > >>This matches the device registered in (1) and the DRM 
> > > > > > > >> driver probes.
> > > > > > > >>
> > > > > > > >> 4) The DRM driver .probe kicks out any conflicting DRM drivers 
> > > > > > > >> and pdev
> > > > > > > >>before registering the DRM device.
> > > > > > > >>
> > > > > > > >>There are no conflicting drivers or platform device at this 
> > > > > > > >> point.
> > > > > > > >>
> > > > > > > >> 5) Latter at some point the drivers/firmware/sysfb.c init 
> > > > > > > >> function is
> > > > > > > >>executed, and this registers a platform device for the 
> > > > > > > >> generic fb.
> > > > > > > >>
> > > > > > > >>This device matches the efifb driver registered in (2) and 
> > > > > > > >> the fbdev
> > > > > > > >>driver probes.
> > > > > > > >>
> > > > > > > >>Since that happens *after* the DRM driver already matched, 
> > > > > > > >> probed
> > > > > > > >>and registered the DRM device, that is a bug and what the 
> > > > > > > >> reverted
> > > > > > > >>patch worked around.
> > > > > > > >>
> > > > > > > >> So we need to prevent (5) if (1) and (3) already happened. 
> > > > > > > >> Having a flag
> > > > > > > >> set in the fbdev core somewhere when 
> > > > > > > >> remove_conflicting_framebuffers()
> > > > > > > >> is called could be a solution indeed.
> > > > > > > >>
> > > > > > > >> That is, the fbdev core needs to know that a DRM driver 
> > > > > > > >> already probed
> > > > > > > >> and make register_framebuffer() fail if info->flag & 
> > > > > > > >> FBINFO_MISC_FIRMWARE
> > > > > > > >>
> > > > > > > >> I can attempt to write a patch for that.
> > > > > > > >
> > > > > > > > Ah yeah that could be an issue. I think the right fix is to 
> > > > > > > > replace
> > > > > > > > the platform dev unregister with a sysfb_unregister() function 
> > > > > > > > in
> > > > > > > > sysfb.c, which is synced with a common lock with the sysfb_init
> > > > > > > > function and a small boolean. I think I can type that up 
> > > > > > > > quickly for
> > > > > > > > v3.
> > > > > > >
> > > > > > > It's more complicated than that since sysfb is just *one* of the 
> > > > > > > several
> > > > > > > places where platform devices can be registered for video devices.
> > > > > > >
> > > > > > > For instance, the vga16fb driver registers its own platform 
> > > > > > > device in
> > > > > > > its module_init() function so that can also happen after the 
> > > > > > > conflicting
> > > > > > > framebuffers (and associated devices) were removed by a DRM 
> > > > > > > driver probe.
> > > > > > >
> > > > > > > I tried to minimize the issue for that particular driver with 
> > > > > > > commit:
> > > > > > >
> > > > > > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0499f419b76f
> > > > > > >
> > > > > > > But the point stands, it all boils down to the fact that you have 
> > > > > > > two
> > > > > > > different subsystems registering video drivers and they don't 
> > > > > > > know all
> > > > > > > about each other to take a proper decision.
> > > > > > >
> > > > > > > Right now the drm_aperture_remove_conflicting_framebuffers() call 
> > > > > > > signals
> > > > > > > in one direction from DRM to fbdev but there isn't a 
> > > > > > > communication in the
> > > > > > > other direction, from fbdev to DRM.
> > > > > > >
> > > > 

Re: [Intel-gfx] [PATCH v2 12/22] drm/i915/bios: Split VBT parsing to global vs. panel specific parts

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Parsing the panel specific data from VBT is currently happening
> too early. Split the whole thing into global vs. panel specific
> parts so that we can start doing the panel specific parsing at
> a later time.

Might want to mention panel_type here somewhere, that's basically the
split, right?

>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c| 50 +---
>  drivers/gpu/drm/i915/display/intel_bios.h|  1 +
>  drivers/gpu/drm/i915/display/intel_display.c |  1 +
>  3 files changed, 35 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 1a7f1aa79827..da2b1932e10d 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -723,6 +723,9 @@ parse_generic_dtd(struct drm_i915_private *i915)
>   struct drm_display_mode *panel_fixed_mode;
>   int num_dtd;
>  
> + if (i915->vbt.lfp_lvds_vbt_mode)
> + return;
> +
>   generic_dtd = find_section(i915, BDB_GENERIC_DTD);
>   if (!generic_dtd)
>   return;
> @@ -891,6 +894,9 @@ parse_sdvo_panel_data(struct drm_i915_private *i915)
>   struct drm_display_mode *panel_fixed_mode;
>   int index;
>  
> + if (i915->vbt.sdvo_lvds_vbt_mode)
> + return;
> +
>   index = i915->params.vbt_sdvo_panel_type;
>   if (index == -2) {
>   drm_dbg_kms(>drm,
> @@ -1419,6 +1425,9 @@ parse_mipi_config(struct drm_i915_private *i915)
>   int panel_type = i915->vbt.panel_type;
>   enum port port;
>  
> + if (i915->vbt.dsi.config)
> + return;
> +
>   /* parse MIPI blocks only if LFP type is MIPI */
>   if (!intel_bios_is_dsi_present(i915, ))
>   return;
> @@ -1739,6 +1748,9 @@ parse_mipi_sequence(struct drm_i915_private *i915)
>   u8 *data;
>   int index = 0;
>  
> + if (i915->vbt.dsi.data)
> + return;
> +

All of the above checks to (presumably) allow calling
intel_bios_init_panel() multiple times feel a bit out of place here. At
the very least need a mention in the commit message.

Regardless,

Reviewed-by: Jani Nikula 


>   /* Only our generic panel driver uses the sequence block. */
>   if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
>   return;
> @@ -2878,6 +2890,27 @@ void intel_bios_init(struct drm_i915_private *i915)
>   /* Grab useful general definitions */
>   parse_general_features(i915);
>   parse_general_definitions(i915);
> + parse_driver_features(i915);
> +
> + /* Depends on child device list */
> + parse_compression_parameters(i915);
> +
> +out:
> + if (!vbt) {
> + drm_info(>drm,
> +  "Failed to find VBIOS tables (VBT)\n");
> + init_vbt_missing_defaults(i915);
> + }
> +
> + /* Further processing on pre-parsed or generated child device data */
> + parse_sdvo_device_mapping(i915);
> + parse_ddi_ports(i915);
> +
> + kfree(oprom_vbt);
> +}
> +
> +void intel_bios_init_panel(struct drm_i915_private *i915)
> +{
>   parse_panel_options(i915);
>   /*
>* Older VBTs provided DTD information for internal displays through
> @@ -2892,29 +2925,12 @@ void intel_bios_init(struct drm_i915_private *i915)
>   parse_lfp_data(i915);
>   parse_lfp_backlight(i915);
>   parse_sdvo_panel_data(i915);
> - parse_driver_features(i915);
>   parse_panel_driver_features(i915);
>   parse_power_conservation_features(i915);
>   parse_edp(i915);
>   parse_psr(i915);
>   parse_mipi_config(i915);
>   parse_mipi_sequence(i915);
> -
> - /* Depends on child device list */
> - parse_compression_parameters(i915);
> -
> -out:
> - if (!vbt) {
> - drm_info(>drm,
> -  "Failed to find VBIOS tables (VBT)\n");
> - init_vbt_missing_defaults(i915);
> - }
> -
> - /* Further processing on pre-parsed or generated child device data */
> - parse_sdvo_device_mapping(i915);
> - parse_ddi_ports(i915);
> -
> - kfree(oprom_vbt);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.h 
> b/drivers/gpu/drm/i915/display/intel_bios.h
> index 4709c4d29805..c744d75fa435 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -230,6 +230,7 @@ struct mipi_pps_data {
>  } __packed;
>  
>  void intel_bios_init(struct drm_i915_private *dev_priv);
> +void intel_bios_init_panel(struct drm_i915_private *dev_priv);
>  void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
>  bool intel_bios_is_valid_vbt(const void *buf, size_t size);
>  bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/selftests: fixup min_alignment usage (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftests: fixup min_alignment 
usage (rev2)
URL   : https://patchwork.freedesktop.org/series/102295/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22814


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22814 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22814, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/index.html

Participating hosts (47 -> 36)
--

  Additional (1): fi-bwr-2160 
  Missing(12): shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 bat-dg2-8 
bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 fi-bdw-samus bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22814:

### CI changes ###

 Possible regressions 

  * boot:
- fi-bwr-2160:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-hsw-4770:NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-hsw-4770/igt@gem_lmem_swapp...@parallel-random-engines.html

  
 Warnings 

  * igt@runner@aborted:
- fi-kbl-x1275:   [FAIL][4] ([i915#4312]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-x1275/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-kbl-x1275/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
- {fi-jsl-1}: [FAIL][8] ([i915#4312]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-jsl-1/igt@run...@aborted.html
- {fi-ehl-2}: [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-ehl-2/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-ehl-2/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22814 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   NOTRUN -> [SKIP][12] ([fdo#109271]) +1 similar issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@fbdev@eof:
- fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][13] ([i915#5557])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-kbl-8809g/igt@fb...@eof.html

  * igt@gem_close_race@basic-process:
- fi-ivb-3770:NOTRUN -> [SKIP][14] ([fdo#109271]) +146 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-ivb-3770/igt@gem_close_r...@basic-process.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- fi-snb-2520m:   NOTRUN -> [SKIP][15] ([fdo#109271]) +151 similar 
issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-snb-2520m/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   NOTRUN -> [SKIP][16] ([fdo#109271]) +145 similar 
issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-snb-2520m:   NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-snb-2520m/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-cfl-8109u:   NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#5341])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22814/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-ivb-3770:NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#5341])
   [19]: 

Re: [Intel-gfx] [PATCH v2 11/22] drm/i915/bios: Split parse_driver_features() into two parts

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> We use the "driver features" block for two different kinds
> of data: global data, and per panel data. Split the function
> into two parts along that line so that we can start doing the
> parsing in two different locations.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 502d4c679198..1a7f1aa79827 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1097,6 +1097,16 @@ parse_driver_features(struct drm_i915_private *i915)
>   driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
>   i915->vbt.int_lvds_support = 0;
>   }
> +}
> +
> +static void
> +parse_panel_driver_features(struct drm_i915_private *i915)
> +{
> + const struct bdb_driver_features *driver;
> +
> + driver = find_section(i915, BDB_DRIVER_FEATURES);
> + if (!driver)
> + return;
>  
>   if (i915->vbt.version < 228) {
>   drm_dbg_kms(>drm, "DRRS State Enabled:%d\n",
> @@ -2883,6 +2893,7 @@ void intel_bios_init(struct drm_i915_private *i915)
>   parse_lfp_backlight(i915);
>   parse_sdvo_panel_data(i915);
>   parse_driver_features(i915);
> + parse_panel_driver_features(i915);
>   parse_power_conservation_features(i915);
>   parse_edp(i915);
>   parse_psr(i915);

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 10/22] drm/i915/bios: Assume panel_type==0 if the VBT has bogus data

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Just assume panel_type==0 always if the VBT gives us bogus data.
> We actually already do this everywhere else except in
> parse_panel_options() since we just leave i915->vbt.panel_type
> zeroed. This also seems to be what Windows does.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 11 ++-
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 01e0b12e2dea..502d4c679198 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -613,13 +613,14 @@ parse_panel_options(struct drm_i915_private *i915)
>   } else {
>   if (lvds_options->panel_type > 0xf) {
>   drm_dbg_kms(>drm,
> - "Invalid VBT panel type 0x%x\n",
> + "Invalid VBT panel type 0x%x, assuming 0\n",
>   lvds_options->panel_type);
> - return;
> + panel_type = 0;
> + } else {
> + panel_type = lvds_options->panel_type;
> + drm_dbg_kms(>drm, "Panel type: %d (VBT)\n",
> + panel_type);
>   }
> - panel_type = lvds_options->panel_type;
> - drm_dbg_kms(>drm, "Panel type: %d (VBT)\n",
> - panel_type);
>   }
>  
>   i915->vbt.panel_type = panel_type;

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v3 09/22] drm/i915/bios: Get access to the tail end of the LFP data block

[Jani Nikula]

On Wed, 06 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> We need to start parsing stuff from the tail end of the LFP data block.
> This is made awkward by the fact that the fp_timing table has variable
> size. So we must use a bit more finesse to get the tail end, and to
> make sure we allocate enough memory for it to make sure our struct
> representation fits.
>
> v2: Rebase due to the preallocation of BDB blocks
> v3: Rebase due to min_size WARN relocation
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 39 ++-
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h | 17 
>  2 files changed, 55 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index d32091dad1b0..9a14d55b636c 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -188,7 +188,7 @@ static const struct {
>   { .section_id = BDB_LVDS_LFP_DATA_PTRS,
> .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
>   { .section_id = BDB_LVDS_LFP_DATA,
> -   .min_size = sizeof(struct bdb_lvds_lfp_data), },
> +   .min_size = 0, /* special case */ },
>   { .section_id = BDB_LVDS_BACKLIGHT,
> .min_size = sizeof(struct bdb_lfp_backlight_data), },
>   { .section_id = BDB_LFP_POWER,
> @@ -203,6 +203,23 @@ static const struct {
> .min_size = sizeof(struct bdb_generic_dtd), },
>  };
>  
> +static size_t lfp_data_min_size(struct drm_i915_private *i915)
> +{
> + const struct bdb_lvds_lfp_data_ptrs *ptrs;
> + size_t size;
> +
> + ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);

This depends on that block having been initialized before. Maybe the
ordering requirement deserves a comment in bdb_blocks[].

> + if (!ptrs)
> + return 0;
> +
> + size = sizeof(struct bdb_lvds_lfp_data);

Basically that and the struct definition are bogus, though? They assume
a rigid structure. It might be true for some specific platforms, but
generally likely not.

Or we could of course just add a comment about that in intel_vbt_defs.h.

> + if (ptrs->panel_name.table_size)
> + size = max(size, ptrs->panel_name.offset +
> +sizeof(struct bdb_lvds_lfp_data_tail));
> +
> + return size;
> +}
> +
>  static bool validate_lfp_data_ptrs(const void *bdb,
>  const struct bdb_lvds_lfp_data_ptrs *ptrs)
>  {
> @@ -492,6 +509,9 @@ static void init_bdb_blocks(struct drm_i915_private *i915,
>   enum bdb_block_id section_id = bdb_blocks[i].section_id;
>   size_t min_size = bdb_blocks[i].min_size;
>  
> + if (section_id == BDB_LVDS_LFP_DATA)
> + min_size = lfp_data_min_size(i915);

Nitpick, could also leave the "default" min size in bdb_blocks[], have
lfp_data_min_size() return the other value or 0, and have the max()
here. *shrug*

> +
>   init_bdb_block(i915, bdb, section_id, min_size);
>   }
>  }
> @@ -562,6 +582,16 @@ get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
>   return (const void *)data + ptrs->ptr[index].fp_timing.offset;
>  }
>  
> +static const struct bdb_lvds_lfp_data_tail *
> +get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
> +   const struct bdb_lvds_lfp_data_ptrs *ptrs)
> +{
> + if (ptrs->panel_name.table_size)
> + return (const void *)data + ptrs->panel_name.offset;
> + else
> + return NULL;
> +}
> +
>  /* Parse general panel options */
>  static void
>  parse_panel_options(struct drm_i915_private *i915)
> @@ -666,6 +696,7 @@ static void
>  parse_lfp_data(struct drm_i915_private *i915)
>  {
>   const struct bdb_lvds_lfp_data *data;
> + const struct bdb_lvds_lfp_data_tail *tail;
>   const struct bdb_lvds_lfp_data_ptrs *ptrs;
>  
>   ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
> @@ -678,6 +709,12 @@ parse_lfp_data(struct drm_i915_private *i915)
>  
>   if (!i915->vbt.lfp_lvds_vbt_mode)
>   parse_lfp_panel_dtd(i915, data, ptrs);
> +
> + tail = get_lfp_data_tail(data, ptrs);
> + if (!tail)
> + return;
> +
> + (void)tail;

Mmmkay.

Reviewed-by: Jani Nikula 

>  }
>  
>  static void
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
> b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index e4a11c3e3f3e..64551d206aeb 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -783,6 +783,23 @@ struct lvds_lfp_panel_name {
>   u8 name[13];
>  } __packed;
>  
> +struct lvds_lfp_black_border {
> + u8 top; /*  227 */
> + u8 bottom; /*  227 */
> + u8 left; /* 238 */
> + u8 right; /* 238 */
> +} __packed;
> +
> +struct bdb_lvds_lfp_data_tail {
> + struct lvds_lfp_panel_name panel_name[16]; /* 156-163? */
> + u16 scaling_enable; /* 187 

Re: [Intel-gfx] [PATCH 1/2] drm/i915: fix broken build

[Matthew Auld]

On 07/04/2022 17:49, Christian König wrote:

Am 07.04.22 um 18:45 schrieb Matthew Auld:

I guess this was missed in the conversion or something.

Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld 
Cc: Christian König 
Cc: Daniel Vetter 


My best guess is that this is a rebase/merge conflict. I'm 100% sure 
i915 was compiling fine before I pushed the patch.


That was my thinking also, but building drm-misc-next I get the same error:

drivers/gpu/drm/i915/i915_deps.c: In function ‘i915_deps_add_resv’:
drivers/gpu/drm/i915/i915_deps.c:229:46: error: implicit conversion from 
‘enum ’ to ‘enum dma_resv_usage’ [-Werror=enum-conversion]

  229 | dma_resv_for_each_fence(, resv, true, fence) {
  |  ^~~~
./include/linux/dma-resv.h:297:47: note: in definition of macro 
‘dma_resv_for_each_fence’

  297 | for (dma_resv_iter_begin(cursor, obj, usage),   \
  |   ^



Anyway Reviewed-by: Christian König  for the 
series.


Thanks.



Thanks,
Christian.


---
  drivers/gpu/drm/i915/i915_deps.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_deps.c 
b/drivers/gpu/drm/i915/i915_deps.c

index 999210b37325..297b8e4e42ee 100644
--- a/drivers/gpu/drm/i915/i915_deps.c
+++ b/drivers/gpu/drm/i915/i915_deps.c
@@ -226,7 +226,7 @@ int i915_deps_add_resv(struct i915_deps *deps, 
struct dma_resv *resv,

  struct dma_fence *fence;
  dma_resv_assert_held(resv);
-    dma_resv_for_each_fence(, resv, true, fence) {
+    dma_resv_for_each_fence(, resv, dma_resv_usage_rw(true), 
fence) {

  int ret = i915_deps_add_dependency(deps, fence, ctx);
  if (ret)

Re: [Intel-gfx] [PATCH 2/2] drm/i915/buddy: sanity check the size

[Das, Nirmoy]

|Reviewed-by: Nirmoy Das |

On 4/7/2022 1:06 PM, Matthew Auld wrote:

Ensure we check that the size is compatible with the requested
page_size. For tiny objects that are automatically annotated with
TTM_PL_FLAG_CONTIGUOUS(since they fit within a single page), we
currently end up silently overriding the min_page_size, which ends up
hiding bugs elsewhere.

Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
  drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c 
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index 8e4e3f72c1ef..a5109548abc0 100644
--- a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
+++ b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
@@ -70,6 +70,7 @@ static int i915_ttm_buddy_man_alloc(struct 
ttm_resource_manager *man,
min_page_size = bo->page_alignment << PAGE_SHIFT;
  
  	GEM_BUG_ON(min_page_size < mm->chunk_size);

+   GEM_BUG_ON(!IS_ALIGNED(size, min_page_size));
  
  	if (place->fpfn + bman_res->base.num_pages != place->lpfn &&

place->flags & TTM_PL_FLAG_CONTIGUOUS) {

Re: [Intel-gfx] [PATCH v3 08/22] drm/i915/bios: Generate LFP data table pointers if the VBT lacks them

[Jani Nikula]

On Wed, 06 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Modern VBTs no longer contain the LFP data table pointers
> block (41). We are expecting to have one in order to be able
> to parse the LFP data block (42), so let's make one up.
>
> Since the fp_timing table has variable size we must somehow
> determine its size. Rather than just hardcode it we look for
> the terminator bytes (0x) to figure out where each table
> entry starts. dvo_timing, panel_pnp_id, and panel_name are
> expected to have fixed size.
>
> This has been observed on various machines, eg. TGL with BDB
> version 240, CML with BDB version 231, etc. The most recent
> VBT I've observed that still had block 41 had BDB version
> 228. So presumably the cutoff (if an exact cutoff even exists)
> is somewhere around BDB version 229-231.
>
> v2: kfree the thing we allocated, not the thing+3 bytes
> v3: Do the debugprint only if we found the LFP data block
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 136 +-
>  1 file changed, 135 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 8b118c54314d..d32091dad1b0 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -310,16 +310,146 @@ static bool fixup_lfp_data_ptrs(const void *bdb, void 
> *ptrs_block)
>   return validate_lfp_data_ptrs(bdb, ptrs);
>  }
>  
> +static const void *find_fp_timing_terminator(const u8 *data, int size)
> +{
> + int i;
> +
> + if (!data)
> + return NULL;
> +
> + for (i = 0; i < size - 1; i++) {
> + if (data[i] == 0xff && data[i+1] == 0xff)
> + return [i];
> + }
> +
> + return NULL;
> +}
> +
> +static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
> +  int table_size, int total_size)
> +{
> + if (total_size < table_size)
> + return total_size;
> +
> + table->table_size = table_size;
> + table->offset = total_size - table_size;
> +
> + return total_size - table_size;
> +}
> +
> +static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
> +   const struct lvds_lfp_data_ptr_table *prev,
> +   int size)
> +{
> + next->table_size = prev->table_size;
> + next->offset = prev->offset + size;
> +}
> +
> +static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
> + const void *bdb)
> +{
> + int i, size, table_size, block_size, offset;
> + const void *t0, *t1, *block;
> + struct bdb_lvds_lfp_data_ptrs *ptrs;
> + void *ptrs_block;
> +
> + block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
> + if (!block)
> + return NULL;
> +
> + drm_dbg_kms(>drm, "Generating LFP data table pointers\n");
> +
> + block_size = get_blocksize(block);
> +
> + size = block_size;
> + t0 = find_fp_timing_terminator(block, size);
> +
> + size -= t0 - block - 2;
> + t1 = find_fp_timing_terminator(t0 + 2, size);

Need to NULL check t0 before using it.

I'll still keep trying to wrap my head around the below stuff.

> +
> + if (!t0 || !t1)
> + return NULL;
> +
> + size = t1 - t0;
> + if (size * 16 > block_size)
> + return NULL;
> +
> + ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
> + if (!ptrs_block)
> + return NULL;
> +
> + *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
> + *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
> + ptrs = ptrs_block + 3;
> +
> + table_size = sizeof(struct lvds_pnp_id);
> + size = make_lfp_data_ptr(>ptr[0].panel_pnp_id, table_size, size);
> +
> + table_size = sizeof(struct lvds_dvo_timing);
> + size = make_lfp_data_ptr(>ptr[0].dvo_timing, table_size, size);
> +
> + table_size = t0 - block + 2;
> + size = make_lfp_data_ptr(>ptr[0].fp_timing, table_size, size);
> +
> + if (ptrs->ptr[0].fp_timing.table_size)
> + ptrs->lvds_entries++;
> + if (ptrs->ptr[0].dvo_timing.table_size)
> + ptrs->lvds_entries++;
> + if (ptrs->ptr[0].panel_pnp_id.table_size)
> + ptrs->lvds_entries++;
> +
> + if (size != 0 || ptrs->lvds_entries != 3) {
> + kfree(ptrs);
> + return NULL;
> + }
> +
> + size = t1 - t0;
> + for (i = 1; i < 16; i++) {
> + next_lfp_data_ptr(>ptr[i].fp_timing, 
> >ptr[i-1].fp_timing, size);
> + next_lfp_data_ptr(>ptr[i].dvo_timing, 
> >ptr[i-1].dvo_timing, size);
> + next_lfp_data_ptr(>ptr[i].panel_pnp_id, 
> >ptr[i-1].panel_pnp_id, size);
> + }
> +
> + size = t1 - t0;
> + table_size = sizeof(struct lvds_lfp_panel_name);
> +
> + if (16 * (size + table_size) <= block_size) {
> + ptrs->panel_name.table_size = table_size;
> +

[Intel-gfx] ✗ Fi.CI.BAT: failure for GSC support for XeHP SDV and DG2 platforms

[Patchwork]

== Series Details ==

Series: GSC support for XeHP SDV and DG2 platforms
URL   : https://patchwork.freedesktop.org/series/102339/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22813


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22813 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22813, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/index.html

Participating hosts (47 -> 45)
--

  Additional (3): bat-hsw-1 bat-rpls-2 bat-adlp-4 
  Missing(5): shard-tglu fi-bsw-cyan fi-cfl-8109u fi-blb-e6850 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22813:

### IGT changes ###

 Possible regressions 

  * igt@kms_chamelium@dp-crc-fast:
- bat-adlp-4: NOTRUN -> [SKIP][1] +146 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/bat-adlp-4/igt@kms_chamel...@dp-crc-fast.html

  
 Warnings 

  * igt@runner@aborted:
- fi-rkl-11600:   [FAIL][2] ([i915#4312]) -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-rkl-11600/igt@run...@aborted.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-rkl-11600/igt@run...@aborted.html
- fi-kbl-7500u:   [FAIL][4] ([i915#4312]) -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7500u/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-kbl-7500u/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][6] ([i915#4312]) -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-kbl-7567u/igt@run...@aborted.html
- fi-skl-guc: [FAIL][8] ([i915#4312] / [i915#5257]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-skl-guc/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-skl-guc/igt@run...@aborted.html
- fi-skl-6700k2:  [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-skl-6700k2/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-skl-6700k2/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_lmem_swapping@basic:
- {bat-rpls-2}:   NOTRUN -> [SKIP][12] +146 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/bat-rpls-2/igt@gem_lmem_swapp...@basic.html
- {bat-dg2-9}:NOTRUN -> [SKIP][13]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/bat-dg2-9/igt@gem_lmem_swapp...@basic.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- {bat-jsl-2}:NOTRUN -> [SKIP][14] +146 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/bat-jsl-2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html

  * igt@runner@aborted:
- {bat-hsw-1}:NOTRUN -> [FAIL][15]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/bat-hsw-1/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22813 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_close_race@basic-process:
- fi-ivb-3770:NOTRUN -> [SKIP][16] ([fdo#109271]) +146 similar 
issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-ivb-3770/igt@gem_close_r...@basic-process.html

  * igt@gem_exec_fence@basic-await:
- fi-bsw-nick:NOTRUN -> [SKIP][17] ([fdo#109271]) +151 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-bsw-nick/igt@gem_exec_fe...@basic-await.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][18] ([fdo#109271]) +146 similar 
issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-kbl-soraka/igt@kms_f...@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- bat-adlp-4: NOTRUN -> [SKIP][19] ([i915#5341])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/bat-adlp-4/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-bsw-nick:NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#5341])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22813/fi-bsw-nick/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-kbl-soraka:  

[Intel-gfx] [PATCH 2/2] drm/i915: fix i915_gem_object_wait_moving_fence

[Matthew Auld]

All of CI is just failing with the following, which prevents loading of
the module:

i915 :03:00.0: [drm] *ERROR* Scratch setup failed

Best guess is that this comes from the pin_map() for the scratch page,
which does an i915_gem_object_wait_moving_fence() somewhere. It looks
like this now calls into dma_resv_wait_timeout() which can return the
remaining timeout, leading to the caller thinking this is an error.

Fixes: 1d7f5e6c5240 ("drm/i915: drop bo->moving dependency")
Signed-off-by: Matthew Auld 
Cc: Christian König 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 2998d895a6b3..1c88d4121658 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -772,9 +772,14 @@ int i915_gem_object_get_moving_fence(struct 
drm_i915_gem_object *obj,
 int i915_gem_object_wait_moving_fence(struct drm_i915_gem_object *obj,
  bool intr)
 {
+   long ret;
+
assert_object_held(obj);
-   return dma_resv_wait_timeout(obj->base. resv, DMA_RESV_USAGE_KERNEL,
-intr, MAX_SCHEDULE_TIMEOUT);
+
+   ret = dma_resv_wait_timeout(obj->base. resv, DMA_RESV_USAGE_KERNEL,
+   intr, MAX_SCHEDULE_TIMEOUT);
+
+   return ret < 0 ? ret : 0;
 }
 
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
-- 
2.34.1

[Intel-gfx] [PATCH 1/2] drm/i915: fix broken build

[Matthew Auld]

I guess this was missed in the conversion or something.

Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld 
Cc: Christian König 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/i915/i915_deps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_deps.c b/drivers/gpu/drm/i915/i915_deps.c
index 999210b37325..297b8e4e42ee 100644
--- a/drivers/gpu/drm/i915/i915_deps.c
+++ b/drivers/gpu/drm/i915/i915_deps.c
@@ -226,7 +226,7 @@ int i915_deps_add_resv(struct i915_deps *deps, struct 
dma_resv *resv,
struct dma_fence *fence;
 
dma_resv_assert_held(resv);
-   dma_resv_for_each_fence(, resv, true, fence) {
+   dma_resv_for_each_fence(, resv, dma_resv_usage_rw(true), fence) {
int ret = i915_deps_add_dependency(deps, fence, ctx);
 
if (ret)
-- 
2.34.1

Re: [Intel-gfx] [PATCH v2 07/22] drm/i915/bios: Reorder panel DTD parsing

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Reorder things so that we can parse the entier LFP data block

*entire

> in one go. For now we just stick to parsing the DTD from it.
>
> Also fix the misleading comment about block 42 being deprecated.
> Only the DTD part is deprecated, the rest is still very much needed.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 62 ---
>  1 file changed, 32 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 799c1fe36b23..f90991cac438 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -488,25 +488,16 @@ parse_panel_options(struct drm_i915_private *i915)
>   }
>  }
>  
> -/* Try to find integrated panel timing data */
>  static void
> -parse_lfp_panel_dtd(struct drm_i915_private *i915)
> +parse_lfp_panel_dtd(struct drm_i915_private *i915,
> + const struct bdb_lvds_lfp_data *lvds_lfp_data,
> + const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
>  {
> - const struct bdb_lvds_lfp_data *lvds_lfp_data;
> - const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
>   const struct lvds_dvo_timing *panel_dvo_timing;
>   const struct lvds_fp_timing *fp_timing;
>   struct drm_display_mode *panel_fixed_mode;
>   int panel_type = i915->vbt.panel_type;
>  
> - lvds_lfp_data = find_section(i915, BDB_LVDS_LFP_DATA);
> - if (!lvds_lfp_data)
> - return;
> -
> - lvds_lfp_data_ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
> - if (!lvds_lfp_data_ptrs)
> - return;
> -
>   panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
>  lvds_lfp_data_ptrs,
>  panel_type);
> @@ -537,6 +528,24 @@ parse_lfp_panel_dtd(struct drm_i915_private *i915)
>   }
>  }
>  
> +static void
> +parse_lfp_data(struct drm_i915_private *i915)
> +{
> + const struct bdb_lvds_lfp_data *data;
> + const struct bdb_lvds_lfp_data_ptrs *ptrs;
> +
> + ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
> + if (!ptrs)
> + return;
> +
> + data = find_section(i915, BDB_LVDS_LFP_DATA);
> + if (!data)
> + return;
> +
> + if (!i915->vbt.lfp_lvds_vbt_mode)
> + parse_lfp_panel_dtd(i915, data, ptrs);

Could do an early return on i915->vbt.lfp_lvds_vbt_mode.

> +}
> +
>  static void
>  parse_generic_dtd(struct drm_i915_private *i915)
>  {
> @@ -615,23 +624,6 @@ parse_generic_dtd(struct drm_i915_private *i915)
>   i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
>  }
>  
> -static void
> -parse_panel_dtd(struct drm_i915_private *i915)
> -{
> - /*
> -  * Older VBTs provided provided DTD information for internal displays
> -  * through the "LFP panel DTD" block (42).  As of VBT revision 229,
> -  * that block is now deprecated and DTD information should be provided
> -  * via a newer "generic DTD" block (58).  Just to be safe, we'll
> -  * try the new generic DTD block first on VBT >= 229, but still fall
> -  * back to trying the old LFP block if that fails.
> -  */
> - if (i915->vbt.version >= 229)
> - parse_generic_dtd(i915);
> - if (!i915->vbt.lfp_lvds_vbt_mode)
> - parse_lfp_panel_dtd(i915);
> -}
> -
>  static void
>  parse_lfp_backlight(struct drm_i915_private *i915)
>  {
> @@ -2708,7 +2700,17 @@ void intel_bios_init(struct drm_i915_private *i915)
>   parse_general_features(i915);
>   parse_general_definitions(i915);
>   parse_panel_options(i915);
> - parse_panel_dtd(i915);
> + /*
> +  * Older VBTs provided DTD information for internal displays through
> +  * the "LFP panel tables" block (42).  As of VBT revision 229 the
> +  * DTD information should be provided via a newer "generic DTD"
> +  * block (58).  Just to be safe, we'll try the new generic DTD block
> +  * first on VBT >= 229, but still fall back to trying the old LFP
> +  * block if that fails.
> +  */
> + if (i915->vbt.version >= 229)

I'd probably stick the vbt version check and the comment in
parse_generic_dtd() instead of polluting the top level.

Up to you if you want to do anything about the nitpicks,

Reviewed-by: Jani Nikula 


> + parse_generic_dtd(i915);
> + parse_lfp_data(i915);
>   parse_lfp_backlight(i915);
>   parse_sdvo_panel_data(i915);
>   parse_driver_features(i915);

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH] drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL

[Matt Roper]

The intent of the version check in the mmap ioctl was to maintain
support for existing platforms (i.e., ADL/RPL and earlier), but drop
support on all future igpu platforms.  As we've seen on the dgpu side,
the hardware teams are using a more fine-grained numbering system for IP
version numbers these days, so it's possible the version number
associated with our next igpu could be some form of "12.xx" rather than
13 or higher.  Comparing against the full ver.release number will ensure
the intent of the check is maintained no matter what numbering the
hardware teams settle on.

Fixes: d3f3baa3562a ("drm/i915: Reinstate the mmap ioctl for some platforms")
Cc: Thomas Hellström 
Cc: Lucas De Marchi 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c3ea243d414d..0c5c43852e24 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -70,7 +70,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
 * mmap ioctl is disallowed for all discrete platforms,
 * and for all platforms with GRAPHICS_VER > 12.
 */
-   if (IS_DGFX(i915) || GRAPHICS_VER(i915) > 12)
+   if (IS_DGFX(i915) || GRAPHICS_VER_FULL(i915) > IP_VER(12, 0))
return -EOPNOTSUPP;
 
if (args->flags & ~(I915_MMAP_WC))
-- 
2.34.1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for GSC support for XeHP SDV and DG2 platforms

[Patchwork]

== Series Details ==

Series: GSC support for XeHP SDV and DG2 platforms
URL   : https://patchwork.freedesktop.org/series/102339/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v2 06/22] drm/i915/bios: Validate the panel_name table

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> In addition to the fp_timing,dvo_timing,panel_pnp_id tables
> there also exists a panel_name table. Unlike the others this
> is just one offset+table_size even though there are still 16
> actual panel_names in the data block.
>
> The panel_name table made its first appearance somewhere
> around VBT version 156-163. The exact version is not known.
> But we don't need to know that since we can just check whether
> the pointers block has enough room for it or not.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 18 +-
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h |  5 +
>  2 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 925f521f1f84..799c1fe36b23 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -206,7 +206,7 @@ static const struct {
>  static bool validate_lfp_data_ptrs(const void *bdb,
>  const struct bdb_lvds_lfp_data_ptrs *ptrs)
>  {
> - int fp_timing_size, dvo_timing_size, panel_pnp_id_size;
> + int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
>   int data_block_size, lfp_data_size;
>   int i;
>  
> @@ -221,6 +221,7 @@ static bool validate_lfp_data_ptrs(const void *bdb,
>   fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
>   dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
>   panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
> + panel_name_size = ptrs->panel_name.table_size;
>  
>   /* fp_timing has variable size */
>   if (fp_timing_size < 32 ||
> @@ -228,6 +229,11 @@ static bool validate_lfp_data_ptrs(const void *bdb,
>   panel_pnp_id_size != sizeof(struct lvds_pnp_id))
>   return false;
>  
> + /* panel_name is not present in old VBTs */
> + if (panel_name_size != 0 &&
> + panel_name_size != sizeof(struct lvds_lfp_panel_name))
> + return false;
> +
>   lfp_data_size = ptrs->ptr[1].fp_timing.offset - 
> ptrs->ptr[0].fp_timing.offset;
>   if (16 * lfp_data_size > data_block_size)
>   return false;
> @@ -268,6 +274,9 @@ static bool validate_lfp_data_ptrs(const void *bdb,
>   return false;
>   }
>  
> + if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
> + return false;
> +
>   return true;
>  }
>  
> @@ -291,6 +300,13 @@ static bool fixup_lfp_data_ptrs(const void *bdb, void 
> *ptrs_block)
>   ptrs->ptr[i].panel_pnp_id.offset -= offset;
>   }
>  
> + if (ptrs->panel_name.table_size) {
> + if (ptrs->panel_name.offset < offset)
> + return false;
> +
> + ptrs->panel_name.offset -= offset;
> + }
> +
>   return validate_lfp_data_ptrs(bdb, ptrs);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
> b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index d727fcd6cdab..e4a11c3e3f3e 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -737,6 +737,7 @@ struct lvds_lfp_data_ptr {
>  struct bdb_lvds_lfp_data_ptrs {
>   u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
>   struct lvds_lfp_data_ptr ptr[16];
> + struct lvds_lfp_data_ptr_table panel_name; /* 156-163? */
>  } __packed;
>  
>  /*
> @@ -778,6 +779,10 @@ struct bdb_lvds_lfp_data {
>   struct lvds_lfp_data_entry data[16];
>  } __packed;
>  
> +struct lvds_lfp_panel_name {
> + u8 name[13];
> +} __packed;
> +
>  /*
>   * Block 43 - LFP Backlight Control Data Block
>   */

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Fix warnings about PSR lock not held (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Fix warnings about PSR lock not held (rev2)
URL   : https://patchwork.freedesktop.org/series/102298/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22812


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22812 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22812, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/index.html

Participating hosts (47 -> 49)
--

  Additional (5): fi-bwr-2160 bat-adlp-4 bat-hsw-1 fi-pnv-d510 bat-rpls-2 
  Missing(3): fi-bsw-cyan shard-tglu fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22812:

### CI changes ###

 Possible regressions 

  * boot:
- fi-pnv-d510:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-pnv-d510/boot.html
- fi-bwr-2160:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html
- fi-snb-2600:NOTRUN -> [FAIL][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-snb-2600/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-hsw-g3258:   NOTRUN -> [FAIL][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-hsw-g3258/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_pm_rpm@basic-rte:
- bat-dg1-6:  NOTRUN -> [SKIP][6] +2 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/bat-dg1-6/igt@i915_pm_...@basic-rte.html

  * igt@kms_chamelium@dp-crc-fast:
- bat-adlp-4: NOTRUN -> [SKIP][7] +146 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/bat-adlp-4/igt@kms_chamel...@dp-crc-fast.html

  
 Warnings 

  * igt@runner@aborted:
- fi-adl-ddr5:[FAIL][8] ([i915#4312]) -> [FAIL][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-adl-ddr5/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-adl-ddr5/igt@run...@aborted.html
- fi-cfl-guc: [FAIL][10] ([i915#4312]) -> [FAIL][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-cfl-guc/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-cfl-guc/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][12] ([i915#4312]) -> [FAIL][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_busy@busy:
- {bat-adlp-6}:   NOTRUN -> [SKIP][14] +146 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/bat-adlp-6/igt@gem_b...@busy.html

  * igt@gem_lmem_swapping@basic:
- {bat-rpls-2}:   NOTRUN -> [SKIP][15] +146 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/bat-rpls-2/igt@gem_lmem_swapp...@basic.html
- {fi-tgl-dsi}:   NOTRUN -> [SKIP][16] +2 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-tgl-dsi/igt@gem_lmem_swapp...@basic.html

  * igt@runner@aborted:
- {bat-hsw-1}:NOTRUN -> [FAIL][17]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/bat-hsw-1/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_22812 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_basic@create-close:
- bat-dg1-6:  NOTRUN -> [SKIP][18] ([i915#2575]) +143 similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/bat-dg1-6/igt@gem_ba...@create-close.html

  * igt@i915_getparams_basic@basic-eu-total:
- fi-snb-2600:NOTRUN -> [SKIP][19] ([fdo#109271]) +150 similar 
issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22812/fi-snb-2600/igt@i915_getparams_ba...@basic-eu-total.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-kbl-soraka:  NOTRUN -> [SKIP][20] ([fdo#109271]) +146 similar 
issues
   [20]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GSC support for XeHP SDV and DG2 platforms

[Patchwork]

== Series Details ==

Series: GSC support for XeHP SDV and DG2 platforms
URL   : https://patchwork.freedesktop.org/series/102339/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
57df08911dad drm/i915/gsc: add gsc as a mei auxiliary device
-:65: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#65: 
new file mode 100644

-:459: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible 
side-effects?
#459: FILE: drivers/gpu/drm/i915/i915_drv.h:1316:
+#define HAS_HECI_GSC(dev_priv) (HAS_HECI_PXP(dev_priv) || 
HAS_HECI_GSCFI(dev_priv))

total: 0 errors, 1 warnings, 1 checks, 418 lines checked
cbe282748891 mei: add support for graphics system controller (gsc) devices
-:57: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#57: 
new file mode 100644

-:255: WARNING:MODULE_LICENSE: Prefer "GPL" over "GPL v2" - see commit 
bf7fbeeae6db ("module: Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity")
#255: FILE: drivers/misc/mei/gsc-me.c:194:
+MODULE_LICENSE("GPL v2");

total: 0 errors, 2 warnings, 0 checks, 297 lines checked
73727156241a mei: gsc: setup char driver alive in spite of firmware handshake 
failure
cf7d610b88d2 mei: gsc: add runtime pm handlers
3b921daf3d69 mei: gsc: retrieve the firmware version
7bf14c184625 HAX: drm/i915: force INTEL_MEI_GSC on for CI
79367081c714 drm/i915/gsc: skip irq initialization if using polling
e4627be07856 drm/i915/gsc: add slow_fw flag to the mei auxiliary device
c3a1f69fab81 drm/i915/gsc: add slow_fw flag to the gsc device definition
c8d254e0de12 drm/i915/gsc: add GSC XeHP SDV platform definition
7102bca609de mei: gsc: use polling instead of interrupts
ce5e1f8ea33d mei: gsc: wait for reset thread on stop
613f4221d396 mei: extend timeouts on slow devices.
c7ef5e1c508b drm/i915/dg2: add gsc with special gsc bar offsets
a289d7722c57 mei: bus: export common mkhi definitions into a separate header
-:78: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 101 lines checked
f767b7e3953f mei: mkhi: add memory ready command
-:46: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#46: FILE: drivers/misc/mei/mkhi.h:54:
+   uint32_t flags;

total: 0 errors, 0 warnings, 1 checks, 29 lines checked
ed778c11fb2f mei: gsc: setup gsc extended operational memory
-:51: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 
'cldev->bus->pxp_mode != MEI_DEV_PXP_INIT'
#51: FILE: drivers/misc/mei/bus-fixup.c:257:
+   if (!cldev->bus->fw_f_fw_ver_supported &&
+   (cldev->bus->pxp_mode != MEI_DEV_PXP_INIT))

total: 0 errors, 0 warnings, 1 checks, 224 lines checked
0c7708f978ad mei: gsc: add transition to PXP mode in resume flow
d7761f03a774 mei: debugfs: add pxp mode to devstate in debugfs
-:19: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#19: FILE: drivers/misc/mei/debugfs.c:91:
+#define MEI_PXP_MODE(state) case MEI_DEV_PXP_##state: return #state

total: 1 errors, 0 warnings, 0 checks, 29 lines checked
9f233cb0bb63 drm/i915/gsc: allocate extended operational memory in LMEM
-:109: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#109: FILE: drivers/gpu/drm/i915/gt/intel_gsc.c:152:
+static void gsc_destroy_one(struct drm_i915_private *i915,
+ struct intel_gsc *gsc, unsigned int intf_id)

total: 0 errors, 0 warnings, 1 checks, 181 lines checked

Re: [Intel-gfx] [PATCH v2 05/22] drm/i915/bios: Trust the LFP data pointers

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Now that we've sufficiently validated the LFP data pointers we
> can trust them.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 60 ++-
>  1 file changed, 16 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index cd82ea4de8e1..925f521f1f84 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -397,44 +397,19 @@ fill_detail_timing_data(struct drm_display_mode 
> *panel_fixed_mode,
>  }
>  
>  static const struct lvds_dvo_timing *
> -get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
> - const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
> +get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
> + const struct bdb_lvds_lfp_data_ptrs *ptrs,
>   int index)
>  {
> - /*
> -  * the size of fp_timing varies on the different platform.
> -  * So calculate the DVO timing relative offset in LVDS data
> -  * entry to get the DVO timing entry
> -  */
> -
> - int lfp_data_size =
> - lvds_lfp_data_ptrs->ptr[1].dvo_timing.offset -
> - lvds_lfp_data_ptrs->ptr[0].dvo_timing.offset;
> - int dvo_timing_offset =
> - lvds_lfp_data_ptrs->ptr[0].dvo_timing.offset -
> - lvds_lfp_data_ptrs->ptr[0].fp_timing.offset;
> - char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
> -
> - return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
> + return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
>  }
>  
> -/* get lvds_fp_timing entry
> - * this function may return NULL if the corresponding entry is invalid
> - */
>  static const struct lvds_fp_timing *
>  get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
>  const struct bdb_lvds_lfp_data_ptrs *ptrs,
>  int index)
>  {
> - u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
> - size_t ofs;
> -
> - if (index >= ARRAY_SIZE(ptrs->ptr))
> - return NULL;
> - ofs = ptrs->ptr[index].fp_timing.offset;
> - if (ofs + sizeof(struct lvds_fp_timing) > data_size)
> - return NULL;
> - return (const struct lvds_fp_timing *)((const u8 *)data + ofs);
> + return (const void *)data + ptrs->ptr[index].fp_timing.offset;
>  }
>  
>  /* Parse general panel options */
> @@ -499,8 +474,7 @@ parse_panel_options(struct drm_i915_private *i915)
>  
>  /* Try to find integrated panel timing data */
>  static void
> -parse_lfp_panel_dtd(struct drm_i915_private *i915,
> - const struct bdb_header *bdb)
> +parse_lfp_panel_dtd(struct drm_i915_private *i915)
>  {
>   const struct bdb_lvds_lfp_data *lvds_lfp_data;
>   const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
> @@ -536,15 +510,14 @@ parse_lfp_panel_dtd(struct drm_i915_private *i915,
>   fp_timing = get_lvds_fp_timing(lvds_lfp_data,
>  lvds_lfp_data_ptrs,
>  panel_type);
> - if (fp_timing) {
> - /* check the resolution, just to be sure */
> - if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
> - fp_timing->y_res == panel_fixed_mode->vdisplay) {
> - i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
> - drm_dbg_kms(>drm,
> - "VBT initial LVDS value %x\n",
> - i915->vbt.bios_lvds_val);
> - }
> +
> + /* check the resolution, just to be sure */
> + if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
> + fp_timing->y_res == panel_fixed_mode->vdisplay) {
> + i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
> + drm_dbg_kms(>drm,
> + "VBT initial LVDS value %x\n",
> + i915->vbt.bios_lvds_val);
>   }
>  }
>  
> @@ -627,8 +600,7 @@ parse_generic_dtd(struct drm_i915_private *i915)
>  }
>  
>  static void
> -parse_panel_dtd(struct drm_i915_private *i915,
> - const struct bdb_header *bdb)
> +parse_panel_dtd(struct drm_i915_private *i915)
>  {
>   /*
>* Older VBTs provided provided DTD information for internal displays
> @@ -641,7 +613,7 @@ parse_panel_dtd(struct drm_i915_private *i915,
>   if (i915->vbt.version >= 229)
>   parse_generic_dtd(i915);
>   if (!i915->vbt.lfp_lvds_vbt_mode)
> - parse_lfp_panel_dtd(i915, bdb);
> + parse_lfp_panel_dtd(i915);
>  }
>  
>  static void
> @@ -2720,7 +2692,7 @@ void intel_bios_init(struct drm_i915_private *i915)
>   parse_general_features(i915);
>   parse_general_definitions(i915);
>   parse_panel_options(i915);
> - 

Re: [Intel-gfx] [PATCH v2 04/22] drm/i915/bios: Validate LFP data table pointers

[Jani Nikula]

On Tue, 05 Apr 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Make sure the LFP data table pointers sane. Sensible looking
> table entries, everything points correctly into the data block,
> etc.
>
> Signed-off-by: Ville Syrjälä 

I can't adequately describe my opinion about the design of the data
structures here. Sheesh.

Dunno why we keep struct lvds_lfp_data_entry and struct
bdb_lvds_lfp_data around, as they don't really reflect reality.

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 82 ++-
>  1 file changed, 81 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 000544280c35..cd82ea4de8e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -133,6 +133,18 @@ static u32 block_offset(const void *bdb, enum 
> bdb_block_id section_id)
>   return block - bdb;
>  }
>  
> +/* size of the block excluding the header */
> +static u32 block_size(const void *bdb, enum bdb_block_id section_id)
> +{
> + const void *block;
> +
> + block = find_raw_section(bdb, section_id);
> + if (!block)
> + return 0;
> +
> + return get_blocksize(block);
> +}
> +
>  struct bdb_block_entry {
>   struct list_head node;
>   enum bdb_block_id section_id;
> @@ -191,6 +203,74 @@ static const struct {
> .min_size = sizeof(struct bdb_generic_dtd), },
>  };
>  
> +static bool validate_lfp_data_ptrs(const void *bdb,
> +const struct bdb_lvds_lfp_data_ptrs *ptrs)
> +{
> + int fp_timing_size, dvo_timing_size, panel_pnp_id_size;
> + int data_block_size, lfp_data_size;
> + int i;
> +
> + data_block_size = block_size(bdb, BDB_LVDS_LFP_DATA);
> + if (data_block_size == 0)
> + return false;
> +
> + /* always 3 indicating the presence of 
> fp_timing+dvo_timing+panel_pnp_id */
> + if (ptrs->lvds_entries != 3)
> + return false;
> +
> + fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
> + dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
> + panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
> +
> + /* fp_timing has variable size */
> + if (fp_timing_size < 32 ||
> + dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
> + panel_pnp_id_size != sizeof(struct lvds_pnp_id))
> + return false;
> +
> + lfp_data_size = ptrs->ptr[1].fp_timing.offset - 
> ptrs->ptr[0].fp_timing.offset;
> + if (16 * lfp_data_size > data_block_size)
> + return false;
> +
> + /*
> +  * Except for vlv/chv machines all real VBTs seem to have 6
> +  * unaccounted bytes in the fp_timing table. And it doesn't
> +  * appear to be a really intentional hole as the fp_timing
> +  * 0x terminator is always within those 6 missing bytes.
> +  */
> + if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != 
> lfp_data_size &&
> + fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size != 
> lfp_data_size)
> + return false;
> +
> + if (ptrs->ptr[0].fp_timing.offset + fp_timing_size > 
> ptrs->ptr[0].dvo_timing.offset ||
> + ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != 
> ptrs->ptr[0].panel_pnp_id.offset ||
> + ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != 
> lfp_data_size)
> + return false;
> +
> + /* make sure the table entries have uniform size */
> + for (i = 1; i < 16; i++) {
> + if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
> + ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
> + ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
> + return false;
> +
> + if (ptrs->ptr[i].fp_timing.offset - 
> ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
> + ptrs->ptr[i].dvo_timing.offset - 
> ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
> + ptrs->ptr[i].panel_pnp_id.offset - 
> ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
> + return false;
> + }
> +
> + /* make sure the tables fit inside the data block */
> + for (i = 0; i < 16; i++) {
> + if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > 
> data_block_size ||
> + ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > 
> data_block_size ||
> + ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > 
> data_block_size)
> + return false;
> + }
> +
> + return true;
> +}
> +
>  /* make the data table offsets relative to the data block */
>  static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
>  {
> @@ -211,7 +291,7 @@ static bool fixup_lfp_data_ptrs(const void *bdb, void 
> *ptrs_block)
>   ptrs->ptr[i].panel_pnp_id.offset -= offset;
>   }
>  

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: consider min_page_size when migrating

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: consider min_page_size when 
migrating
URL   : https://patchwork.freedesktop.org/series/102333/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22811


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22811 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22811, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/index.html

Participating hosts (47 -> 37)
--

  Additional (2): fi-bwr-2160 fi-pnv-d510 
  Missing(12): shard-tglu bat-adls-5 bat-dg1-6 bat-dg1-5 bat-dg2-8 
bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-rpls-1 fi-bdw-samus bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22811:

### CI changes ###

 Possible regressions 

  * boot:
- fi-pnv-d510:NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-pnv-d510/boot.html
- fi-bwr-2160:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-bwr-2160/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@gem_lmem_swapping@basic:
- fi-cfl-8109u:   NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-cfl-8109u/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-bsw-nick:NOTRUN -> [FAIL][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-bsw-nick/igt@gem_lmem_swapp...@parallel-random-engines.html

  
 Warnings 

  * igt@runner@aborted:
- fi-bdw-5557u:   [FAIL][5] ([i915#4312]) -> [FAIL][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-bdw-5557u/igt@run...@aborted.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-bdw-5557u/igt@run...@aborted.html
- fi-kbl-7567u:   [FAIL][7] ([i915#4312]) -> [FAIL][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-kbl-7567u/igt@run...@aborted.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-kbl-7567u/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_lmem_swapping@basic:
- {fi-tgl-dsi}:   NOTRUN -> [SKIP][9] +2 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-tgl-dsi/igt@gem_lmem_swapp...@basic.html
- {fi-jsl-1}: [FAIL][10] -> [SKIP][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11472/fi-jsl-1/igt@gem_lmem_swapp...@basic.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-jsl-1/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- {fi-jsl-1}: NOTRUN -> [FAIL][12]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-jsl-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  
Known issues


  Here are the changes found in Patchwork_22811 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   NOTRUN -> [SKIP][13] ([fdo#109271]) +1 similar issue
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@fbdev@eof:
- fi-kbl-8809g:   NOTRUN -> [INCOMPLETE][14] ([i915#5557])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-kbl-8809g/igt@fb...@eof.html

  * igt@gem_exec_fence@basic-await:
- fi-bsw-nick:NOTRUN -> [SKIP][15] ([fdo#109271]) +151 similar 
issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-bsw-nick/igt@gem_exec_fe...@basic-await.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   NOTRUN -> [SKIP][16] ([fdo#109271]) +145 similar 
issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-cfl-8109u:   NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#5341])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
- fi-bsw-nick:NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#5341])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22811/fi-bsw-nick/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html

  
 Warnings 

  * igt@runner@aborted:
- fi-bsw-kefka:   

Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Use platform specific defaults for GuC/HuC enabling

[Tvrtko Ursulin]

On 03/06/2021 17:48, Matthew Brost wrote:

From: John Harrison 

The meaning of 'default' for the enable_guc module parameter has been
updated to accurately reflect what is supported on current platforms.
So start using the defaults instead of forcing everything off.
Although, note that right now, the default is for everything to be off
anyway. So this is not a change for current platforms.

Signed-off-by: John Harrison 
Signed-off-by: Matthew Brost 
Reviewed-by: Daniele Ceraolo Spurio 
---
  drivers/gpu/drm/i915/i915_params.c | 2 +-
  drivers/gpu/drm/i915/i915_params.h | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 0320878d96b0..e07f4cfea63a 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -160,7 +160,7 @@ i915_param_named_unsafe(edp_vswing, int, 0400,
  i915_param_named_unsafe(enable_guc, int, 0400,
"Enable GuC load for GuC submission and/or HuC load. "
"Required functionality can be selected using bitmask values. "
-   "(-1=auto, 0=disable [default], 1=GuC submission, 2=HuC load)");
+   "(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
  
  i915_param_named(guc_log_level, int, 0400,

"GuC firmware logging level. Requires GuC to be loaded. "
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index 4a114a5ad000..f27eceb82c0f 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -59,7 +59,7 @@ struct drm_printer;
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
-   param(int, enable_guc, 0, 0400) \
+   param(int, enable_guc, -1, 0400) \
param(int, guc_log_level, -1, 0400) \
param(char *, guc_firmware_path, NULL, 0400) \
param(char *, huc_firmware_path, NULL, 0400) \


What is the BKM to use this with multi-GPU setups? Specifically I have a 
TGL+DG1 laptop (off the shelf) and want to have GuC with DG1 only. If I 
pass i915.enable_guc=3 it seems it wants to enable it for TGL as well 
and wedges the GPU if it can't?


Regards,

Tvrtko

[Intel-gfx] [PATCH 0/1] Inherit GPU scheduling priority from process nice

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Current processing landscape seems to be more and more composed of pipelines
where computations are done on multiple hardware devices. Furthermore some of
the non-CPU devices, like in this case many GPUs supported by the i915 driver,
actually support priority based scheduling which is currently rather
inaccessible to the user (in terms of being able to control it from the
outside).

>From these two statements a question arises on how to allow for a simple,
effective and consolidated user experience. In other words why user would not be
able to do something like:

 $ nice ffmmpeg ...transcode my videos...
 $ my-favourite-game

And have the nice hint apply to GPU parts of the transcode pipeline as well?

This would in fact follow the approach taken by kernel's block scheduler where
ionice is by default inherited from process nice.

This series implements the same idea by inheriting context creator and batch
buffer submitted nice value as context nice. To avoid influencing GPU scheduling
aware clients this is done only one for contexts where userspace hasn't
explicitly specified a non-default scheduling priority

The approach is completely compatible with GuC and drm/scheduler since all
support at least low/normal/high priority levels with just the granularity of
available control differing. In other words with GuC scheduling there is no
difference between nice 5 and 10, both would map to low priority, but the
default case of positive or negative nice, versus nice 0, is still correctly
propagated to the firmware scheduler.

With the series applied I simulated the scenario of a background GPU task
running simultaneously with an interactive client, varying the former's nice
value.

Simulating a non-interactive GPU background task was:
  vblank_mode=0 nice -n  glxgears -geometry 1600x800

Interactive client was simulated with:
  gem_wsim -w ~/test.wsim -r 300 -v # (This one is self-capped at ~60fps.)

These were the results on DG1, first with execlists (default):

   Background nice  |   Interactive FPS
 ---+
   | 59
  0 | 35
 10 | 42

As we can see running the background load with nice 10 can somewhat help the
performance of the interactive/foreground task. (Although to be noted is that
without the fair scheduler completed there are possible starvation issues
depending on the workload which cannot be fixed by this patch.)

Now results with GuC (although it is not default on DG1):

   Background nice  |   Interactive FPS
 ---+
   | 58
  0 | 26
 10 | 25

Unfortunately GuC is not showing any change (25 vs 26 is rounding/run error).
But reverse mesurement with background client at nice 0 and foreground at nice
-10 does give 40 FPS proving the priority adjustment does work. (Same reverse
test gives 46 FPS with execlists). What is happening with GuC here is something
to be looked at since it seems normal-vs-low GuC priority time slices
differently than normal-vs-high. Normal does not seem to be preferred over low,
in this test at least.

v2:
 * Moved notifier outside task_rq_lock.
 * Some improvements and restructuring on the i915 side of the series.

v3:
 * Dropped task nice notifier - inheriting nice on request submit time is good
   enough.

v4:
 * Realisation came that this can be heavily simplified and only one simple
   patch is enough to achieve the desired behaviour.
 * Fixed the priority adjustment location to actually worked after rebase!
 * Re-done the benchmarking.

 v5:
 * I am sending wrong files out yet again (v4), apologies for the spam..

Tvrtko Ursulin (1):
  drm/i915: Inherit submitter nice when scheduling requests

 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 
 1 file changed, 8 insertions(+)

-- 
2.32.0

[Intel-gfx] [PATCH 1/1] drm/i915: Inherit submitter nice when scheduling requests

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Inherit submitter nice at point of request submission to account for long
running processes getting either externally or self re-niced.

This accounts for the current processing landscape where computational
pipelines are composed of CPU and GPU parts working in tandem.

Nice value will only apply to requests which originate from user contexts
and have default context priority. This is to avoid disturbing any
application made choices of low and high (batch processing and latency
sensitive compositing). In this case nice value adjusts the effective
priority in the narrow band of -19 to +20 around
I915_CONTEXT_DEFAULT_PRIORITY.

This means that userspace using the context priority uapi directly has a
wider range of possible adjustments (in practice that only applies to
execlists platforms - with GuC there are only three priority buckets), but
in all cases nice adjustment has the expected effect: positive nice
lowering the scheduling priority and negative nice raising it.

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 50cbc8b4885b..2d5e71029d7c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -3043,6 +3043,14 @@ static int eb_request_add(struct i915_execbuffer *eb, 
struct i915_request *rq,
/* Check that the context wasn't destroyed before submission */
if (likely(!intel_context_is_closed(eb->context))) {
attr = eb->gem_context->sched;
+   /*
+* Inherit process nice when scheduling user contexts but only
+* if context has the default priority to avoid touching
+* contexts where GEM uapi has been used to explicitly lower
+* or elevate it.
+*/
+   if (attr.priority == I915_CONTEXT_DEFAULT_PRIORITY)
+   attr.priority = -task_nice(current);
} else {
/* Serialise with context_close via the add_to_timeline */
i915_request_set_error_once(rq, -ENOENT);
-- 
2.32.0

[Intel-gfx] [PATCH 1/1] drm/i915: Inherit submitter nice when scheduling requests

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Inherit submitter nice at point of request submission to account for long
running processes getting either externally or self re-niced.

This accounts for the current processing landscape where computational
pipelines are composed of CPU and GPU parts working in tandem.

Nice value will only apply to requests which originate from user contexts
and have default context priority. This is to avoid disturbing any
application made choices of low and high (batch processing and latency
sensitive compositing). In this case nice value adjusts the effective
priority in the narrow band of -19 to +20 around
I915_CONTEXT_DEFAULT_PRIORITY.

This means that userspace using the context priority uapi directly has a
wider range of possible adjustments (in practice that only applies to
execlists platforms - with GuC there are only three priority buckets), but
in all cases nice adjustment has the expected effect: positive nice
lowering the scheduling priority and negative nice raising it.

Signed-off-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_request.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_request.c 
b/drivers/gpu/drm/i915/i915_request.c
index 582770360ad1..e5cfa073d8f0 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1811,8 +1811,17 @@ void i915_request_add(struct i915_request *rq)
/* XXX placeholder for selftests */
rcu_read_lock();
ctx = rcu_dereference(rq->context->gem_context);
-   if (ctx)
+   if (ctx) {
attr = ctx->sched;
+   /*
+* Inherit process nice when scheduling user contexts but only
+* if context has the default priority to avoid touching
+* contexts where GEM uapi has been used to explicitly lower
+* or elevate it.
+*/
+   if (attr.priority == I915_CONTEXT_DEFAULT_PRIORITY)
+   attr.priority = -task_nice(current);
+   }
rcu_read_unlock();
 
__i915_request_queue(rq, );
-- 
2.32.0

[Intel-gfx] [PATCH 0/1] Inherit GPU scheduling priority from process nice

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Current processing landscape seems to be more and more composed of pipelines
where computations are done on multiple hardware devices. Furthermore some of
the non-CPU devices, like in this case many GPUs supported by the i915 driver,
actually support priority based scheduling which is currently rather
inaccessible to the user (in terms of being able to control it from the
outside).

>From these two statements a question arises on how to allow for a simple,
effective and consolidated user experience. In other words why user would not be
able to do something like:

 $ nice ffmmpeg ...transcode my videos...
 $ my-favourite-game

And have the nice hint apply to GPU parts of the transcode pipeline as well?

This would in fact follow the approach taken by kernel's block scheduler where
ionice is by default inherited from process nice.

This series implements the same idea by inheriting context creator and batch
buffer submitted nice value as context nice. To avoid influencing GPU scheduling
aware clients this is done only one for contexts where userspace hasn't
explicitly specified a non-default scheduling priority

The approach is completely compatible with GuC and drm/scheduler since all
support at least low/normal/high priority levels with just the granularity of
available control differing. In other words with GuC scheduling there is no
difference between nice 5 and 10, both would map to low priority, but the
default case of positive or negative nice, versus nice 0, is still correctly
propagated to the firmware scheduler.

With the series applied I simulated the scenario of a background GPU task
running simultaneously with an interactive client, varying the former's nice
value.

Simulating a non-interactive GPU background task was:
  vblank_mode=0 nice -n  glxgears -geometry 1600x800

Interactive client was simulated with:
  gem_wsim -w ~/test.wsim -r 300 -v # (This one is self-capped at ~60fps.)

These were the results on DG1, first with execlists (default):

   Background nice  |   Interactive FPS
 ---+
   | 59
  0 | 35
 10 | 42

As we can see running the background load with nice 10 can somewhat help the
performance of the interactive/foreground task. (Although to be noted is that
without the fair scheduler completed there are possible starvation issues
depending on the workload which cannot be fixed by this patch.)

Now results with GuC (although it is not default on DG1):

   Background nice  |   Interactive FPS
 ---+
   | 58
  0 | 26
 10 | 25

Unfortunately GuC is not showing any change (25 vs 26 is rounding/run error).
But reverse mesurement with background client at nice 0 and foreground at nice
-10 does give 40 FPS proving the priority adjustment does work. (Same reverse
test gives 46 FPS with execlists). What is happening with GuC here is something
to be looked at since it seems normal-vs-low GuC priority time slices
differently than normal-vs-high. Normal does not seem to be preferred over low,
in this test at least.

v2:
 * Moved notifier outside task_rq_lock.
 * Some improvements and restructuring on the i915 side of the series.

v3:
 * Dropped task nice notifier - inheriting nice on request submit time is good
   enough.

v4:
 * Realisation came that this can be heavily simplified and only one simple
   patch is enough to achieve the desired behaviour.
 * Fixed the priority adjustment location to actually worked after rebase!
 * Re-done the benchmarking.

Tvrtko Ursulin (1):
  drm/i915: Inherit submitter nice when scheduling requests

 drivers/gpu/drm/i915/i915_request.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

-- 
2.32.0

[Intel-gfx] [PATCH v2] drm/edid: add EDID block count and size helpers

[Jani Nikula]

Add some helpers to figure out the EDID extension block count, block
count, size, pointers to blocks.

Unfortunately, we'll need to cast away the const in a few places where
we actually need to access the data.

v2: fix s/j/i/ introduced in a rebase

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 80 +++---
 1 file changed, 57 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 90615e30eaf5..c09ff1efdbc8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1568,6 +1568,38 @@ static const struct drm_display_mode edid_4k_modes[] = {
 
 /*** DDC fetch and block validation ***/
 
+static int edid_extension_block_count(const struct edid *edid)
+{
+   return edid->extensions;
+}
+
+static int edid_block_count(const struct edid *edid)
+{
+   return edid_extension_block_count(edid) + 1;
+}
+
+static int edid_size_by_blocks(int num_blocks)
+{
+   return num_blocks * EDID_LENGTH;
+}
+
+static int edid_size(const struct edid *edid)
+{
+   return edid_size_by_blocks(edid_block_count(edid));
+}
+
+static const void *edid_block_data(const struct edid *edid, int index)
+{
+   BUILD_BUG_ON(sizeof(*edid) != EDID_LENGTH);
+
+   return edid + index;
+}
+
+static const void *edid_extension_block_data(const struct edid *edid, int 
index)
+{
+   return edid_block_data(edid, index + 1);
+}
+
 static const u8 edid_header[] = {
0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
 };
@@ -1654,8 +1686,8 @@ bool drm_edid_are_equal(const struct edid *edid1, const 
struct edid *edid2)
return false;
 
if (edid1) {
-   edid1_len = EDID_LENGTH * (1 + edid1->extensions);
-   edid2_len = EDID_LENGTH * (1 + edid2->extensions);
+   edid1_len = edid_size(edid1);
+   edid2_len = edid_size(edid2);
 
if (edid1_len != edid2_len)
return false;
@@ -1865,14 +1897,16 @@ EXPORT_SYMBOL(drm_edid_block_valid);
 bool drm_edid_is_valid(struct edid *edid)
 {
int i;
-   u8 *raw = (u8 *)edid;
 
if (!edid)
return false;
 
-   for (i = 0; i <= edid->extensions; i++)
-   if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
+   for (i = 0; i < edid_block_count(edid); i++) {
+   void *block = (void *)edid_block_data(edid, i);
+
+   if (!drm_edid_block_valid(block, i, true, NULL))
return false;
+   }
 
return true;
 }
@@ -1885,13 +1919,13 @@ static struct edid *edid_filter_invalid_blocks(const 
struct edid *edid,
int valid_extensions = edid->extensions - invalid_blocks;
int i;
 
-   new = kmalloc_array(valid_extensions + 1, EDID_LENGTH, GFP_KERNEL);
+   new = kmalloc(edid_size_by_blocks(valid_extensions + 1), GFP_KERNEL);
if (!new)
goto out;
 
dest_block = new;
-   for (i = 0; i <= edid->extensions; i++) {
-   const void *block = edid + i;
+   for (i = 0; i < edid_block_count(edid); i++) {
+   const void *block = edid_block_data(edid, i);
 
if (edid_block_valid(block, i == 0))
memcpy(dest_block++, block, EDID_LENGTH);
@@ -2101,7 +2135,7 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
 void *context)
 {
enum edid_block_status status;
-   int j, invalid_blocks = 0;
+   int i, invalid_blocks = 0;
struct edid *edid, *new;
 
edid = drm_get_override_edid(connector);
@@ -2133,20 +2167,20 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
goto fail;
}
 
-   if (edid->extensions == 0)
+   if (!edid_extension_block_count(edid) == 0)
goto ok;
 
-   new = krealloc(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
+   new = krealloc(edid, edid_size(edid), GFP_KERNEL);
if (!new)
goto fail;
edid = new;
 
-   for (j = 1; j <= edid->extensions; j++) {
-   void *block = edid + j;
+   for (i = 1; i < edid_block_count(edid); i++) {
+   void *block = (void *)edid_block_data(edid, i);
 
-   status = edid_block_read(block, j, read_block, context);
+   status = edid_block_read(block, i, read_block, context);
 
-   edid_block_status_print(status, block, j);
+   edid_block_status_print(status, block, i);
 
if (!edid_block_status_valid(status, edid_block_tag(block))) {
if (status == EDID_BLOCK_READ_FAIL)
@@ -2156,7 +2190,7 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
}
 
if (invalid_blocks) {
-   connector_bad_edid(connector, edid, edid->extensions + 1);
+   connector_bad_edid(connector, edid, 

Re: [Intel-gfx] [PATCH v9 1/3] i915/gvt: Separate the MMIO tracking table from GVT-g

[Jani Nikula]

On Thu, 07 Apr 2022, Zhi Wang  wrote:
> diff --git a/drivers/gpu/drm/i915/intel_gvt.h 
> b/drivers/gpu/drm/i915/intel_gvt.h
> index d7d3fb6186fd..7665d7cf0bdd 100644
> --- a/drivers/gpu/drm/i915/intel_gvt.h
> +++ b/drivers/gpu/drm/i915/intel_gvt.h
> @@ -26,7 +26,17 @@
>  
>  struct drm_i915_private;
>  
> +#include 

You only need . Please add it before the forward
declaration above.

> +
>  #ifdef CONFIG_DRM_I915_GVT
> +
> +struct intel_gvt_mmio_table_iter {
> + struct drm_i915_private *i915;
> + void *data;
> + int (*handle_mmio_cb)(struct intel_gvt_mmio_table_iter *iter,
> +   u32 offset, u32 size);
> +};
> +
>  int intel_gvt_init(struct drm_i915_private *dev_priv);
>  void intel_gvt_driver_remove(struct drm_i915_private *dev_priv);
>  int intel_gvt_init_device(struct drm_i915_private *dev_priv);
> @@ -34,6 +44,7 @@ void intel_gvt_clean_device(struct drm_i915_private 
> *dev_priv);
>  int intel_gvt_init_host(void);
>  void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv);
>  void intel_gvt_resume(struct drm_i915_private *dev_priv);
> +int intel_gvt_iterate_mmio_table(struct intel_gvt_mmio_table_iter *iter);
>  #else
>  static inline int intel_gvt_init(struct drm_i915_private *dev_priv)
>  {
> @@ -51,6 +62,16 @@ static inline void intel_gvt_sanitize_options(struct 
> drm_i915_private *dev_priv)
>  static inline void intel_gvt_resume(struct drm_i915_private *dev_priv)
>  {
>  }
> +
> +unsigned long intel_gvt_get_device_type(struct drm_i915_private *i915)
> +{
> + return 0;
> +}

The CONFIG_DRM_I915_GVT=y counterpart for this is in mmio.h. Should be
both in the same header.

> +
> +int intel_gvt_iterate_mmio_table(struct intel_gvt_mmio_table_iter *iter)
> +{
> + return 0;
> +}
>  #endif
>  
>  #endif /* _INTEL_GVT_H_ */
> diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c 
> b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> new file mode 100644
> index ..d29491a6d209
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> @@ -0,0 +1,1290 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#include "i915_drv.h"
> +#include "i915_reg.h"
> +#include "display/vlv_dsi_pll_regs.h"
> +#include "gt/intel_gt_regs.h"
> +#include "intel_mchbar_regs.h"
> +#include "i915_pvinfo.h"
> +#include "intel_gvt.h"
> +#include "gvt/gvt.h"

Generally we have the include lists sorted.

Other than the nitpicks above, the series is

Acked-by: Jani Nikula 


BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 4/4] drm/i915/dg2: Add support for DG2 clear color compression

[Gupta, Anshuman]

> -Original Message-
> From: Deak, Imre 
> Sent: Thursday, April 7, 2022 6:59 PM
> To: Gupta, Anshuman 
> Cc: intel-gfx@lists.freedesktop.org; Kahola, Mika ;
> Heikkila, Juha-pekka ; C, Ramalingam
> 
> Subject: Re: [PATCH 4/4] drm/i915/dg2: Add support for DG2 clear color
> compression
> 
> On Thu, Apr 07, 2022 at 08:47:13AM +0300, Gupta, Anshuman wrote:
> > > -Original Message-
> > > From: Deak, Imre 
> > > Sent: Monday, April 4, 2022 7:09 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Gupta, Anshuman ; Kahola, Mika
> > > ; Heikkila, Juha-pekka  > > pekka.heikk...@intel.com>; C, Ramalingam 
> > > Subject: [PATCH 4/4] drm/i915/dg2: Add support for DG2 clear color
> > > compression
> > >
> > > From: Anshuman Gupta 
> > >
> > > DG2 onwards discrete gfx has support for new flat CCS mapping, which
> > > brings in display feature in to avoid Aux walk for compressed
> > > surface. This support build on top of Flat CCS support added in
> > > XEHPSDV.  FLAT CCS surface base address should be 64k aligned,
> > > Compressed displayable surfaces must use tile4 format.
> >
> > IMHO commit log should also describe a bit of description for DG2
> > Clear color. Original patch was meant to add FLAT_CCS support, commit
> > log not fully aligns with commit header.
> >
> > May be it would be good if patch authorship changes to the DG2
> > original clear color author for any required follow-up later ?
> 
> I kept your authorship based on
> https://patchwork.freedesktop.org/patch/471775/?series=95686=5
> 
> and then an Ack from you. But yes, there's been some changes since the support
> for DG2 CCS was originally added, with multiple people involved, so the
> authorship may be not accurate. I can update that along with the commit
> message.
Yes, earlier I overlooked the authorship part as, but with above.
Acked-by: Anshuman Gupta 

> 
> > > HAS: 1407880786
> > > B.Spec : 7655
> > > B.Spec : 53902
> > >
> > > v2: Merge all bits required for the support of functionality into this
> > > patch from the patch adding the corresponding modifier.
> > >
> > > Cc: Mika Kahola 
> > > Signed-off-by: Anshuman Gupta 
> > > Signed-off-by: Juha-Pekka Heikkilä 
> > > Signed-off-by: Ramalingam C 
> > > Signed-off-by: Imre Deak 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c  |  4 +-
> > >  drivers/gpu/drm/i915/display/intel_fb.c   | 40 ++-
> > >  .../drm/i915/display/skl_universal_plane.c| 25 
> > >  3 files changed, 52 insertions(+), 17 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index eee185ed41c3e..ca997a0a05174 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -8477,7 +8477,9 @@ static void
> > > intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
> > >
> > >   /*
> > >* The layout of the fast clear color value expected by HW
> > > -  * (the DRM ABI requiring this value to be located in fb at 
> > > offset
> > > 0 of plane#2):
> > > +  * (the DRM ABI requiring this value to be located in fb at
> > > +  * offset 0 of cc plane, plane #2 previous generations or
> > > +  * plane #1 for flat ccs):
> > >* - 4 x 4 bytes per-channel value
> > >*   (in surface type specific float/int format provided by the 
> > > fb
> > > user)
> > >* - 8 bytes native color value used by the display diff --git
> > > a/drivers/gpu/drm/i915/display/intel_fb.c
> > > b/drivers/gpu/drm/i915/display/intel_fb.c
> > > index 447003a91160e..9f5a6b79e95b5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > > @@ -107,6 +107,21 @@ static const struct drm_format_info
> > > gen12_ccs_cc_formats[] = {
> > > .hsub = 1, .vsub = 1, .has_alpha = true },  };
> > >
> > > +static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
> > > + { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2,
> > > +   .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > > +   .hsub = 1, .vsub = 1, },
> > > + { .format = DRM_FORMAT_XBGR, .depth = 24, .num_planes = 2,
> > > +   .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > > +   .hsub = 1, .vsub = 1, },
> > > + { .format = DRM_FORMAT_ARGB, .depth = 32, .num_planes = 2,
> > > +   .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > > +   .hsub = 1, .vsub = 1, .has_alpha = true },
> > > + { .format = DRM_FORMAT_ABGR, .depth = 32, .num_planes = 2,
> > > +   .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > > +   .hsub = 1, .vsub = 1, .has_alpha = true }, };
> > > +
> > >  struct intel_modifier_desc {
> > >   u64 modifier;
> > >   struct {
> > > @@ -144,6 +159,14 @@ static const struct intel_modifier_desc
> > > 

Re: [Intel-gfx] [PATCH v12] drm/amdgpu: add drm buddy support to amdgpu

[Paul Menzel]

Dear Arunpravin,


Thank you for your patch.

Am 07.04.22 um 07:46 schrieb Arunpravin Paneer Selvam:

- Switch to drm buddy allocator
- Add resource cursor support for drm buddy


I though after the last long discussion, you would actually act on the 
review comments. Daniel wrote a good summary, you could more or less 
copy and past. So why didn’t you?


So, I really wish to not have the patch commit as is.

The summary should also say something about using mutex over spinlocks. 
For me the version change summaries below are just for reviewers of 
earlier iterations to see what changed, and not something to be read easily.



Kind regards,

Paul



v2(Matthew Auld):
   - replace spinlock with mutex as we call kmem_cache_zalloc
 (..., GFP_KERNEL) in drm_buddy_alloc() function

   - lock drm_buddy_block_trim() function as it calls
 mark_free/mark_split are all globally visible

v3(Matthew Auld):
   - remove trim method error handling as we address the failure case
 at drm_buddy_block_trim() function

v4:
   - fix warnings reported by kernel test robot 

v5:
   - fix merge conflict issue

v6:
   - fix warnings reported by kernel test robot 

v7:
   - remove DRM_BUDDY_RANGE_ALLOCATION flag usage

v8:
   - keep DRM_BUDDY_RANGE_ALLOCATION flag usage
   - resolve conflicts created by drm/amdgpu: remove VRAM accounting v2

v9(Christian):
   - merged the below patch
  - drm/amdgpu: move vram inline functions into a header
   - rename label name as fallback
   - move struct amdgpu_vram_mgr to amdgpu_vram_mgr.h
   - remove unnecessary flags from struct amdgpu_vram_reservation
   - rewrite block NULL check condition
   - change else style as per coding standard
   - rewrite the node max size
   - add a helper function to fetch the first entry from the list

v10(Christian):
- rename amdgpu_get_node() function name as amdgpu_vram_mgr_first_block

v11:
- if size is not aligned with min_page_size, enable is_contiguous flag,
  therefore, the size round up to the power of two and trimmed to the
  original size.
v12:
- rename the function names having prefix as amdgpu_vram_mgr_*()
- modify the round_up() logic conforming to contiguous flag enablement
  or if size is not aligned to min_block_size
- modify the trim logic
- rename node as block wherever applicable

Signed-off-by: Arunpravin Paneer Selvam 
---
  drivers/gpu/drm/Kconfig   |   1 +
  .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h|  97 -
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h   |  10 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c  | 359 ++
  4 files changed, 291 insertions(+), 176 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index f1422bee3dcc..5133c3f028ab 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -280,6 +280,7 @@ config DRM_AMDGPU
select HWMON
select BACKLIGHT_CLASS_DEVICE
select INTERVAL_TREE
+   select DRM_BUDDY
help
  Choose this option if you have a recent AMD Radeon graphics card.
  
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h

index acfa207cf970..6546552e596c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -30,12 +30,15 @@
  #include 
  #include 
  
+#include "amdgpu_vram_mgr.h"

+
  /* state back for walking over vram_mgr and gtt_mgr allocations */
  struct amdgpu_res_cursor {
uint64_tstart;
uint64_tsize;
uint64_tremaining;
-   struct drm_mm_node  *node;
+   void*node;
+   uint32_tmem_type;
  };
  
  /**

@@ -52,27 +55,63 @@ static inline void amdgpu_res_first(struct ttm_resource 
*res,
uint64_t start, uint64_t size,
struct amdgpu_res_cursor *cur)
  {
+   struct drm_buddy_block *block;
+   struct list_head *head, *next;
struct drm_mm_node *node;
  
-	if (!res || res->mem_type == TTM_PL_SYSTEM) {

-   cur->start = start;
-   cur->size = size;
-   cur->remaining = size;
-   cur->node = NULL;
-   WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
-   return;
-   }
+   if (!res)
+   goto fallback;
  
  	BUG_ON(start + size > res->num_pages << PAGE_SHIFT);
  
-	node = to_ttm_range_mgr_node(res)->mm_nodes;

-   while (start >= node->size << PAGE_SHIFT)
-   start -= node++->size << PAGE_SHIFT;
+   cur->mem_type = res->mem_type;
+
+   switch (cur->mem_type) {
+   case TTM_PL_VRAM:
+   head = _amdgpu_vram_mgr_resource(res)->blocks;
+
+   block = list_first_entry_or_null(head,
+struct drm_buddy_block,
+

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/rps: Centralize computation of freq caps (rev6)

[Anshuman Gupta]

On 2022-04-07 at 09:44:48 +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/rps: Centralize computation of freq caps (rev6)
> URL   : https://patchwork.freedesktop.org/series/101606/
> State : success
Pushed to drm-intel-gt-next.
Thanks for patch and review.
Br,
Anshuman.
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_11467_full -> Patchwork_22802_full
> 
> 
> Summary
> ---
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   
> 
> Participating hosts (13 -> 13)
> --
> 
>   No changes in participating hosts
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_22802_full:
> 
> ### IGT changes ###
> 
>  Suppressed 
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@gem_exec_schedule@wide@bcs0:
> - {shard-rkl}:NOTRUN -> [INCOMPLETE][1]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-5/igt@gem_exec_schedule@w...@bcs0.html
> 
>   
> Known issues
> 
> 
>   Here are the changes found in Patchwork_22802_full that come from known 
> issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@gem_ccs@ctrl-surf-copy:
> - shard-iclb: NOTRUN -> [SKIP][2] ([i915#5327])
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_...@ctrl-surf-copy.html
> 
>   * igt@gem_ctx_isolation@preservation-s3@bcs0:
> - shard-apl:  [PASS][3] -> [DMESG-WARN][4] ([i915#180]) +6 
> similar issues
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-apl1/igt@gem_ctx_isolation@preservation...@bcs0.html
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl6/igt@gem_ctx_isolation@preservation...@bcs0.html
> 
>   * igt@gem_exec_capture@pi@bcs0:
> - shard-skl:  NOTRUN -> [INCOMPLETE][5] ([i915#4547])
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_exec_capture@p...@bcs0.html
> 
>   * igt@gem_exec_fair@basic-deadline:
> - shard-skl:  NOTRUN -> [FAIL][6] ([i915#2846])
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_exec_f...@basic-deadline.html
> 
>   * igt@gem_exec_fair@basic-flow@rcs0:
> - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2842])
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-tglb1/igt@gem_exec_fair@basic-f...@rcs0.html
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb6/igt@gem_exec_fair@basic-f...@rcs0.html
> 
>   * igt@gem_exec_flush@basic-batch-kernel-default-wb:
> - shard-snb:  [PASS][9] -> [SKIP][10] ([fdo#109271]) +3 similar 
> issues
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-snb7/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-snb6/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html
> 
>   * igt@gem_exec_params@secure-non-root:
> - shard-tglb: NOTRUN -> [SKIP][11] ([fdo#112283])
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@gem_exec_par...@secure-non-root.html
> - shard-iclb: NOTRUN -> [SKIP][12] ([fdo#112283])
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_exec_par...@secure-non-root.html
> 
>   * igt@gem_lmem_swapping@random:
> - shard-tglb: NOTRUN -> [SKIP][13] ([i915#4613])
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@gem_lmem_swapp...@random.html
> - shard-skl:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613])
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_lmem_swapp...@random.html
> 
>   * igt@gem_lmem_swapping@smem-oom:
> - shard-iclb: NOTRUN -> [SKIP][15] ([i915#4613]) +1 similar issue
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_lmem_swapp...@smem-oom.html
> - shard-apl:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613])
>[16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl1/igt@gem_lmem_swapp...@smem-oom.html
> 
>   * igt@gem_mmap_gtt@coherency:
> - shard-iclb: NOTRUN -> [SKIP][17] ([fdo#109292])
>[17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_mmap_...@coherency.html
> 
>   * igt@gem_pread@exhaustion:
> - shard-apl:  NOTRUN -> [WARN][18] ([i915#2658])
>[18]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl1/igt@gem_pr...@exhaustion.html
> - shard-iclb: NOTRUN -> [WARN][19] ([i915#2658])
>[19]: 
> 

Re: [Intel-gfx] [PATCH v9 1/3] i915/gvt: Separate the MMIO tracking table from GVT-g

[Zhenyu Wang]

On 2022.04.07 03:19:43 -0400, Zhi Wang wrote:
> From: Zhi Wang 
> 
> To support the new mdev interfaces and the re-factor patches from
> Christoph, which moves the GVT-g code into a dedicated module, the GVT-g
> MMIO tracking table needs to be separated from GVT-g.
>

Looks fine to me. Thanks!

Reviewed-by: Zhenyu Wang 


signature.asc
Description: PGP signature

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warnings about PSR lock not held

[Hogander, Jouni]

On Wed, 2022-04-06 at 14:05 -0700, José Roberto de Souza wrote:
> Commit 3b6f409547fb ("drm/i915/display/psr: Lock and unlock PSR
> around
> pipe updates") did not took into account async flips with PSR1 and
> PSR2 HW tracking, causing PSR lock not be held and causing warnings
> when intel_psr2_program_trans_man_trk_ctl() is executed.
> 
> So here taking the PSR lock before the earlier return in
> intel_pipe_update_start/end().

Reviewed-by: Jouni Högander 
> 


> Cc: Jouni Högander 
> Reported-by: Imre Deak 
> Fixes: 3b6f409547fb ("drm/i915/display/psr: Lock and unlock PSR
> around pipe updates")
> Signed-off-by: José Roberto de Souza 
> ---
>  drivers/gpu/drm/i915/display/intel_crtc.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
> b/drivers/gpu/drm/i915/display/intel_crtc.c
> index a5439182d5ae4..4442aa355f868 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -487,6 +487,8 @@ void intel_pipe_update_start(struct
> intel_crtc_state *new_crtc_state)
>   intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
>   DEFINE_WAIT(wait);
>  
> + intel_psr_lock(new_crtc_state);
> +
>   if (new_crtc_state->do_async_flip)
>   return;
>  
> @@ -507,8 +509,6 @@ void intel_pipe_update_start(struct
> intel_crtc_state *new_crtc_state)
> VBLANK_EVASION_TI
> ME_US);
>   max = vblank_start - 1;
>  
> - intel_psr_lock(new_crtc_state);
> -
>   if (min <= 0 || max <= 0)
>   goto irq_disable;
>  
> @@ -634,6 +634,8 @@ void intel_pipe_update_end(struct
> intel_crtc_state *new_crtc_state)
>   ktime_t end_vbl_time = ktime_get();
>   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
> + intel_psr_unlock(new_crtc_state);
> +
>   if (new_crtc_state->do_async_flip)
>   return;
>  
> @@ -685,8 +687,6 @@ void intel_pipe_update_end(struct
> intel_crtc_state *new_crtc_state)
>  
>   local_irq_enable();
>  
> - intel_psr_unlock(new_crtc_state);
> -
>   if (intel_vgpu_active(dev_priv))
>   return;
>  

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)
URL   : https://patchwork.freedesktop.org/series/102322/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11471 -> Patchwork_22810


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_22810 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22810, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/index.html

Participating hosts (50 -> 48)
--

  Additional (3): fi-tgl-u2 bat-hsw-1 fi-pnv-d510 
  Missing(5): shard-tglu fi-bsw-cyan fi-ctg-p8600 shard-rkl fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22810:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@coherency:
- fi-bdw-5557u:   NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-bdw-5557u/igt@i915_selftest@l...@coherency.html

  
Known issues


  Here are the changes found in Patchwork_22810 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-hsw-4770:NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#109315]) +17 
similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-hsw-4770/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_huc_copy@huc-copy:
- fi-pnv-d510:NOTRUN -> [SKIP][3] ([fdo#109271]) +57 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-pnv-d510/igt@gem_huc_c...@huc-copy.html
- fi-tgl-u2:  NOTRUN -> [SKIP][4] ([i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@kms_busy@basic@flip:
- fi-tgl-u2:  NOTRUN -> [DMESG-WARN][5] ([i915#402])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-u2/igt@kms_busy@ba...@flip.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-tgl-u2:  NOTRUN -> [SKIP][6] ([fdo#109284] / [fdo#111827]) +8 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-u2/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@vga-edid-read:
- fi-bdw-5557u:   NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-bdw-5557u/igt@kms_chamel...@vga-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-tgl-u2:  NOTRUN -> [SKIP][8] ([i915#4103]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-tgl-u2:  NOTRUN -> [SKIP][9] ([fdo#109285])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-u2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-pnv-d510:NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#5341])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-pnv-d510/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-bdw-5557u:   NOTRUN -> [SKIP][11] ([fdo#109271]) +14 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-bdw-5557u/igt@kms_setm...@basic-clone-single-crtc.html
- fi-tgl-u2:  NOTRUN -> [SKIP][12] ([i915#3555])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-u2/igt@kms_setm...@basic-clone-single-crtc.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-bdw-5557u:   [INCOMPLETE][13] ([i915#146]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_heartbeat:
- {fi-tgl-dsi}:   [DMESG-FAIL][15] -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[INCOMPLETE][17] ([i915#4785]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
  

[Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)
URL   : https://patchwork.freedesktop.org/series/102322/
State : warning

== Summary ==

CALLscripts/checksyscalls.sh
  CALLscripts/atomic/check-atomics.sh
  CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready  (#1)
  MODPOST modules-only.symvers
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
scripts/Makefile.modpost:134: recipe for target 'modules-only.symvers' failed
make[1]: *** [modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
Makefile:1749: recipe for target 'modules' failed
make: *** [modules] Error 2

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22810/build_32bit.log

Re: [Intel-gfx] [PATCH 3/4] drm/fourcc: Introduce format modifier for DG2 clear color

[Juha-Pekka Heikkila]

Reviewed-by: Juha-Pekka Heikkila 

On 4.4.2022 16.38, Imre Deak wrote:

From: Mika Kahola 

DG2 clear color render compression uses Tile4 layout. Therefore, we need
to define a new format modifier for uAPI to support clear color rendering.

v2:
   Display version is fixed. [Imre]
   KDoc is enhanced for cc modifier. [Nanley & Lionel]
v3:
   Split out the modifier addition to a separate patch.
   Clarify the modifier layout description.

Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Mika Kahola 
cc: Anshuman Gupta 
Signed-off-by: Juha-Pekka Heikkilä 
Signed-off-by: Ramalingam C 
Signed-off-by: Imre Deak 
Acked-by: Nanley Chery 
---
  include/uapi/drm/drm_fourcc.h | 14 ++
  1 file changed, 14 insertions(+)

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 4a5117715db3c..e5074162bcdd4 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -605,6 +605,20 @@ extern "C" {
   */
  #define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11)
  
+/*

+ * Intel Color Control Surface with Clear Color (CCS) for DG2 render 
compression.
+ *
+ * The main surface is Tile 4 and at plane index 0. The CCS data is stored
+ * outside of the GEM object in a reserved memory area dedicated for the
+ * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
+ * main surface pitch is required to be a multiple of four Tile 4 widths. The
+ * clear color is stored at plane index 1 and the pitch should be ignored. The
+ * format of the 256 bits of clear color data matches the one used for the
+ * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description
+ * for details.
+ */
+#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12)
+
  /*
   * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
   *

Re: [Intel-gfx] [PATCH 2/4] drm/i915/dg2: Add support for DG2 render and media compression

[Juha-Pekka Heikkila]

Reviewed-by: Juha-Pekka Heikkila 

On 4.4.2022 16.38, Imre Deak wrote:

From: Matt Roper 

Add support for DG2 render and media compression, for the description of
buffer layouts see the previous patch adding the corresponding
frame buffer modifiers.

v2:
   Display version fix [Imre]
v3:
   Split out modifier addition to separate patch.

Signed-off-by: Matt Roper 
cc: Radhakrishna Sripada 
Signed-off-by: Mika Kahola 
cc: Anshuman Gupta 
Signed-off-by: Juha-Pekka Heikkilä 
Signed-off-by: Ramalingam C 
Signed-off-by: Imre Deak 
---
  drivers/gpu/drm/i915/display/intel_fb.c   | 13 ++
  .../drm/i915/display/skl_universal_plane.c| 26 ---
  2 files changed, 35 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e9ad142ac40fa..447003a91160e 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -141,6 +141,14 @@ struct intel_modifier_desc {
  
  static const struct intel_modifier_desc intel_modifiers[] = {

{
+   .modifier = I915_FORMAT_MOD_4_TILED_DG2_MC_CCS,
+   .display_ver = { 13, 13 },
+   .plane_caps = INTEL_PLANE_CAP_TILING_4 | INTEL_PLANE_CAP_CCS_MC,
+   }, {
+   .modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS,
+   .display_ver = { 13, 13 },
+   .plane_caps = INTEL_PLANE_CAP_TILING_4 | INTEL_PLANE_CAP_CCS_RC,
+   }, {
.modifier = I915_FORMAT_MOD_4_TILED,
.display_ver = { 13, 13 },
.plane_caps = INTEL_PLANE_CAP_TILING_4,
@@ -550,6 +558,8 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, 
int color_plane)
return 128;
else
return 512;
+   case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
+   case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
case I915_FORMAT_MOD_4_TILED:
/*
 * Each 4K tile consists of 64B(8*8) subtiles, with
@@ -752,6 +762,9 @@ unsigned int intel_surf_alignment(const struct 
drm_framebuffer *fb,
case I915_FORMAT_MOD_4_TILED:
case I915_FORMAT_MOD_Yf_TILED:
return 1 * 1024 * 1024;
+   case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
+   case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
+   return 16 * 1024;
default:
MISSING_CASE(fb->modifier);
return 0;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index c57fca1fe6788..b939c503bc6ff 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -773,6 +773,14 @@ static u32 skl_plane_ctl_tiling(u64 fb_modifier)
return PLANE_CTL_TILED_Y;
case I915_FORMAT_MOD_4_TILED:
return PLANE_CTL_TILED_4;
+   case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
+   return PLANE_CTL_TILED_4 |
+   PLANE_CTL_RENDER_DECOMPRESSION_ENABLE |
+   PLANE_CTL_CLEAR_COLOR_DISABLE;
+   case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
+   return PLANE_CTL_TILED_4 |
+   PLANE_CTL_MEDIA_DECOMPRESSION_ENABLE |
+   PLANE_CTL_CLEAR_COLOR_DISABLE;
case I915_FORMAT_MOD_Y_TILED_CCS:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
return PLANE_CTL_TILED_Y | 
PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
@@ -2168,6 +2176,10 @@ static bool gen12_plane_has_mc_ccs(struct 
drm_i915_private *i915,
if (IS_ADLP_DISPLAY_STEP(i915, STEP_A0, STEP_B0))
return false;
  
+	/* Wa_14013215631 */

+   if (IS_DG2_DISPLAY_STEP(i915, STEP_A0, STEP_C0))
+   return false;
+
return plane_id < PLANE_SPRITE4;
  }
  
@@ -2415,9 +2427,10 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,

case PLANE_CTL_TILED_Y:
plane_config->tiling = I915_TILING_Y;
if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)
-   fb->modifier = DISPLAY_VER(dev_priv) >= 12 ?
-   I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS :
-   I915_FORMAT_MOD_Y_TILED_CCS;
+   if (DISPLAY_VER(dev_priv) >= 12)
+   fb->modifier = 
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+   else
+   fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS;
else if (val & PLANE_CTL_MEDIA_DECOMPRESSION_ENABLE)
fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
else
@@ -2425,7 +2438,12 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
break;
case PLANE_CTL_TILED_YF: /* aka PLANE_CTL_TILED_4 on XE_LPD+ */
if (HAS_4TILE(dev_priv)) {
-   fb->modifier = 

Re: [Intel-gfx] [PATCH 4/4] drm/i915/dg2: Add support for DG2 clear color compression

[Imre Deak]

On Thu, Apr 07, 2022 at 08:47:13AM +0300, Gupta, Anshuman wrote:
> > -Original Message-
> > From: Deak, Imre 
> > Sent: Monday, April 4, 2022 7:09 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Gupta, Anshuman ; Kahola, Mika
> > ; Heikkila, Juha-pekka  > pekka.heikk...@intel.com>; C, Ramalingam 
> > Subject: [PATCH 4/4] drm/i915/dg2: Add support for DG2 clear color
> > compression
> > 
> > From: Anshuman Gupta 
> > 
> > DG2 onwards discrete gfx has support for new flat CCS mapping, which
> > brings in display feature in to avoid Aux walk for compressed
> > surface. This support build on top of Flat CCS support added in
> > XEHPSDV.  FLAT CCS surface base address should be 64k aligned,
> > Compressed displayable surfaces must use tile4 format.
> 
> IMHO commit log should also describe a bit of description for DG2
> Clear color. Original patch was meant to add FLAT_CCS support, commit
> log not fully aligns with commit header.
>
> May be it would be good if patch authorship changes to the DG2
> original clear color author for any required follow-up later ? 

I kept your authorship based on
https://patchwork.freedesktop.org/patch/471775/?series=95686=5

and then an Ack from you. But yes, there's been some changes since the
support for DG2 CCS was originally added, with multiple people involved,
so the authorship may be not accurate. I can update that along with the
commit message.

> > HAS: 1407880786
> > B.Spec : 7655
> > B.Spec : 53902
> > 
> > v2: Merge all bits required for the support of functionality into this
> > patch from the patch adding the corresponding modifier.
> > 
> > Cc: Mika Kahola 
> > Signed-off-by: Anshuman Gupta 
> > Signed-off-by: Juha-Pekka Heikkilä 
> > Signed-off-by: Ramalingam C 
> > Signed-off-by: Imre Deak 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c  |  4 +-
> >  drivers/gpu/drm/i915/display/intel_fb.c   | 40 ++-
> >  .../drm/i915/display/skl_universal_plane.c| 25 
> >  3 files changed, 52 insertions(+), 17 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index eee185ed41c3e..ca997a0a05174 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -8477,7 +8477,9 @@ static void
> > intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
> > 
> > /*
> >  * The layout of the fast clear color value expected by HW
> > -* (the DRM ABI requiring this value to be located in fb at 
> > offset
> > 0 of plane#2):
> > +* (the DRM ABI requiring this value to be located in fb at
> > +* offset 0 of cc plane, plane #2 previous generations or
> > +* plane #1 for flat ccs):
> >  * - 4 x 4 bytes per-channel value
> >  *   (in surface type specific float/int format provided by the 
> > fb
> > user)
> >  * - 8 bytes native color value used by the display diff --git
> > a/drivers/gpu/drm/i915/display/intel_fb.c
> > b/drivers/gpu/drm/i915/display/intel_fb.c
> > index 447003a91160e..9f5a6b79e95b5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -107,6 +107,21 @@ static const struct drm_format_info
> > gen12_ccs_cc_formats[] = {
> >   .hsub = 1, .vsub = 1, .has_alpha = true },  };
> > 
> > +static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
> > +   { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2,
> > + .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > + .hsub = 1, .vsub = 1, },
> > +   { .format = DRM_FORMAT_XBGR, .depth = 24, .num_planes = 2,
> > + .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > + .hsub = 1, .vsub = 1, },
> > +   { .format = DRM_FORMAT_ARGB, .depth = 32, .num_planes = 2,
> > + .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > + .hsub = 1, .vsub = 1, .has_alpha = true },
> > +   { .format = DRM_FORMAT_ABGR, .depth = 32, .num_planes = 2,
> > + .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> > + .hsub = 1, .vsub = 1, .has_alpha = true }, };
> > +
> >  struct intel_modifier_desc {
> > u64 modifier;
> > struct {
> > @@ -144,6 +159,14 @@ static const struct intel_modifier_desc
> > intel_modifiers[] = {
> > .modifier = I915_FORMAT_MOD_4_TILED_DG2_MC_CCS,
> > .display_ver = { 13, 13 },
> > .plane_caps = INTEL_PLANE_CAP_TILING_4 |
> > INTEL_PLANE_CAP_CCS_MC,
> > +   }, {
> > +   .modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC,
> > +   .display_ver = { 13, 13 },
> > +   .plane_caps = INTEL_PLANE_CAP_TILING_4 |
> > INTEL_PLANE_CAP_CCS_RC_CC,
> > +
> > +   .ccs.cc_planes = BIT(1),
> > +
> > +   FORMAT_OVERRIDE(gen12_flat_ccs_cc_formats),
> >   

Re: [Intel-gfx] [PATCH] drm/i915/rps: Centralize computation of freq caps

[Gupta, Anshuman]

> -Original Message-
> From: Dixit, Ashutosh 
> Sent: Thursday, April 7, 2022 12:49 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Gupta, Anshuman 
> Subject: [PATCH] drm/i915/rps: Centralize computation of freq caps
> 
> Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
> formats (bit positions, widths, registers and units) of these vary for 
> different
> generations with even more variations arriving in the future. In order not to
> have to do identical computation for these caps in multiple places, here we
> centralize the computation of these caps. This makes the code cleaner and also
> more extensible for the future.
> 
> v2: Clarify that caps are in "hw units" in comments (Lucas De Marchi)
> v3: Minor checkpatch fix
> v4: s/intel_rps_get_freq_caps/gen6_rps_get_freq_caps/ (Badal Nilawar)
> v5: Changes comments to kernel doc (Anshuman Gupta)
Acked-by: Anshuman Gupta 
> 
> Cc: Anshuman Gupta 
> Signed-off-by: Ashutosh Dixit 
> Reviewed-by: Badal Nilawar 
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c |  24 +---
>  drivers/gpu/drm/i915/gt/intel_rps.c   | 108 +++---
>  drivers/gpu/drm/i915/gt/intel_rps.h   |   2 +-
>  drivers/gpu/drm/i915/gt/intel_rps_types.h |  15 +++
>  drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   |  14 +--
>  5 files changed, 91 insertions(+), 72 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> index 003a53c49c86..0c6b9eb724ae 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> @@ -342,17 +342,16 @@ void intel_gt_pm_frequency_dump(struct intel_gt
> *gt, struct drm_printer *p)
>   } else if (GRAPHICS_VER(i915) >= 6) {
>   u32 rp_state_limits;
>   u32 gt_perf_status;
> - u32 rp_state_cap;
> + struct intel_rps_freq_caps caps;
>   u32 rpmodectl, rpinclimit, rpdeclimit;
>   u32 rpstat, cagf, reqf;
>   u32 rpcurupei, rpcurup, rpprevup;
>   u32 rpcurdownei, rpcurdown, rpprevdown;
>   u32 rpupei, rpupt, rpdownei, rpdownt;
>   u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask;
> - int max_freq;
> 
>   rp_state_limits = intel_uncore_read(uncore,
> GEN6_RP_STATE_LIMITS);
> - rp_state_cap = intel_rps_read_state_cap(rps);
> + gen6_rps_get_freq_caps(rps, );
>   if (IS_GEN9_LP(i915))
>   gt_perf_status = intel_uncore_read(uncore,
> BXT_GT_PERF_STATUS);
>   else
> @@ -474,25 +473,12 @@ void intel_gt_pm_frequency_dump(struct intel_gt
> *gt, struct drm_printer *p)
>   drm_printf(p, "RP DOWN THRESHOLD: %d (%lldns)\n",
>  rpdownt, intel_gt_pm_interval_to_ns(gt, rpdownt));
> 
> - max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 :
> - rp_state_cap >> 16) & 0xff;
> - max_freq *= (IS_GEN9_BC(i915) ||
> -  GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER :
> 1);
>   drm_printf(p, "Lowest (RPN) frequency: %dMHz\n",
> -intel_gpu_freq(rps, max_freq));
> -
> - max_freq = (rp_state_cap & 0xff00) >> 8;
> - max_freq *= (IS_GEN9_BC(i915) ||
> -  GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER :
> 1);
> +intel_gpu_freq(rps, caps.min_freq));
>   drm_printf(p, "Nominal (RP1) frequency: %dMHz\n",
> -intel_gpu_freq(rps, max_freq));
> -
> - max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 :
> - rp_state_cap >> 0) & 0xff;
> - max_freq *= (IS_GEN9_BC(i915) ||
> -  GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER :
> 1);
> +intel_gpu_freq(rps, caps.rp1_freq));
>   drm_printf(p, "Max non-overclocked (RP0) frequency:
> %dMHz\n",
> -intel_gpu_freq(rps, max_freq));
> +intel_gpu_freq(rps, caps.rp0_freq));
>   drm_printf(p, "Max overclocked frequency: %dMHz\n",
>  intel_gpu_freq(rps, rps->max_freq));
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
> b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c9fdf7906c5..3476a11f294c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -1070,24 +1070,67 @@ int intel_rps_set(struct intel_rps *rps, u8 val)
>   return 0;
>  }
> 
> -static void gen6_rps_init(struct intel_rps *rps)
> +static u32 intel_rps_read_state_cap(struct intel_rps *rps)
>  {
>   struct drm_i915_private *i915 = rps_to_i915(rps);
> - u32 rp_state_cap = intel_rps_read_state_cap(rps);
> + struct intel_uncore *uncore = rps_to_uncore(rps);
> 
> - /* All of these values are in units of 50MHz */
> + if 

Re: [Intel-gfx] [PATCH 02/15] dma-buf: specify usage while adding fences to dma_resv obj v7

[Javier Martinez Canillas]

On 4/7/22 15:13, Christian König wrote:
> Am 07.04.22 um 15:08 schrieb Javier Martinez Canillas:
>> Hello Christian,
>>
>> On 4/7/22 10:59, Christian König wrote:
>>> Instead of distingting between shared and exclusive fences specify
>>> the fence usage while adding fences.
>>>
>>> Rework all drivers to use this interface instead and deprecate the old one.
>>>
>> This patch broke compilation for the vc4 DRM driver.
> 
> My apologies for that. I've tried really hard to catch all cases, but 
> looks like I missed some.
> 

No worries, I know that's not easy to get all callers when doing these
subsystem wide changes.

>> I've this patch locally
>> which seems to work but I don't know enough about the fence API to know if
>> is correct.
>>
>> If you think is the proper fix then I can post it as a patch.
> 
> Yes, that patch looks absolutely correct to me.
>

Thanks for looking at it.
 
> Feel free to add an Reviewed-by: Christian König 
>  and CC me so that I can push it to 
> drm-misc-next ASAP.
> 

I can also do it after posting (just to get a proper Link: tag with dim)

Already have another set that wanted to push but found this issue after
doing a build test before pushing.

> Thanks,
> Christian.
> 
-- 
Best regards,

Javier Martinez Canillas
Linux Engineering
Red Hat

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Drop redundant IS_VALLEYVIEW check in __get_rc6() (rev2)

[Tvrtko Ursulin]

On 06/04/2022 12:10, Gupta, Anshuman wrote:

-Original Message-
From: Tvrtko Ursulin 
Sent: Wednesday, April 6, 2022 4:23 PM
To: Gupta, Anshuman ; intel-
g...@lists.freedesktop.org
Subject: Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Drop redundant
IS_VALLEYVIEW check in __get_rc6() (rev2)


On 06/04/2022 11:36, Anshuman Gupta wrote:

On 2022-03-15 at 05:27:39 +0530, Patchwork wrote:
Pushed to drm-intel-next.
Thanks for review and patch.


Probably better if went through drm-intel-gt-next (not the files it touches are
mostly in gt/ and registers have GT in their names, and RC6 is obviously a 
render
thing) but it's fine, small so no harm done, just note for the future please.

Thanks for letting me know about it,  i was not aware about drm-intel-gt-next.
Will take care of it in future.
Is there any Doc on different intel branches to refer.


I was sure it exists, but it looks like that was just on the mailing 
list and we haven't documented it yet in dim. Stay tuned.


Regards,

Tvrtko


Thanks,
Anshuman Gupta.


Regards,

Tvrtko


Anshuman Gupta.

 Patch Details

 Series: drm/i915/pmu: Drop redundant IS_VALLEYVIEW check in

__get_rc6()

 (rev2)
 URL: [1]https://patchwork.freedesktop.org/series/101301/
 State: success
 Details:

[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22559/index.htm
l

CI Bug Log - changes from CI_DRM_11360_full ->
Patchwork_22559_full

Summary

 SUCCESS

 No regressions found.

Participating hosts (13 -> 13)

 No changes in participating hosts

Known issues

 Here are the changes found in Patchwork_22559_full that come from

known

 issues:

CI changes

  Possible fixes

   * boot:
+ shard-glk: ([3]PASS, [4]PASS, [5]PASS, [6]PASS, [7]PASS,
  [8]FAIL, [9]PASS, [10]PASS, [11]PASS, [12]PASS, [13]PASS,
  [14]FAIL, [15]PASS, [16]PASS, [17]PASS, [18]PASS, [19]PASS,
  [20]PASS, [21]PASS, [22]PASS, [23]PASS, [24]PASS, [25]PASS,
  [26]PASS, [27]PASS) ([i915#4392]) -> ([28]PASS, [29]PASS,
  [30]PASS, [31]PASS, [32]PASS, [33]PASS, [34]PASS, [35]PASS,
  [36]PASS, [37]PASS, [38]PASS, [39]PASS, [40]PASS, [41]PASS,
  [42]PASS, [43]PASS, [44]PASS, [45]PASS, [46]PASS, [47]PASS,
  [48]PASS, [49]PASS, [50]PASS, [51]PASS, [52]PASS)

IGT changes

  Issues hit

   * igt@gem_ccs@block-copy-compressed:
+ shard-tglb: NOTRUN -> [53]SKIP ([i915#5325])
   * igt@gem_create@create-massive:
+ shard-skl: NOTRUN -> [54]DMESG-WARN ([i915#4991])
   * igt@gem_exec_balancer@parallel-balancer:
+ shard-iclb: [55]PASS -> [56]SKIP ([i915#4525])
   * igt@gem_exec_fair@basic-none-rrul@rcs0:
+ shard-tglb: [57]PASS -> [58]FAIL ([i915#2842]) +1 similar
  issue
   * igt@gem_exec_fair@basic-none-share@rcs0:
+ shard-iclb: [59]PASS -> [60]FAIL ([i915#2842])
   * igt@gem_exec_fair@basic-none@vecs0:
+ shard-apl: [61]PASS -> [62]FAIL ([i915#2842])
   * igt@gem_exec_fair@basic-pace@vcs1:
+ shard-kbl: [63]PASS -> [64]FAIL ([i915#2842]) +1 similar issue
   * igt@gem_exec_whisper@basic-queues-forked-all:
+ shard-glk: [65]PASS -> [66]DMESG-WARN ([i915#118])
   * igt@gem_huc_copy@huc-copy:
+ shard-glk: NOTRUN -> [67]SKIP ([fdo#109271] / [i915#2190])
   * igt@gem_lmem_swapping@parallel-random:
+ shard-iclb: NOTRUN -> [68]SKIP ([i915#4613])
   * igt@gem_lmem_swapping@parallel-random-engines:
+ shard-glk: NOTRUN -> [69]SKIP ([fdo#109271] / [i915#4613])
   * igt@gem_lmem_swapping@random:
+ shard-apl: NOTRUN -> [70]SKIP ([fdo#109271] / [i915#4613]) +1
  similar issue
   * igt@gem_lmem_swapping@random-engines:
+ shard-skl: NOTRUN -> [71]SKIP ([fdo#109271] / [i915#4613]) +3
  similar issues
   * igt@gem_pread@exhaustion:
+ shard-skl: NOTRUN -> [72]WARN ([i915#2658])
   * igt@gem_pxp@create-protected-buffer:
+ shard-iclb: NOTRUN -> [73]SKIP ([i915#4270])
   * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled:
+ shard-iclb: NOTRUN -> [74]SKIP ([i915#768])
   * igt@gem_userptr_blits@input-checking:
+ shard-iclb: NOTRUN -> [75]DMESG-WARN ([i915#4991])
   * igt@gem_userptr_blits@unsync-unmap:
+ shard-tglb: NOTRUN -> [76]SKIP ([i915#3297])
   * igt@gen7_exec_parse@oacontrol-tracking:
+ shard-iclb: NOTRUN -> [77]SKIP ([fdo#109289]) +1 similar issue
   * igt@gen9_exec_parse@allowed-all:
+ shard-glk: [78]PASS -> [79]DMESG-WARN ([i915#1436] /
  [i915#716])
   * igt@i915_module_load@reload-with-fault-injection:
+ shard-skl: NOTRUN -> [80]DMESG-WARN ([i915#1982])
   * igt@i915_pm_dc@dc6-dpms:
+ shard-skl: NOTRUN -> [81]FAIL ([i915#454]) +1 similar issue

Re: [Intel-gfx] [PATCH 02/15] dma-buf: specify usage while adding fences to dma_resv obj v7

[Javier Martinez Canillas]

Hello Christian,

On 4/7/22 10:59, Christian König wrote:
> Instead of distingting between shared and exclusive fences specify
> the fence usage while adding fences.
> 
> Rework all drivers to use this interface instead and deprecate the old one.
> 

This patch broke compilation for the vc4 DRM driver. I've this patch locally
which seems to work but I don't know enough about the fence API to know if
is correct.

If you think is the proper fix then I can post it as a patch.

>From 3e96db4827ef69b38927476659cbb4469a0246e6 Mon Sep 17 00:00:00 2001
From: Javier Martinez Canillas 
Date: Thu, 7 Apr 2022 14:54:07 +0200
Subject: [PATCH] drm/vc4: Use newer fence API to fix build error

The commit 73511edf8b19 ("dma-buf: specify usage while adding fences to
dma_resv obj v7") ported all the DRM drivers to use the newer fence API
that specifies the usage with the enum dma_resv_usage rather than doing
an explicit shared / exclusive distinction.

But the commit didn't do it properly in two callers of the vc4 driver,
leading to build errors.

Fixes: 73511edf8b19 ("dma-buf: specify usage while adding fences to dma_resv 
obj v7")
Signed-off-by: Javier Martinez Canillas 
---
 drivers/gpu/drm/vc4/vc4_gem.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
index 38550317e025..9eaf304fc20d 100644
--- a/drivers/gpu/drm/vc4/vc4_gem.c
+++ b/drivers/gpu/drm/vc4/vc4_gem.c
@@ -546,7 +546,8 @@ vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t 
seqno)
bo = to_vc4_bo(>bo[i]->base);
bo->seqno = seqno;
 
-   dma_resv_add_fence(bo->base.base.resv, exec->fence);
+   dma_resv_add_fence(bo->base.base.resv, exec->fence,
+  DMA_RESV_USAGE_READ);
}
 
list_for_each_entry(bo, >unref_list, unref_head) {
@@ -557,7 +558,8 @@ vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t 
seqno)
bo = to_vc4_bo(>rcl_write_bo[i]->base);
bo->write_seqno = seqno;
 
-   dma_resv_add_excl_fence(bo->base.base.resv, exec->fence);
+   dma_resv_add_fence(bo->base.base.resv, exec->fence,
+  DMA_RESV_USAGE_WRITE);
}
 }
 
-- 
2.35.1

-- 
Best regards,

Javier Martinez Canillas
Linux Engineering
Red Hat

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)
URL   : https://patchwork.freedesktop.org/series/102322/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
c1adc525a765 drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A
-:81: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#81: FILE: drivers/gpu/drm/i915/display/intel_bw.c:809:
+   crtc_bw->bpp_cdclk = 
DIV_ROUND_UP_ULL(mul_u32_u32(crtc_state->pixel_rate,
+ crtc_bw->pipe_cumulative_bpp * 
512),

-:117: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#117: FILE: drivers/gpu/drm/i915/display/intel_bw.c:854:
+   bpp_cdclk = max_t(unsigned int, crtc_bw->bpp_cdclk,
+   bpp_cdclk);

total: 0 errors, 0 warnings, 2 checks, 124 lines checked

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/atomic-helpers: remove legacy_cursor_update hacks (rev2)

[Patchwork]

== Series Details ==

Series: drm/atomic-helpers: remove legacy_cursor_update hacks (rev2)
URL   : https://patchwork.freedesktop.org/series/102028/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11471 -> Patchwork_22809


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/index.html

Participating hosts (50 -> 46)
--

  Additional (2): bat-hsw-1 fi-tgl-u2 
  Missing(6): shard-tglu bat-dg1-6 fi-bsw-cyan fi-ctg-p8600 shard-rkl 
fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_22809:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@reload:
- {bat-hsw-1}:NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/bat-hsw-1/igt@i915_module_l...@reload.html

  
Known issues


  Here are the changes found in Patchwork_22809 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-hsw-4770:NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#109315]) +17 
similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-hsw-4770/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_huc_copy@huc-copy:
- fi-tgl-u2:  NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@kms_busy@basic@flip:
- fi-tgl-u2:  NOTRUN -> [DMESG-WARN][4] ([i915#402])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-u2/igt@kms_busy@ba...@flip.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-tgl-u2:  NOTRUN -> [SKIP][5] ([fdo#109284] / [fdo#111827]) +8 
similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-u2/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-tgl-u2:  NOTRUN -> [SKIP][6] ([i915#4103]) +1 similar issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-tgl-u2:  NOTRUN -> [SKIP][7] ([fdo#109285])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-u2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-tgl-u2:  NOTRUN -> [SKIP][8] ([i915#3555])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-u2/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@runner@aborted:
- fi-bdw-5557u:   NOTRUN -> [FAIL][9] ([i915#4312])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-bdw-5557u/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-bdw-5557u:   [INCOMPLETE][10] ([i915#146]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_heartbeat:
- {fi-tgl-dsi}:   [DMESG-FAIL][12] -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[INCOMPLETE][14] ([i915#4785]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  
 Warnings 

  * igt@core_hotunplug@unbind-rebind:
- fi-kbl-soraka:  [DMESG-WARN][16] ([i915#1982] / [i915#5437]) -> 
[DMESG-WARN][17] ([i915#5437])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11471/fi-kbl-soraka/igt@core_hotunp...@unbind-rebind.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22809/fi-kbl-soraka/igt@core_hotunp...@unbind-rebind.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  

[Intel-gfx] [PATCH 19/20] mei: debugfs: add pxp mode to devstate in debugfs

[Alexander Usyskin]

From: Tomas Winkler 

CC: Vitaly Lubart 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/debugfs.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c
index 1ce61e9e24fc..4074fec866a6 100644
--- a/drivers/misc/mei/debugfs.c
+++ b/drivers/misc/mei/debugfs.c
@@ -86,6 +86,20 @@ static int mei_dbgfs_active_show(struct seq_file *m, void 
*unused)
 }
 DEFINE_SHOW_ATTRIBUTE(mei_dbgfs_active);
 
+static const char *mei_dev_pxp_mode_str(enum mei_dev_pxp_mode state)
+{
+#define MEI_PXP_MODE(state) case MEI_DEV_PXP_##state: return #state
+   switch (state) {
+   MEI_PXP_MODE(DEFAULT);
+   MEI_PXP_MODE(INIT);
+   MEI_PXP_MODE(SETUP);
+   MEI_PXP_MODE(READY);
+   default:
+   return "unknown";
+   }
+#undef MEI_PXP_MODE
+}
+
 static int mei_dbgfs_devstate_show(struct seq_file *m, void *unused)
 {
struct mei_device *dev = m->private;
@@ -112,6 +126,9 @@ static int mei_dbgfs_devstate_show(struct seq_file *m, void 
*unused)
seq_printf(m, "pg:  %s, %s\n",
   mei_pg_is_enabled(dev) ? "ENABLED" : "DISABLED",
   mei_pg_state_str(mei_pg_state(dev)));
+
+   seq_printf(m, "pxp: %s\n", mei_dev_pxp_mode_str(dev->pxp_mode));
+
return 0;
 }
 DEFINE_SHOW_ATTRIBUTE(mei_dbgfs_devstate);
-- 
2.32.0

[Intel-gfx] [PATCH 20/20] drm/i915/gsc: allocate extended operational memory in LMEM

[Alexander Usyskin]

From: Tomas Winkler 

GSC requires more operational memory than available on chip.
Reserve 4M of LMEM for GSC operation. The memory is provided to the
GSC as struct resource to the auxiliary data of the child device.

Signed-off-by: Tomas Winkler 
Signed-off-by: Daniele Ceraolo Spurio 
Cc: Alan Previn 
---
 drivers/gpu/drm/i915/gt/intel_gsc.c | 92 ++---
 drivers/gpu/drm/i915/gt/intel_gsc.h |  3 +
 2 files changed, 88 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index bfc307e49bf9..4d87519d5773 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -7,6 +7,7 @@
 #include 
 #include "i915_drv.h"
 #include "i915_reg.h"
+#include "gem/i915_gem_region.h"
 #include "gt/intel_gsc.h"
 #include "gt/intel_gt.h"
 
@@ -36,12 +37,68 @@ static int gsc_irq_init(int irq)
return irq_set_chip_data(irq, NULL);
 }
 
+static int
+gsc_ext_om_alloc(struct intel_gsc *gsc, struct intel_gsc_intf *intf, size_t 
size)
+{
+   struct intel_gt *gt = gsc_to_gt(gsc);
+   struct drm_i915_gem_object *obj;
+   void *vaddr;
+   int err;
+
+   obj = i915_gem_object_create_lmem(gt->i915, size, 
I915_BO_ALLOC_CONTIGUOUS);
+   if (IS_ERR(obj)) {
+   drm_err(>i915->drm, "Failed to allocate gsc memory\n");
+   return PTR_ERR(obj);
+   }
+
+   err = i915_gem_object_pin_pages_unlocked(obj);
+   if (err) {
+   drm_err(>i915->drm, "Failed to pin pages for gsc memory\n");
+   goto out_put;
+   }
+
+   vaddr = i915_gem_object_pin_map_unlocked(obj, 
i915_coherent_map_type(gt->i915, obj, true));
+   if (IS_ERR(vaddr)) {
+   err = PTR_ERR(vaddr);
+   drm_err(>i915->drm, "Failed to map gsc memory\n");
+   goto out_unpin;
+   }
+
+   memset(vaddr, 0, obj->base.size);
+
+   i915_gem_object_unpin_map(obj);
+
+   intf->gem_obj = obj;
+
+   return 0;
+
+out_unpin:
+   i915_gem_object_unpin_pages(obj);
+out_put:
+   i915_gem_object_put(obj);
+   return err;
+}
+
+static void gsc_ext_om_destroy(struct intel_gsc_intf *intf)
+{
+   struct drm_i915_gem_object *obj = fetch_and_zero(>gem_obj);
+
+   if (!obj)
+   return;
+
+   if (i915_gem_object_has_pinned_pages(obj))
+   i915_gem_object_unpin_pages(obj);
+
+   i915_gem_object_put(obj);
+}
+
 struct gsc_def {
const char *name;
unsigned long bar;
size_t bar_size;
bool use_polling;
bool slow_fw;
+   size_t lmem_size;
 };
 
 /* gsc resources and definitions (HECI1 and HECI2) */
@@ -74,6 +131,7 @@ static const struct gsc_def gsc_def_dg2[] = {
.name = "mei-gsc",
.bar = DG2_GSC_HECI1_BASE,
.bar_size = GSC_BAR_LENGTH,
+   .lmem_size = SZ_4M,
},
{
.name = "mei-gscfi",
@@ -90,26 +148,33 @@ static void gsc_release_dev(struct device *dev)
kfree(adev);
 }
 
-static void gsc_destroy_one(struct intel_gsc_intf *intf)
+static void gsc_destroy_one(struct drm_i915_private *i915,
+ struct intel_gsc *gsc, unsigned int intf_id)
 {
+   struct intel_gsc_intf *intf = >intf[intf_id];
+
if (intf->adev) {
auxiliary_device_delete(>adev->aux_dev);
auxiliary_device_uninit(>adev->aux_dev);
intf->adev = NULL;
}
+
if (intf->irq >= 0)
irq_free_desc(intf->irq);
intf->irq = -1;
+
+   gsc_ext_om_destroy(intf);
 }
 
 static void gsc_init_one(struct drm_i915_private *i915,
-struct intel_gsc_intf *intf,
-unsigned int intf_id)
+  struct intel_gsc *gsc,
+  unsigned int intf_id)
 {
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct mei_aux_device *adev;
struct auxiliary_device *aux_dev;
const struct gsc_def *def;
+   struct intel_gsc_intf *intf = >intf[intf_id];
int ret;
 
intf->irq = -1;
@@ -141,7 +206,7 @@ static void gsc_init_one(struct drm_i915_private *i915,
intf->irq = irq_alloc_desc(0);
if (intf->irq < 0) {
drm_err(>drm, "gsc irq error %d\n", intf->irq);
-   return;
+   goto fail;
}
 
ret = gsc_irq_init(intf->irq);
@@ -155,6 +220,19 @@ static void gsc_init_one(struct drm_i915_private *i915,
if (!adev)
goto fail;
 
+   if (def->lmem_size) {
+   dev_dbg(>dev, "setting up GSC lmem\n");
+
+   if (gsc_ext_om_alloc(gsc, intf, def->lmem_size)) {
+   dev_err(>dev, "setting up gsc extended 
operational memory failed\n");
+   kfree(adev);
+   goto fail;
+   }
+
+   

[Intel-gfx] [PATCH 15/20] mei: bus: export common mkhi definitions into a separate header

[Alexander Usyskin]

From: Vitaly Lubart 

Exported common mkhi definitions from bus-fixup.c into a separate
header file mkhi.h for other driver usage.

Signed-off-by: Vitaly Lubart 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/bus-fixup.c | 32 ++---
 drivers/misc/mei/mkhi.h  | 45 
 2 files changed, 47 insertions(+), 30 deletions(-)
 create mode 100644 drivers/misc/mei/mkhi.h

diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 24e91a9ea558..190691abddc9 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -15,6 +15,7 @@
 
 #include "mei_dev.h"
 #include "client.h"
+#include "mkhi.h"
 
 #define MEI_UUID_NFC_INFO UUID_LE(0xd2de1625, 0x382d, 0x417d, \
0x48, 0xa4, 0xef, 0xab, 0xba, 0x8a, 0x12, 0x06)
@@ -80,6 +81,7 @@ static void whitelist(struct mei_cl_device *cldev)
 }
 
 #define OSTYPE_LINUX2
+
 struct mei_os_ver {
__le16 build;
__le16 reserved1;
@@ -89,20 +91,6 @@ struct mei_os_ver {
u8  reserved2;
 } __packed;
 
-#define MKHI_FEATURE_PTT 0x10
-
-struct mkhi_rule_id {
-   __le16 rule_type;
-   u8 feature_id;
-   u8 reserved;
-} __packed;
-
-struct mkhi_fwcaps {
-   struct mkhi_rule_id id;
-   u8 len;
-   u8 data[];
-} __packed;
-
 struct mkhi_fw_ver_block {
u16 minor;
u8 major;
@@ -115,22 +103,6 @@ struct mkhi_fw_ver {
struct mkhi_fw_ver_block ver[MEI_MAX_FW_VER_BLOCKS];
 } __packed;
 
-#define MKHI_FWCAPS_GROUP_ID 0x3
-#define MKHI_FWCAPS_SET_OS_VER_APP_RULE_CMD 6
-#define MKHI_GEN_GROUP_ID 0xFF
-#define MKHI_GEN_GET_FW_VERSION_CMD 0x2
-struct mkhi_msg_hdr {
-   u8  group_id;
-   u8  command;
-   u8  reserved;
-   u8  result;
-} __packed;
-
-struct mkhi_msg {
-   struct mkhi_msg_hdr hdr;
-   u8 data[];
-} __packed;
-
 #define MKHI_OSVER_BUF_LEN (sizeof(struct mkhi_msg_hdr) + \
sizeof(struct mkhi_fwcaps) + \
sizeof(struct mei_os_ver))
diff --git a/drivers/misc/mei/mkhi.h b/drivers/misc/mei/mkhi.h
new file mode 100644
index ..27a9b476904e
--- /dev/null
+++ b/drivers/misc/mei/mkhi.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2003-2020, Intel Corporation. All rights reserved.
+ * Intel Management Engine Interface (Intel MEI) Linux driver
+ */
+
+#ifndef _MEI_MKHI_H_
+#define _MEI_MKHI_H_
+
+#include "mei_dev.h"
+
+#define MKHI_FEATURE_PTT 0x10
+
+#define MKHI_FWCAPS_GROUP_ID 0x3
+#define MKHI_FWCAPS_SET_OS_VER_APP_RULE_CMD 6
+#define MKHI_GEN_GROUP_ID 0xFF
+#define MKHI_GEN_GET_FW_VERSION_CMD 0x2
+
+#define MCHI_GROUP_ID  0xA
+
+struct mkhi_rule_id {
+   __le16 rule_type;
+   u8 feature_id;
+   u8 reserved;
+} __packed;
+
+struct mkhi_fwcaps {
+   struct mkhi_rule_id id;
+   u8 len;
+   u8 data[];
+} __packed;
+
+struct mkhi_msg_hdr {
+   u8  group_id;
+   u8  command;
+   u8  reserved;
+   u8  result;
+} __packed;
+
+struct mkhi_msg {
+   struct mkhi_msg_hdr hdr;
+   u8 data[];
+} __packed;
+
+#endif /* _MEI_MKHI_H_ */
-- 
2.32.0

[Intel-gfx] [PATCH 18/20] mei: gsc: add transition to PXP mode in resume flow

[Alexander Usyskin]

From: Vitaly Lubart 

Added transition to PXP mode in resume flow.

CC: Daniele Ceraolo Spurio 
Signed-off-by: Vitaly Lubart 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/gsc-me.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index fc9419054290..d75fce49e4f7 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -182,11 +182,22 @@ static int __maybe_unused mei_gsc_pm_suspend(struct 
device *device)
 static int __maybe_unused mei_gsc_pm_resume(struct device *device)
 {
struct mei_device *dev = dev_get_drvdata(device);
+   struct auxiliary_device *aux_dev;
+   struct mei_aux_device *adev;
int err;
+   struct mei_me_hw *hw;
 
if (!dev)
return -ENODEV;
 
+   hw = to_me_hw(dev);
+   aux_dev = to_auxiliary_dev(device);
+   adev = auxiliary_dev_to_mei_aux_dev(aux_dev);
+   if (adev->ext_op_mem.start) {
+   mei_gsc_set_ext_op_mem(hw, >ext_op_mem);
+   dev->pxp_mode = MEI_DEV_PXP_INIT;
+   }
+
err = mei_restart(dev);
if (err)
return err;
-- 
2.32.0

[Intel-gfx] [PATCH 14/20] drm/i915/dg2: add gsc with special gsc bar offsets

[Alexander Usyskin]

From: Tomas Winkler 

DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
---
 drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++
 drivers/gpu/drm/i915/i915_pci.c |  1 +
 drivers/gpu/drm/i915/i915_reg.h |  2 ++
 3 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index ffe6716590f0..bfc307e49bf9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -69,6 +69,19 @@ static const struct gsc_def gsc_def_xehpsdv[] = {
}
 };
 
+static const struct gsc_def gsc_def_dg2[] = {
+   {
+   .name = "mei-gsc",
+   .bar = DG2_GSC_HECI1_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   },
+   {
+   .name = "mei-gscfi",
+   .bar = DG2_GSC_HECI2_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   }
+};
+
 static void gsc_release_dev(struct device *dev)
 {
struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
@@ -109,6 +122,8 @@ static void gsc_init_one(struct drm_i915_private *i915,
def = _def_dg1[intf_id];
} else if (IS_XEHPSDV(i915)) {
def = _def_xehpsdv[intf_id];
+   } else if (IS_DG2(i915)) {
+   def = _def_dg2[intf_id];
} else {
drm_warn_once(>drm, "Unknown platform\n");
return;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 06e6dad0d7f7..cb6dcc3f48f4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1051,6 +1051,7 @@ static const struct intel_device_info xehpsdv_info = {
.has_4tile = 1, \
.has_64k_pages = 1, \
.has_guc_deprivilege = 1, \
+   .has_heci_pxp = 1, \
.needs_compact_pt = 1, \
.platform_engine_mask = \
BIT(RCS0) | BIT(BCS0) | \
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1dd7b7de6002..efcfe32cd8eb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -978,6 +978,8 @@
 #define BLT_RING_BASE  0x22000
 #define DG1_GSC_HECI1_BASE 0x00258000
 #define DG1_GSC_HECI2_BASE 0x00259000
+#define DG2_GSC_HECI1_BASE 0x00373000
+#define DG2_GSC_HECI2_BASE 0x00374000
 
 
 
-- 
2.32.0

[Intel-gfx] [PATCH 17/20] mei: gsc: setup gsc extended operational memory

[Alexander Usyskin]

From: Tomas Winkler 

1. Retrieve extended operational memory physical pointers from the
   auxiliary device info.
2. Setup memory registers.
3. Notify firmware that the memory is ready by sending the memory
   ready command.
4. Disable PXP device if GSC is not in PXP mode.

CC: Daniele Ceraolo Spurio 
Signed-off-by: Tomas Winkler 
Signed-off-by: Alexander Usyskin 
---
 drivers/misc/mei/bus-fixup.c  | 70 ++-
 drivers/misc/mei/gsc-me.c | 16 
 drivers/misc/mei/hw-me-regs.h |  7 
 drivers/misc/mei/hw-me.c  | 28 +-
 drivers/misc/mei/mei_dev.h| 10 +
 include/linux/mei_aux.h   |  1 +
 6 files changed, 129 insertions(+), 3 deletions(-)

diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 190691abddc9..d2929f68604d 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -189,6 +189,19 @@ static int mei_fwver(struct mei_cl_device *cldev)
return ret;
 }
 
+static int mei_gfx_memory_ready(struct mei_cl_device *cldev)
+{
+   struct mkhi_gfx_mem_ready req = {0};
+   unsigned int mode = MEI_CL_IO_TX_INTERNAL;
+
+   req.hdr.group_id = MKHI_GROUP_ID_GFX;
+   req.hdr.command = MKHI_GFX_MEMORY_READY_CMD_REQ;
+   req.flags = MKHI_GFX_MEM_READY_PXP_ALLOWED;
+
+   dev_dbg(>dev, "Sending memory ready command\n");
+   return __mei_cl_send(cldev->cl, (u8 *), sizeof(req), 0, mode);
+}
+
 static void mei_mkhi_fix(struct mei_cl_device *cldev)
 {
int ret;
@@ -235,6 +248,39 @@ static void mei_gsc_mkhi_ver(struct mei_cl_device *cldev)
dev_err(>dev, "FW version command failed %d\n", ret);
mei_cldev_disable(cldev);
 }
+
+static void mei_gsc_mkhi_fix_ver(struct mei_cl_device *cldev)
+{
+   int ret;
+
+   /* No need to enable the client if nothing is needed from it */
+   if (!cldev->bus->fw_f_fw_ver_supported &&
+   (cldev->bus->pxp_mode != MEI_DEV_PXP_INIT))
+   return;
+
+   ret = mei_cldev_enable(cldev);
+   if (ret)
+   return;
+
+   if (cldev->bus->pxp_mode == MEI_DEV_PXP_INIT) {
+   ret = mei_gfx_memory_ready(cldev);
+   if (ret < 0)
+   dev_err(>dev, "memory ready command failed 
%d\n", ret);
+   else
+   dev_dbg(>dev, "memory ready command sent\n");
+   /* we go to reset after that */
+   cldev->bus->pxp_mode = MEI_DEV_PXP_SETUP;
+   goto out;
+   }
+
+   ret = mei_fwver(cldev);
+   if (ret < 0)
+   dev_err(>dev, "FW version command failed %d\n",
+   ret);
+out:
+   mei_cldev_disable(cldev);
+}
+
 /**
  * mei_wd - wd client on the bus, change protocol version
  *   as the API has changed.
@@ -474,6 +520,26 @@ static void vt_support(struct mei_cl_device *cldev)
cldev->do_match = 1;
 }
 
+/**
+ * pxp_isready - enable bus client if pxp is ready
+ *
+ * @cldev: me clients device
+ */
+static void pxp_isready(struct mei_cl_device *cldev)
+{
+   struct mei_device *bus = cldev->bus;
+
+   switch (bus->pxp_mode) {
+   case MEI_DEV_PXP_READY:
+   case MEI_DEV_PXP_DEFAULT:
+   cldev->do_match = 1;
+   break;
+   default:
+   cldev->do_match = 0;
+   break;
+   }
+}
+
 #define MEI_FIXUP(_uuid, _hook) { _uuid, _hook }
 
 static struct mei_fixup {
@@ -487,10 +553,10 @@ static struct mei_fixup {
MEI_FIXUP(MEI_UUID_WD, mei_wd),
MEI_FIXUP(MEI_UUID_MKHIF_FIX, mei_mkhi_fix),
MEI_FIXUP(MEI_UUID_IGSC_MKHI, mei_gsc_mkhi_ver),
-   MEI_FIXUP(MEI_UUID_IGSC_MKHI_FIX, mei_gsc_mkhi_ver),
+   MEI_FIXUP(MEI_UUID_IGSC_MKHI_FIX, mei_gsc_mkhi_fix_ver),
MEI_FIXUP(MEI_UUID_HDCP, whitelist),
MEI_FIXUP(MEI_UUID_ANY, vt_support),
-   MEI_FIXUP(MEI_UUID_PAVP, whitelist),
+   MEI_FIXUP(MEI_UUID_PAVP, pxp_isready),
 };
 
 /**
diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index 38d035ae2904..fc9419054290 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -32,6 +32,17 @@ static int mei_gsc_read_hfs(const struct mei_device *dev, 
int where, u32 *val)
return 0;
 }
 
+static void mei_gsc_set_ext_op_mem(const struct mei_me_hw *hw, struct resource 
*mem)
+{
+   u32 low = lower_32_bits(mem->start);
+   u32 hi  = upper_32_bits(mem->start);
+   u32 limit = (resource_size(mem) / SZ_4K) | GSC_EXT_OP_MEM_VALID;
+
+   iowrite32(low, hw->mem_addr + H_GSC_EXT_OP_MEM_BASE_ADDR_LO_REG);
+   iowrite32(hi, hw->mem_addr + H_GSC_EXT_OP_MEM_BASE_ADDR_HI_REG);
+   iowrite32(limit, hw->mem_addr + H_GSC_EXT_OP_MEM_LIMIT_REG);
+}
+
 static int mei_gsc_probe(struct auxiliary_device *aux_dev,
 const struct auxiliary_device_id *aux_dev_id)
 {
@@ -67,6 +78,11 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
 
dev_set_drvdata(device, dev);
 
+   if 

[Intel-gfx] [PATCH 16/20] mei: mkhi: add memory ready command

[Alexander Usyskin]

From: Tomas Winkler 

Add GSC memory ready command.
The command indicates to the firmware that
extend operation memory was setup and
the firmware may enter PXP mode.

CC: Daniele Ceraolo Spurio 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/mkhi.h | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/mkhi.h b/drivers/misc/mei/mkhi.h
index 27a9b476904e..ea9fe487cb0f 100644
--- a/drivers/misc/mei/mkhi.h
+++ b/drivers/misc/mei/mkhi.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (c) 2003-2020, Intel Corporation. All rights reserved.
+ * Copyright (c) 2003-2021, Intel Corporation. All rights reserved.
  * Intel Management Engine Interface (Intel MEI) Linux driver
  */
 
@@ -18,6 +18,13 @@
 
 #define MCHI_GROUP_ID  0xA
 
+#define MKHI_GROUP_ID_GFX  0x30
+#define MKHI_GFX_RESET_WARN_CMD_REQ0x0
+#define MKHI_GFX_MEMORY_READY_CMD_REQ  0x1
+
+/* Allow transition to PXP mode without approval */
+#define MKHI_GFX_MEM_READY_PXP_ALLOWED  0x1
+
 struct mkhi_rule_id {
__le16 rule_type;
u8 feature_id;
@@ -42,4 +49,9 @@ struct mkhi_msg {
u8 data[];
 } __packed;
 
+struct mkhi_gfx_mem_ready {
+   struct mkhi_msg_hdr hdr;
+   uint32_t flags;
+} __packed;
+
 #endif /* _MEI_MKHI_H_ */
-- 
2.32.0

[Intel-gfx] [PATCH 13/20] mei: extend timeouts on slow devices.

[Alexander Usyskin]

Parametrize operational timeouts in order
to support slow firmware on some graphic devices.

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/bus-fixup.c |  3 +--
 drivers/misc/mei/client.c| 14 +++---
 drivers/misc/mei/gsc-me.c|  2 +-
 drivers/misc/mei/hbm.c   | 12 ++--
 drivers/misc/mei/hw-me.c | 30 --
 drivers/misc/mei/hw-me.h |  2 +-
 drivers/misc/mei/hw-txe.c|  2 +-
 drivers/misc/mei/hw.h|  5 +
 drivers/misc/mei/init.c  | 19 ++-
 drivers/misc/mei/main.c  |  2 +-
 drivers/misc/mei/mei_dev.h   | 16 
 drivers/misc/mei/pci-me.c|  2 +-
 12 files changed, 74 insertions(+), 35 deletions(-)

diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 59506ba6fc48..24e91a9ea558 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -164,7 +164,6 @@ static int mei_osver(struct mei_cl_device *cldev)
sizeof(struct mkhi_fw_ver))
 #define MKHI_FWVER_LEN(__num) (sizeof(struct mkhi_msg_hdr) + \
   sizeof(struct mkhi_fw_ver_block) * (__num))
-#define MKHI_RCV_TIMEOUT 500 /* receive timeout in msec */
 static int mei_fwver(struct mei_cl_device *cldev)
 {
char buf[MKHI_FWVER_BUF_LEN];
@@ -187,7 +186,7 @@ static int mei_fwver(struct mei_cl_device *cldev)
 
ret = 0;
bytes_recv = __mei_cl_recv(cldev->cl, buf, sizeof(buf), NULL, 0,
-  MKHI_RCV_TIMEOUT);
+  cldev->bus->timeouts.mkhi_recv);
if (bytes_recv < 0 || (size_t)bytes_recv < MKHI_FWVER_LEN(1)) {
/*
 * Should be at least one version block,
diff --git a/drivers/misc/mei/client.c b/drivers/misc/mei/client.c
index 31264ab2eb13..e7a16d9b2241 100644
--- a/drivers/misc/mei/client.c
+++ b/drivers/misc/mei/client.c
@@ -870,7 +870,7 @@ static int mei_cl_send_disconnect(struct mei_cl *cl, struct 
mei_cl_cb *cb)
}
 
list_move_tail(>list, >ctrl_rd_list);
-   cl->timer_count = MEI_CONNECT_TIMEOUT;
+   cl->timer_count = dev->timeouts.connect;
mei_schedule_stall_timer(dev);
 
return 0;
@@ -945,7 +945,7 @@ static int __mei_cl_disconnect(struct mei_cl *cl)
wait_event_timeout(cl->wait,
   cl->state == MEI_FILE_DISCONNECT_REPLY ||
   cl->state == MEI_FILE_DISCONNECTED,
-  mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT));
+  dev->timeouts.cl_connect);
mutex_lock(>device_lock);
 
rets = cl->status;
@@ -1065,7 +1065,7 @@ static int mei_cl_send_connect(struct mei_cl *cl, struct 
mei_cl_cb *cb)
}
 
list_move_tail(>list, >ctrl_rd_list);
-   cl->timer_count = MEI_CONNECT_TIMEOUT;
+   cl->timer_count = dev->timeouts.connect;
mei_schedule_stall_timer(dev);
return 0;
 }
@@ -1164,7 +1164,7 @@ int mei_cl_connect(struct mei_cl *cl, struct 
mei_me_client *me_cl,
 cl->state == MEI_FILE_DISCONNECTED ||
 cl->state == MEI_FILE_DISCONNECT_REQUIRED ||
 cl->state == MEI_FILE_DISCONNECT_REPLY),
-   mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT));
+   dev->timeouts.cl_connect);
mutex_lock(>device_lock);
 
if (!mei_cl_is_connected(cl)) {
@@ -1562,7 +1562,7 @@ int mei_cl_notify_request(struct mei_cl *cl,
   cl->notify_en == request ||
   cl->status ||
   !mei_cl_is_connected(cl),
-  mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT));
+  dev->timeouts.cl_connect);
mutex_lock(>device_lock);
 
if (cl->notify_en != request && !cl->status)
@@ -2336,7 +2336,7 @@ int mei_cl_dma_alloc_and_map(struct mei_cl *cl, const 
struct file *fp,
mutex_unlock(>device_lock);
wait_event_timeout(cl->wait,
   cl->dma_mapped || cl->status,
-  mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT));
+  dev->timeouts.cl_connect);
mutex_lock(>device_lock);
 
if (!cl->dma_mapped && !cl->status)
@@ -2415,7 +2415,7 @@ int mei_cl_dma_unmap(struct mei_cl *cl, const struct file 
*fp)
mutex_unlock(>device_lock);
wait_event_timeout(cl->wait,
   !cl->dma_mapped || cl->status,
-  mei_secs_to_jiffies(MEI_CL_CONNECT_TIMEOUT));
+  dev->timeouts.cl_connect);
mutex_lock(>device_lock);
 
if (cl->dma_mapped && !cl->status)
diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index 6f262ddfd25a..38d035ae2904 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -48,7 +48,7 @@ static int mei_gsc_probe(struct 

[Intel-gfx] [PATCH 12/20] mei: gsc: wait for reset thread on stop

[Alexander Usyskin]

Wait for reset work to complete before initiating
stop reset flow sequence.

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/init.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index eb052005ca86..5bb6ba662cc0 100644
--- a/drivers/misc/mei/init.c
+++ b/drivers/misc/mei/init.c
@@ -320,6 +320,8 @@ void mei_stop(struct mei_device *dev)
 
mei_clear_interrupts(dev);
mei_synchronize_irq(dev);
+   /* to catch HW-initiated reset */
+   mei_cancel_work(dev);
 
mutex_lock(>device_lock);
 
-- 
2.32.0

[Intel-gfx] [PATCH 11/20] mei: gsc: use polling instead of interrupts

[Alexander Usyskin]

From: Tomas Winkler 

A work-around for a HW issue in XEHPSDV that manifests itself when SW reads
a gsc register when gsc is sending an interrupt. The work-around is
to disable interrupts and to use polling instead.

Cc: James Ausmus 
Signed-off-by: Vitaly Lubart 
Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/gsc-me.c | 48 ++--
 drivers/misc/mei/hw-me.c  | 58 ---
 drivers/misc/mei/hw-me.h  | 12 
 3 files changed, 105 insertions(+), 13 deletions(-)

diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index 32ea75f5e7aa..6f262ddfd25a 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "mei_dev.h"
 #include "hw-me.h"
@@ -66,13 +67,28 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
 
dev_set_drvdata(device, dev);
 
-   ret = devm_request_threaded_irq(device, hw->irq,
-   mei_me_irq_quick_handler,
-   mei_me_irq_thread_handler,
-   IRQF_ONESHOT, KBUILD_MODNAME, dev);
-   if (ret) {
-   dev_err(device, "irq register failed %d\n", ret);
-   goto err;
+   /* use polling */
+   if (mei_me_hw_use_polling(hw)) {
+   mei_disable_interrupts(dev);
+   mei_clear_interrupts(dev);
+   init_waitqueue_head(>wait_active);
+   hw->is_active = true; /* start in active mode for 
initialization */
+   hw->polling_thread = kthread_run(mei_me_polling_thread, dev,
+"kmegscirqd/%s", 
dev_name(device));
+   if (IS_ERR(hw->polling_thread)) {
+   ret = PTR_ERR(hw->polling_thread);
+   dev_err(device, "unable to create kernel thread: %d\n", 
ret);
+   goto err;
+   }
+   } else {
+   ret = devm_request_threaded_irq(device, hw->irq,
+   mei_me_irq_quick_handler,
+   mei_me_irq_thread_handler,
+   IRQF_ONESHOT, KBUILD_MODNAME, 
dev);
+   if (ret) {
+   dev_err(device, "irq register failed %d\n", ret);
+   goto err;
+   }
}
 
pm_runtime_get_noresume(device);
@@ -98,7 +114,8 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
 
 register_err:
mei_stop(dev);
-   devm_free_irq(device, hw->irq, dev);
+   if (!mei_me_hw_use_polling(hw))
+   devm_free_irq(device, hw->irq, dev);
 
 err:
dev_err(device, "probe failed: %d\n", ret);
@@ -119,12 +136,17 @@ static void mei_gsc_remove(struct auxiliary_device 
*aux_dev)
 
mei_stop(dev);
 
+   hw = to_me_hw(dev);
+   if (mei_me_hw_use_polling(hw))
+   kthread_stop(hw->polling_thread);
+
mei_deregister(dev);
 
pm_runtime_disable(_dev->dev);
 
mei_disable_interrupts(dev);
-   devm_free_irq(_dev->dev, hw->irq, dev);
+   if (!mei_me_hw_use_polling(hw))
+   devm_free_irq(_dev->dev, hw->irq, dev);
 }
 
 static int __maybe_unused mei_gsc_pm_suspend(struct device *device)
@@ -185,6 +207,9 @@ static int  __maybe_unused 
mei_gsc_pm_runtime_suspend(struct device *device)
if (mei_write_is_idle(dev)) {
hw = to_me_hw(dev);
hw->pg_state = MEI_PG_ON;
+
+   if (mei_me_hw_use_polling(hw))
+   hw->is_active = false;
ret = 0;
} else {
ret = -EAGAIN;
@@ -209,6 +234,11 @@ static int __maybe_unused mei_gsc_pm_runtime_resume(struct 
device *device)
hw = to_me_hw(dev);
hw->pg_state = MEI_PG_OFF;
 
+   if (mei_me_hw_use_polling(hw)) {
+   hw->is_active = true;
+   wake_up(>wait_active);
+   }
+
mutex_unlock(>device_lock);
 
irq_ret = mei_me_irq_thread_handler(1, dev);
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 9870bf717979..959b3329af60 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "mei_dev.h"
 #include "hbm.h"
@@ -327,9 +328,12 @@ static void mei_me_intr_clear(struct mei_device *dev)
  */
 static void mei_me_intr_enable(struct mei_device *dev)
 {
-   u32 hcsr = mei_hcsr_read(dev);
+   u32 hcsr;
+
+   if (mei_me_hw_use_polling(to_me_hw(dev)))
+   return;
 
-   hcsr |= H_CSR_IE_MASK;
+   hcsr = mei_hcsr_read(dev) | H_CSR_IE_MASK;
mei_hcsr_set(dev, hcsr);
 }
 
@@ -354,6 +358,9 @@ static void mei_me_synchronize_irq(struct mei_device *dev)
 {
struct mei_me_hw *hw = to_me_hw(dev);
 
+   if 

[Intel-gfx] [PATCH 10/20] drm/i915/gsc: add GSC XeHP SDV platform definition

[Alexander Usyskin]

Define GSC on XeHP SDV (Intel(R) dGPU without display)

XeHP SDV uses the same hardware settings as DG1, but uses polling
instead of interrupts and runs the firmware in slow pace due to
hardware limitations.

Signed-off-by: Vitaly Lubart 
Signed-off-by: Tomas Winkler 
Signed-off-by: Alexander Usyskin 
---
 drivers/gpu/drm/i915/gt/intel_gsc.c | 22 +-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index 175571c6f71d..ffe6716590f0 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -56,6 +56,19 @@ static const struct gsc_def gsc_def_dg1[] = {
}
 };
 
+static const struct gsc_def gsc_def_xehpsdv[] = {
+   {
+   /* HECI1 not enabled on the device. */
+   },
+   {
+   .name = "mei-gscfi",
+   .bar = DG1_GSC_HECI2_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   .use_polling = true,
+   .slow_fw = true,
+   }
+};
+
 static void gsc_release_dev(struct device *dev)
 {
struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
@@ -92,7 +105,14 @@ static void gsc_init_one(struct drm_i915_private *i915,
if (intf_id == 0 && !HAS_HECI_PXP(i915))
return;
 
-   def = _def_dg1[intf_id];
+   if (IS_DG1(i915)) {
+   def = _def_dg1[intf_id];
+   } else if (IS_XEHPSDV(i915)) {
+   def = _def_xehpsdv[intf_id];
+   } else {
+   drm_warn_once(>drm, "Unknown platform\n");
+   return;
+   }
 
if (!def->name) {
drm_warn_once(>drm, "HECI%d is not implemented!\n", 
intf_id + 1);
-- 
2.32.0

[Intel-gfx] [PATCH 09/20] drm/i915/gsc: add slow_fw flag to the gsc device definition

[Alexander Usyskin]

Add slow_fw flag to the gsc device definition
and pass it to mei auxiliary device.

Signed-off-by: Alexander Usyskin 
---
 drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index 280dba4fd32d..175571c6f71d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -41,6 +41,7 @@ struct gsc_def {
unsigned long bar;
size_t bar_size;
bool use_polling;
+   bool slow_fw;
 };
 
 /* gsc resources and definitions (HECI1 and HECI2) */
@@ -125,6 +126,7 @@ static void gsc_init_one(struct drm_i915_private *i915,
adev->bar.end = adev->bar.start + def->bar_size - 1;
adev->bar.flags = IORESOURCE_MEM;
adev->bar.desc = IORES_DESC_NONE;
+   adev->slow_fw = def->slow_fw;
 
aux_dev = >aux_dev;
aux_dev->name = def->name;
-- 
2.32.0

[Intel-gfx] [PATCH 08/20] drm/i915/gsc: add slow_fw flag to the mei auxiliary device

[Alexander Usyskin]

Add slow_fw flag to the mei auxiliary device info
to inform the mei driver about slow underlying firmware.
Such firmware will require to use larger operation timeouts.

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
---
 include/linux/mei_aux.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/mei_aux.h b/include/linux/mei_aux.h
index 587f25128848..a29f4064b9c0 100644
--- a/include/linux/mei_aux.h
+++ b/include/linux/mei_aux.h
@@ -11,6 +11,7 @@ struct mei_aux_device {
struct auxiliary_device aux_dev;
int irq;
struct resource bar;
+   bool slow_fw;
 };
 
 #define auxiliary_dev_to_mei_aux_dev(auxiliary_dev) \
-- 
2.32.0

[Intel-gfx] [PATCH 07/20] drm/i915/gsc: skip irq initialization if using polling

[Alexander Usyskin]

From: Vitaly Lubart 

If we use polling instead of interrupts,
irq initialization should be skipped.

Signed-off-by: Vitaly Lubart 
Signed-off-by: Tomas Winkler 
Signed-off-by: Alexander Usyskin 
---
 drivers/gpu/drm/i915/gt/intel_gsc.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index 21e860861f0b..280dba4fd32d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -40,6 +40,7 @@ struct gsc_def {
const char *name;
unsigned long bar;
size_t bar_size;
+   bool use_polling;
 };
 
 /* gsc resources and definitions (HECI1 and HECI2) */
@@ -97,6 +98,10 @@ static void gsc_init_one(struct drm_i915_private *i915,
return;
}
 
+   /* skip irq initialization */
+   if (def->use_polling)
+   goto add_device;
+
intf->irq = irq_alloc_desc(0);
if (intf->irq < 0) {
drm_err(>drm, "gsc irq error %d\n", intf->irq);
@@ -109,6 +114,7 @@ static void gsc_init_one(struct drm_i915_private *i915,
goto fail;
}
 
+add_device:
adev = kzalloc(sizeof(*adev), GFP_KERNEL);
if (!adev)
goto fail;
@@ -162,10 +168,8 @@ static void gsc_irq_handler(struct intel_gt *gt, unsigned 
int intf_id)
return;
}
 
-   if (gt->gsc.intf[intf_id].irq < 0) {
-   drm_err_ratelimited(>i915->drm, "GSC irq: irq not set");
+   if (gt->gsc.intf[intf_id].irq < 0)
return;
-   }
 
ret = generic_handle_irq(gt->gsc.intf[intf_id].irq);
if (ret)
-- 
2.32.0

[Intel-gfx] [PATCH 06/20] HAX: drm/i915: force INTEL_MEI_GSC on for CI

[Alexander Usyskin]

From: Daniele Ceraolo Spurio 

After the new config option is merged we'll enable it by default in the
CI config, but for now just force it on via the i915 Kconfig so we can
get pre-merge CI results for it.

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/Kconfig.debug | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/Kconfig.debug 
b/drivers/gpu/drm/i915/Kconfig.debug
index e7fd3e76f8a2..be4ef485d6c1 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -48,6 +48,7 @@ config DRM_I915_DEBUG
select DRM_I915_DEBUG_RUNTIME_PM
select DRM_I915_SW_FENCE_DEBUG_OBJECTS
select DRM_I915_SELFTEST
+   select INTEL_MEI_GSC
select BROKEN # for prototype uAPI
default n
help
-- 
2.32.0

[Intel-gfx] [PATCH 05/20] mei: gsc: retrieve the firmware version

[Alexander Usyskin]

Add a hook to retrieve the firmware version of the
GSC devices to bus-fixup.
GSC has a different MKHI clients GUIDs but the same message structure
to retrieve the firmware version as MEI so mei_fwver() can be reused.

CC: Ashutosh Dixit 
Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
Reviewed-by: Daniele Ceraolo Spurio 
---
 drivers/misc/mei/bus-fixup.c | 25 +
 drivers/misc/mei/hw-me.c |  2 ++
 2 files changed, 27 insertions(+)

diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 67844089db21..59506ba6fc48 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -30,6 +30,12 @@ static const uuid_le mei_nfc_info_guid = MEI_UUID_NFC_INFO;
 #define MEI_UUID_MKHIF_FIX UUID_LE(0x55213584, 0x9a29, 0x4916, \
0xba, 0xdf, 0xf, 0xb7, 0xed, 0x68, 0x2a, 0xeb)
 
+#define MEI_UUID_IGSC_MKHI UUID_LE(0xE2C2AFA2, 0x3817, 0x4D19, \
+   0x9D, 0x95, 0x06, 0xB1, 0x6B, 0x58, 0x8A, 0x5D)
+
+#define MEI_UUID_IGSC_MKHI_FIX UUID_LE(0x46E0C1FB, 0xA546, 0x414F, \
+   0x91, 0x70, 0xB7, 0xF4, 0x6D, 0x57, 0xB4, 0xAD)
+
 #define MEI_UUID_HDCP UUID_LE(0xB638AB7E, 0x94E2, 0x4EA2, \
  0xA5, 0x52, 0xD1, 0xC5, 0x4B, 0x62, 0x7F, 0x04)
 
@@ -241,6 +247,23 @@ static void mei_mkhi_fix(struct mei_cl_device *cldev)
mei_cldev_disable(cldev);
 }
 
+static void mei_gsc_mkhi_ver(struct mei_cl_device *cldev)
+{
+   int ret;
+
+   /* No need to enable the client if nothing is needed from it */
+   if (!cldev->bus->fw_f_fw_ver_supported)
+   return;
+
+   ret = mei_cldev_enable(cldev);
+   if (ret)
+   return;
+
+   ret = mei_fwver(cldev);
+   if (ret < 0)
+   dev_err(>dev, "FW version command failed %d\n", ret);
+   mei_cldev_disable(cldev);
+}
 /**
  * mei_wd - wd client on the bus, change protocol version
  *   as the API has changed.
@@ -492,6 +515,8 @@ static struct mei_fixup {
MEI_FIXUP(MEI_UUID_NFC_HCI, mei_nfc),
MEI_FIXUP(MEI_UUID_WD, mei_wd),
MEI_FIXUP(MEI_UUID_MKHIF_FIX, mei_mkhi_fix),
+   MEI_FIXUP(MEI_UUID_IGSC_MKHI, mei_gsc_mkhi_ver),
+   MEI_FIXUP(MEI_UUID_IGSC_MKHI_FIX, mei_gsc_mkhi_ver),
MEI_FIXUP(MEI_UUID_HDCP, whitelist),
MEI_FIXUP(MEI_UUID_ANY, vt_support),
MEI_FIXUP(MEI_UUID_PAVP, whitelist),
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 03945d3b34da..9870bf717979 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -1584,12 +1584,14 @@ static const struct mei_cfg mei_me_pch15_sps_cfg = {
 static const struct mei_cfg mei_me_gsc_cfg = {
MEI_CFG_TYPE_GSC,
MEI_CFG_PCH8_HFS,
+   MEI_CFG_FW_VER_SUPP,
 };
 
 /* Graphics System Controller Firmware Interface */
 static const struct mei_cfg mei_me_gscfi_cfg = {
MEI_CFG_TYPE_GSCFI,
MEI_CFG_PCH8_HFS,
+   MEI_CFG_FW_VER_SUPP,
 };
 
 /*
-- 
2.32.0

[Intel-gfx] [PATCH 04/20] mei: gsc: add runtime pm handlers

[Alexander Usyskin]

From: Tomas Winkler 

Implement runtime handlers for mei-gsc, to track
idle state of the device properly.

CC: Rodrigo Vivi 
Signed-off-by: Tomas Winkler 
Signed-off-by: Alexander Usyskin 
Reviewed-by: Rodrigo Vivi 
---
 drivers/misc/mei/gsc-me.c | 67 ++-
 1 file changed, 66 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index 58e39c00f150..32ea75f5e7aa 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -159,7 +159,72 @@ static int __maybe_unused mei_gsc_pm_resume(struct device 
*device)
return 0;
 }
 
-static SIMPLE_DEV_PM_OPS(mei_gsc_pm_ops, mei_gsc_pm_suspend, 
mei_gsc_pm_resume);
+static int __maybe_unused mei_gsc_pm_runtime_idle(struct device *device)
+{
+   struct mei_device *dev = dev_get_drvdata(device);
+
+   if (!dev)
+   return -ENODEV;
+   if (mei_write_is_idle(dev))
+   pm_runtime_autosuspend(device);
+
+   return -EBUSY;
+}
+
+static int  __maybe_unused mei_gsc_pm_runtime_suspend(struct device *device)
+{
+   struct mei_device *dev = dev_get_drvdata(device);
+   struct mei_me_hw *hw;
+   int ret;
+
+   if (!dev)
+   return -ENODEV;
+
+   mutex_lock(>device_lock);
+
+   if (mei_write_is_idle(dev)) {
+   hw = to_me_hw(dev);
+   hw->pg_state = MEI_PG_ON;
+   ret = 0;
+   } else {
+   ret = -EAGAIN;
+   }
+
+   mutex_unlock(>device_lock);
+
+   return ret;
+}
+
+static int __maybe_unused mei_gsc_pm_runtime_resume(struct device *device)
+{
+   struct mei_device *dev = dev_get_drvdata(device);
+   struct mei_me_hw *hw;
+   irqreturn_t irq_ret;
+
+   if (!dev)
+   return -ENODEV;
+
+   mutex_lock(>device_lock);
+
+   hw = to_me_hw(dev);
+   hw->pg_state = MEI_PG_OFF;
+
+   mutex_unlock(>device_lock);
+
+   irq_ret = mei_me_irq_thread_handler(1, dev);
+   if (irq_ret != IRQ_HANDLED)
+   dev_err(dev->dev, "thread handler fail %d\n", irq_ret);
+
+   return 0;
+}
+
+static const struct dev_pm_ops mei_gsc_pm_ops = {
+   SET_SYSTEM_SLEEP_PM_OPS(mei_gsc_pm_suspend,
+   mei_gsc_pm_resume)
+   SET_RUNTIME_PM_OPS(mei_gsc_pm_runtime_suspend,
+  mei_gsc_pm_runtime_resume,
+  mei_gsc_pm_runtime_idle)
+};
 
 static const struct auxiliary_device_id mei_gsc_id_table[] = {
{
-- 
2.32.0

[Intel-gfx] [PATCH 03/20] mei: gsc: setup char driver alive in spite of firmware handshake failure

[Alexander Usyskin]

Setup char device in spite of firmware handshake failure.
In order to provide host access to the firmware status registers and other
information required for the manufacturing process.

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
Reviewed-by: Daniele Ceraolo Spurio 
---
 drivers/misc/mei/gsc-me.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index 64b02adf3149..58e39c00f150 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -79,11 +79,12 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
pm_runtime_set_active(device);
pm_runtime_enable(device);
 
-   if (mei_start(dev)) {
-   dev_err(device, "init hw failure.\n");
-   ret = -ENODEV;
-   goto irq_err;
-   }
+   /* Continue to char device setup in spite of firmware handshake failure.
+* In order to provide access to the firmware status registers to the 
user
+* space via sysfs.
+*/
+   if (mei_start(dev))
+   dev_warn(device, "init hw failure.\n");
 
pm_runtime_set_autosuspend_delay(device, MEI_GSC_RPM_TIMEOUT);
pm_runtime_use_autosuspend(device);
@@ -97,7 +98,6 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
 
 register_err:
mei_stop(dev);
-irq_err:
devm_free_irq(device, hw->irq, dev);
 
 err:
-- 
2.32.0

[Intel-gfx] [PATCH 02/20] mei: add support for graphics system controller (gsc) devices

[Alexander Usyskin]

From: Tomas Winkler 

GSC is a graphics system controller, based on CSE, it provides
a chassis controller for graphics discrete cards, as well as it
supports media protection on selected devices.

mei_gsc binds to a auxiliary devices exposed by Intel discrete
driver i915.

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
Reviewed-by: Daniele Ceraolo Spurio 
---
 drivers/misc/mei/Kconfig  |  14 +++
 drivers/misc/mei/Makefile |   3 +
 drivers/misc/mei/gsc-me.c | 194 ++
 drivers/misc/mei/hw-me.c  |  27 +-
 drivers/misc/mei/hw-me.h  |   2 +
 5 files changed, 238 insertions(+), 2 deletions(-)
 create mode 100644 drivers/misc/mei/gsc-me.c

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index 0e0bcd0da852..d21486d69df2 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -46,6 +46,20 @@ config INTEL_MEI_TXE
  Supported SoCs:
  Intel Bay Trail
 
+config INTEL_MEI_GSC
+   tristate "Intel MEI GSC embedded device"
+   depends on INTEL_MEI
+   depends on INTEL_MEI_ME
+   depends on X86 && PCI
+   depends on DRM_I915
+   help
+ Intel auxiliary driver for GSC devices embedded in Intel graphics 
devices.
+
+ An MEI device here called GSC can be embedded in an
+ Intel graphics devices, to support a range of chassis
+ tasks such as graphics card firmware update and security
+ tasks.
+
 source "drivers/misc/mei/hdcp/Kconfig"
 source "drivers/misc/mei/pxp/Kconfig"
 
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index d8e5165917f2..fb740d754900 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -18,6 +18,9 @@ obj-$(CONFIG_INTEL_MEI_ME) += mei-me.o
 mei-me-objs := pci-me.o
 mei-me-objs += hw-me.o
 
+obj-$(CONFIG_INTEL_MEI_GSC) += mei-gsc.o
+mei-gsc-objs := gsc-me.o
+
 obj-$(CONFIG_INTEL_MEI_TXE) += mei-txe.o
 mei-txe-objs := pci-txe.o
 mei-txe-objs += hw-txe.o
diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
new file mode 100644
index ..64b02adf3149
--- /dev/null
+++ b/drivers/misc/mei/gsc-me.c
@@ -0,0 +1,194 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright(c) 2019-2022, Intel Corporation. All rights reserved.
+ *
+ * Intel Management Engine Interface (Intel MEI) Linux driver
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mei_dev.h"
+#include "hw-me.h"
+#include "hw-me-regs.h"
+
+#include "mei-trace.h"
+
+#define MEI_GSC_RPM_TIMEOUT 500
+
+static int mei_gsc_read_hfs(const struct mei_device *dev, int where, u32 *val)
+{
+   struct mei_me_hw *hw = to_me_hw(dev);
+
+   *val = ioread32(hw->mem_addr + where + 0xC00);
+
+   return 0;
+}
+
+static int mei_gsc_probe(struct auxiliary_device *aux_dev,
+const struct auxiliary_device_id *aux_dev_id)
+{
+   struct mei_aux_device *adev = auxiliary_dev_to_mei_aux_dev(aux_dev);
+   struct mei_device *dev;
+   struct mei_me_hw *hw;
+   struct device *device;
+   const struct mei_cfg *cfg;
+   int ret;
+
+   cfg = mei_me_get_cfg(aux_dev_id->driver_data);
+   if (!cfg)
+   return -ENODEV;
+
+   device = _dev->dev;
+
+   dev = mei_me_dev_init(device, cfg);
+   if (IS_ERR(dev)) {
+   ret = PTR_ERR(dev);
+   goto err;
+   }
+
+   hw = to_me_hw(dev);
+   hw->mem_addr = devm_ioremap_resource(device, >bar);
+   if (IS_ERR(hw->mem_addr)) {
+   dev_err(device, "mmio not mapped\n");
+   ret = PTR_ERR(hw->mem_addr);
+   goto err;
+   }
+
+   hw->irq = adev->irq;
+   hw->read_fws = mei_gsc_read_hfs;
+
+   dev_set_drvdata(device, dev);
+
+   ret = devm_request_threaded_irq(device, hw->irq,
+   mei_me_irq_quick_handler,
+   mei_me_irq_thread_handler,
+   IRQF_ONESHOT, KBUILD_MODNAME, dev);
+   if (ret) {
+   dev_err(device, "irq register failed %d\n", ret);
+   goto err;
+   }
+
+   pm_runtime_get_noresume(device);
+   pm_runtime_set_active(device);
+   pm_runtime_enable(device);
+
+   if (mei_start(dev)) {
+   dev_err(device, "init hw failure.\n");
+   ret = -ENODEV;
+   goto irq_err;
+   }
+
+   pm_runtime_set_autosuspend_delay(device, MEI_GSC_RPM_TIMEOUT);
+   pm_runtime_use_autosuspend(device);
+
+   ret = mei_register(dev, device);
+   if (ret)
+   goto register_err;
+
+   pm_runtime_put_noidle(device);
+   return 0;
+
+register_err:
+   mei_stop(dev);
+irq_err:
+   devm_free_irq(device, hw->irq, dev);
+
+err:
+   dev_err(device, "probe failed: %d\n", ret);
+   dev_set_drvdata(device, NULL);
+   return ret;
+}
+
+static void mei_gsc_remove(struct