[PATCH v3] random: prime last_data value per fips requirements
The value stored in last_data must be primed for FIPS 140-2 purposes. Upon
first use, either on system startup or after an RNDCLEARPOOL ioctl, we
need to take an initial random sample, store it internally in last_data,
then pass along the value after that to the requester, so that consistency
checks aren't being run against stale and possibly known data.
v2: streamline code flow a bit, eliminating extra loop and spinlock in the
case where we need to prime, and account for the extra primer bits.
v3: extract_buf() can't be called with spinlock already held, so bring
back some extra lock/unlock calls.
CC: Herbert Xu herb...@gondor.apana.org.au
CC: David S. Miller da...@davemloft.net
CC: Neil Horman nhor...@tuxdriver.com
CC: Matt Mackall m...@selenic.com
CC: linux-crypto@vger.kernel.org
Signed-off-by: Jarod Wilson ja...@redhat.com
---
drivers/char/random.c | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/drivers/char/random.c b/drivers/char/random.c
index b86eae9..d0139df 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -437,6 +437,7 @@ struct entropy_store {
int entropy_count;
int entropy_total;
unsigned int initialized:1;
+ bool last_data_init;
__u8 last_data[EXTRACT_SIZE];
};
@@ -957,6 +958,10 @@ static ssize_t extract_entropy(struct entropy_store *r,
void *buf,
ssize_t ret = 0, i;
__u8 tmp[EXTRACT_SIZE];
+ /* if last_data isn't primed, we need EXTRACT_SIZE extra bytes */
+ if (fips_enabled !r-last_data_init)
+ nbytes += EXTRACT_SIZE;
+
trace_extract_entropy(r-name, nbytes, r-entropy_count, _RET_IP_);
xfer_secondary_pool(r, nbytes);
nbytes = account(r, nbytes, min, reserved);
@@ -967,6 +972,17 @@ static ssize_t extract_entropy(struct entropy_store *r,
void *buf,
if (fips_enabled) {
unsigned long flags;
+
+ /* prime last_data value if need be, per fips 140-2 */
+ if (!r-last_data_init) {
+ spin_lock_irqsave(r-lock, flags);
+ memcpy(r-last_data, tmp, EXTRACT_SIZE);
+ r-last_data_init = true;
+ nbytes -= EXTRACT_SIZE;
+ spin_unlock_irqrestore(r-lock, flags);
+ extract_buf(r, tmp);
+ }
+
spin_lock_irqsave(r-lock, flags);
if (!memcmp(tmp, r-last_data, EXTRACT_SIZE))
panic(Hardware RNG duplicated output!\n);
@@ -1086,6 +1102,7 @@ static void init_std_data(struct entropy_store *r)
r-entropy_count = 0;
r-entropy_total = 0;
+ r-last_data_init = false;
mix_pool_bytes(r, now, sizeof(now), NULL);
for (i = r-poolinfo-POOLBYTES; i 0; i -= sizeof(rv)) {
if (!arch_get_random_long(rv))
--
1.7.1
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Re: [PATCH v3] random: prime last_data value per fips requirements
On Tue, Nov 06, 2012 at 10:42:42AM -0500, Jarod Wilson wrote:
The value stored in last_data must be primed for FIPS 140-2 purposes. Upon
first use, either on system startup or after an RNDCLEARPOOL ioctl, we
need to take an initial random sample, store it internally in last_data,
then pass along the value after that to the requester, so that consistency
checks aren't being run against stale and possibly known data.
v2: streamline code flow a bit, eliminating extra loop and spinlock in the
case where we need to prime, and account for the extra primer bits.
v3: extract_buf() can't be called with spinlock already held, so bring
back some extra lock/unlock calls.
CC: Herbert Xu herb...@gondor.apana.org.au
CC: David S. Miller da...@davemloft.net
CC: Neil Horman nhor...@tuxdriver.com
CC: Matt Mackall m...@selenic.com
CC: linux-crypto@vger.kernel.org
Signed-off-by: Jarod Wilson ja...@redhat.com
---
drivers/char/random.c | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/drivers/char/random.c b/drivers/char/random.c
index b86eae9..d0139df 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -437,6 +437,7 @@ struct entropy_store {
int entropy_count;
int entropy_total;
unsigned int initialized:1;
+ bool last_data_init;
__u8 last_data[EXTRACT_SIZE];
};
@@ -957,6 +958,10 @@ static ssize_t extract_entropy(struct entropy_store *r,
void *buf,
ssize_t ret = 0, i;
__u8 tmp[EXTRACT_SIZE];
+ /* if last_data isn't primed, we need EXTRACT_SIZE extra bytes */
+ if (fips_enabled !r-last_data_init)
+ nbytes += EXTRACT_SIZE;
+
trace_extract_entropy(r-name, nbytes, r-entropy_count, _RET_IP_);
xfer_secondary_pool(r, nbytes);
nbytes = account(r, nbytes, min, reserved);
@@ -967,6 +972,17 @@ static ssize_t extract_entropy(struct entropy_store *r,
void *buf,
if (fips_enabled) {
unsigned long flags;
+
+ /* prime last_data value if need be, per fips 140-2 */
+ if (!r-last_data_init) {
+ spin_lock_irqsave(r-lock, flags);
+ memcpy(r-last_data, tmp, EXTRACT_SIZE);
+ r-last_data_init = true;
+ nbytes -= EXTRACT_SIZE;
+ spin_unlock_irqrestore(r-lock, flags);
+ extract_buf(r, tmp);
+ }
+
spin_lock_irqsave(r-lock, flags);
if (!memcmp(tmp, r-last_data, EXTRACT_SIZE))
panic(Hardware RNG duplicated output!\n);
@@ -1086,6 +1102,7 @@ static void init_std_data(struct entropy_store *r)
r-entropy_count = 0;
r-entropy_total = 0;
+ r-last_data_init = false;
mix_pool_bytes(r, now, sizeof(now), NULL);
for (i = r-poolinfo-POOLBYTES; i 0; i -= sizeof(rv)) {
if (!arch_get_random_long(rv))
--
1.7.1
Thanks Jarod.
Acked-by: Neil Horman nhor...@tuxdriver.com
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[PATCH 1/5] ARM: AT91SAM9G45: fix crypto peripherals irq issue due to sparse irq support.
Spare irq support introduced by commit 8fe82a5 ARM: at91: sparse irq support
involves to add the NR_IRQS_LEGACY offset to irq number.
Signed-off-by: Nicolas Royer nico...@eukrea.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Acked-by: Eric Bénard e...@eukrea.com
Tested-by: Eric Bénard e...@eukrea.com
Cc: sta...@vger.kernel.org # 3.6
---
arch/arm/mach-at91/at91sam9g45_devices.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c
b/arch/arm/mach-at91/at91sam9g45_devices.c
index b159607..fcd233c 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9G45_ID_AESTDESSHA,
- .end= AT91SAM9G45_ID_AESTDESSHA,
+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+ .end= NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
.flags = IORESOURCE_IRQ,
},
};
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9G45_ID_AESTDESSHA,
- .end= AT91SAM9G45_ID_AESTDESSHA,
+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+ .end= NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
.flags = IORESOURCE_IRQ,
},
};
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9G45_ID_AESTDESSHA,
- .end= AT91SAM9G45_ID_AESTDESSHA,
+ .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+ .end= NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
.flags = IORESOURCE_IRQ,
},
};
--
1.7.6.5
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[PATCH 4/5] crypto: Atmel TDES driver: add support for latest release of the IP (0x700)
Update from previous IP release (0x600):
- add DMA support (previous IP release use PDC)
Signed-off-by: Nicolas Royer nico...@eukrea.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Acked-by: Eric Bénard e...@eukrea.com
Tested-by: Eric Bénard e...@eukrea.com
---
drivers/crypto/atmel-tdes-regs.h |2 +
drivers/crypto/atmel-tdes.c | 394 +-
2 files changed, 343 insertions(+), 53 deletions(-)
diff --git a/drivers/crypto/atmel-tdes-regs.h b/drivers/crypto/atmel-tdes-regs.h
index 5ac2a90..f86734d 100644
--- a/drivers/crypto/atmel-tdes-regs.h
+++ b/drivers/crypto/atmel-tdes-regs.h
@@ -69,6 +69,8 @@
#defineTDES_XTEARNDR_XTEA_RNDS_MASK(0x3F 0)
#defineTDES_XTEARNDR_XTEA_RNDS_OFFSET 0
+#defineTDES_HW_VERSION 0xFC
+
#define TDES_RPR 0x100
#define TDES_RCR 0x104
#define TDES_TPR 0x108
diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c
index 7495f98..d2b81a9 100644
--- a/drivers/crypto/atmel-tdes.c
+++ b/drivers/crypto/atmel-tdes.c
@@ -38,29 +38,35 @@
#include crypto/des.h
#include crypto/hash.h
#include crypto/internal/hash.h
+#include linux/platform_data/crypto-atmel.h
#include atmel-tdes-regs.h
/* TDES flags */
-#define TDES_FLAGS_MODE_MASK 0x007f
+#define TDES_FLAGS_MODE_MASK 0x00ff
#define TDES_FLAGS_ENCRYPT BIT(0)
#define TDES_FLAGS_CBC BIT(1)
#define TDES_FLAGS_CFB BIT(2)
#define TDES_FLAGS_CFB8BIT(3)
#define TDES_FLAGS_CFB16 BIT(4)
#define TDES_FLAGS_CFB32 BIT(5)
-#define TDES_FLAGS_OFB BIT(6)
+#define TDES_FLAGS_CFB64 BIT(6)
+#define TDES_FLAGS_OFB BIT(7)
#define TDES_FLAGS_INITBIT(16)
#define TDES_FLAGS_FASTBIT(17)
#define TDES_FLAGS_BUSYBIT(18)
+#define TDES_FLAGS_DMA BIT(19)
-#define ATMEL_TDES_QUEUE_LENGTH1
+#define ATMEL_TDES_QUEUE_LENGTH50
#define CFB8_BLOCK_SIZE1
#define CFB16_BLOCK_SIZE 2
#define CFB32_BLOCK_SIZE 4
-#define CFB64_BLOCK_SIZE 8
+struct atmel_tdes_caps {
+ boolhas_dma;
+ u32 has_cfb_3keys;
+};
struct atmel_tdes_dev;
@@ -70,12 +76,19 @@ struct atmel_tdes_ctx {
int keylen;
u32 key[3*DES_KEY_SIZE / sizeof(u32)];
unsigned long flags;
+
+ u16 block_size;
};
struct atmel_tdes_reqctx {
unsigned long mode;
};
+struct atmel_tdes_dma {
+ struct dma_chan *chan;
+ struct dma_slave_config dma_conf;
+};
+
struct atmel_tdes_dev {
struct list_headlist;
unsigned long phys_base;
@@ -99,8 +112,10 @@ struct atmel_tdes_dev {
size_t total;
struct scatterlist *in_sg;
+ unsigned intnb_in_sg;
size_t in_offset;
struct scatterlist *out_sg;
+ unsigned intnb_out_sg;
size_t out_offset;
size_t buflen;
@@ -109,10 +124,16 @@ struct atmel_tdes_dev {
void*buf_in;
int dma_in;
dma_addr_t dma_addr_in;
+ struct atmel_tdes_dma dma_lch_in;
void*buf_out;
int dma_out;
dma_addr_t dma_addr_out;
+ struct atmel_tdes_dma dma_lch_out;
+
+ struct atmel_tdes_caps caps;
+
+ u32 hw_version;
};
struct atmel_tdes_drv {
@@ -207,6 +228,31 @@ static int atmel_tdes_hw_init(struct atmel_tdes_dev *dd)
return 0;
}
+static inline unsigned int atmel_tdes_get_version(struct atmel_tdes_dev *dd)
+{
+ return atmel_tdes_read(dd, TDES_HW_VERSION) 0x0fff;
+}
+
+static void atmel_tdes_hw_version_init(struct atmel_tdes_dev *dd)
+{
+ atmel_tdes_hw_init(dd);
+
+ dd-hw_version = atmel_tdes_get_version(dd);
+
+ dev_info(dd-dev,
+ version: 0x%x\n, dd-hw_version);
+
+ clk_disable_unprepare(dd-iclk);
+}
+
+static void atmel_tdes_dma_callback(void *data)
+{
+ struct atmel_tdes_dev *dd = data;
+
+ /* dma_lch_out - completed */
+ tasklet_schedule(dd-done_task);
+}
+
static int atmel_tdes_write_ctrl(struct atmel_tdes_dev *dd)
{
int err;
@@ -217,7 +263,9 @@ static int atmel_tdes_write_ctrl(struct atmel_tdes_dev *dd)
if (err)
return err;
- atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS);
+ if (!dd-caps.has_dma)
+ atmel_tdes_write(dd, TDES_PTCR,
+ TDES_PTCR_TXTDIS | TDES_PTCR_RXTDIS);
/* MR register must be set before IV registers */
if (dd-ctx-keylen (DES_KEY_SIZE 1)) {
@@ -241,6 +289,8 @@ static int atmel_tdes_write_ctrl(struct atmel_tdes_dev *dd)
valmr |= TDES_MR_CFBS_16b;
else if
[PATCH 5/5] crypto: Atmel SHA driver: add support for latest release of the IP (0x410)
Updates from IP release 0x320 to 0x400:
- add DMA support (previous IP revision use PDC)
- add DMA double input buffer support
- add SHA224 support
Update from IP release 0x400 to 0x410:
- add SHA384 and SHA512 support
Signed-off-by: Nicolas Royer nico...@eukrea.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Acked-by: Eric Bénard e...@eukrea.com
Tested-by: Eric Bénard e...@eukrea.com
---
drivers/crypto/Kconfig |8 +-
drivers/crypto/atmel-sha-regs.h |7 +-
drivers/crypto/atmel-sha.c | 586 ---
3 files changed, 497 insertions(+), 104 deletions(-)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 308c7fb..0f4076b 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -360,15 +360,17 @@ config CRYPTO_DEV_ATMEL_TDES
will be called atmel-tdes.
config CRYPTO_DEV_ATMEL_SHA
- tristate Support for Atmel SHA1/SHA256 hw accelerator
+ tristate Support for Atmel SHA hw accelerator
depends on ARCH_AT91
select CRYPTO_SHA1
select CRYPTO_SHA256
+ select CRYPTO_SHA512
select CRYPTO_ALGAPI
help
- Some Atmel processors have SHA1/SHA256 hw accelerator.
+ Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
+ hw accelerator.
Select this if you want to use the Atmel module for
- SHA1/SHA256 algorithms.
+ SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
To compile this driver as a module, choose M here: the module
will be called atmel-sha.
diff --git a/drivers/crypto/atmel-sha-regs.h b/drivers/crypto/atmel-sha-regs.h
index dc53a20..83b2d74 100644
--- a/drivers/crypto/atmel-sha-regs.h
+++ b/drivers/crypto/atmel-sha-regs.h
@@ -14,10 +14,13 @@
#define SHA_MR_MODE_MANUAL 0x0
#define SHA_MR_MODE_AUTO 0x1
#define SHA_MR_MODE_PDC0x2
-#defineSHA_MR_DUALBUFF (1 3)
#define SHA_MR_PROCDLY (1 4)
#define SHA_MR_ALGO_SHA1 (0 8)
#define SHA_MR_ALGO_SHA256 (1 8)
+#define SHA_MR_ALGO_SHA384 (2 8)
+#define SHA_MR_ALGO_SHA512 (3 8)
+#define SHA_MR_ALGO_SHA224 (4 8)
+#defineSHA_MR_DUALBUFF (1 16)
#define SHA_IER0x10
#define SHA_IDR0x14
@@ -33,6 +36,8 @@
#define SHA_ISR_URAT_MR(0x2 12)
#define SHA_ISR_URAT_WO(0x5 12)
+#defineSHA_HW_VERSION 0xFC
+
#define SHA_TPR0x108
#define SHA_TCR0x10C
#define SHA_TNPR 0x118
diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
index bcdf55f..408ea25 100644
--- a/drivers/crypto/atmel-sha.c
+++ b/drivers/crypto/atmel-sha.c
@@ -38,6 +38,7 @@
#include crypto/sha.h
#include crypto/hash.h
#include crypto/internal/hash.h
+#include linux/platform_data/crypto-atmel.h
#include atmel-sha-regs.h
/* SHA flags */
@@ -52,11 +53,12 @@
#define SHA_FLAGS_FINUPBIT(16)
#define SHA_FLAGS_SG BIT(17)
#define SHA_FLAGS_SHA1 BIT(18)
-#define SHA_FLAGS_SHA256 BIT(19)
-#define SHA_FLAGS_ERRORBIT(20)
-#define SHA_FLAGS_PAD BIT(21)
-
-#define SHA_FLAGS_DUALBUFF BIT(24)
+#define SHA_FLAGS_SHA224 BIT(19)
+#define SHA_FLAGS_SHA256 BIT(20)
+#define SHA_FLAGS_SHA384 BIT(21)
+#define SHA_FLAGS_SHA512 BIT(22)
+#define SHA_FLAGS_ERRORBIT(23)
+#define SHA_FLAGS_PAD BIT(24)
#define SHA_OP_UPDATE 1
#define SHA_OP_FINAL 2
@@ -65,6 +67,12 @@
#define ATMEL_SHA_DMA_THRESHOLD56
+struct atmel_sha_caps {
+ boolhas_dma;
+ boolhas_dualbuff;
+ boolhas_sha224;
+ boolhas_sha_384_512;
+};
struct atmel_sha_dev;
@@ -73,8 +81,8 @@ struct atmel_sha_reqctx {
unsigned long flags;
unsigned long op;
- u8 digest[SHA256_DIGEST_SIZE] __aligned(sizeof(u32));
- size_t digcnt;
+ u8 digest[SHA512_DIGEST_SIZE] __aligned(sizeof(u32));
+ u64 digcnt[2];
size_t bufcnt;
size_t buflen;
dma_addr_t dma_addr;
@@ -84,6 +92,8 @@ struct atmel_sha_reqctx {
unsigned intoffset; /* offset in current sg */
unsigned inttotal; /* total request */
+ size_t block_size;
+
u8 buffer[0] __aligned(sizeof(u32));
};
@@ -97,7 +107,12 @@ struct atmel_sha_ctx {
};
-#define ATMEL_SHA_QUEUE_LENGTH 1
+#define ATMEL_SHA_QUEUE_LENGTH 50
+
+struct atmel_sha_dma {
+ struct dma_chan *chan;
+ struct dma_slave_config dma_conf;
+};
struct atmel_sha_dev {
struct list_headlist;
@@ -114,6 +129,12 @@ struct atmel_sha_dev {
unsigned long flags;
[PATCH v3 0/7] crypto: omap-sham updates
From: Mark A. Greer mgr...@animalcreek.com Changes since v2: - Reworked pm_runtime calls to match where original clk_* calls were so provide better PM (as per Kevin Hilman's comments). Changes since v1: - Removed the check of CM_IDLEST to see if the module exists and instead add the hwmod data for all omap2's and omap3 GP's. - Placed new sha_ick clk entries after the 'omap-sham' entry in the clockxxx_data.c files - Removed cpu_is_xxx() checks in arch/arm/mach-omap2/devices.c:omap_init_sham() - Rebased on the latest k.o. kernel This series updates the crypto omap-sham driver and supporting infrastructure. Notes: a) Based on v3.7-rc4 b) Since these patches will likely go though the OMAP tree (and not through the crypto tree), it would be nice if the crypto guy(s) would ACK or NACK patches 5-7 which modify the drivers/crypto/omap-sham.c driver. c) These have only been tested on an omap2420 h4 and an am37x evm. If you have different hardware available and a few minutes, please test them. A quick and easy test is to enable tcrypt as a module (CONFIG_CRYPTO_TEST=m), boot, then run 'modprobe tcrypt sec=2 mode=403'. 'CONFIG_CRYPTO_SHA1' and 'CONFIG_CRYPTO_DEV_OMAP_SHAM' also have to be enabled. A quick 'grep omap-sham /proc/interrupts' will tell you if the omap-sham driver was really used. d) To test these patches, you will likely need... i) The patch included here: http://marc.info/?l=kernel-janitorsm=134910841909057w=2 ii) This patch from linux-omap/master: 27615a9 (ARM: OMAP: Trivial driver changes to remove include plat/cpu.h) iii) This patch from Paul Walmsley: http://www.spinics.net/lists/linux-omap/msg79436.html e) If you prefer, a version you can test is available at g...@github.com:mgreeraz/linux-mag.git wip/crypto/sham-v3+test f) There is a reduction in DMA performance after switching to dmaengine (see http://www.spinics.net/lists/linux-omap/msg79855.html) g) Many thanks to Jon Hunter for testing on his omap2420 h4. Mark A. Greer (7): ARM: OMAP2xxx: hwmod: Convert SHAM crypto device data to hwmod ARM: OMAP2xxx: hwmod: Add DMA support for SHAM module ARM: OMAP3xxx: hwmod: Convert SHAM crypto device data to hwmod ARM: OMAP2+: Remove unnecessary message when no SHA IP is present crypto: omap-sham: Convert to use pm_runtime API crypto: omap-sham: Add code to use dmaengine API crypto: omap_sham: Remove usage of private DMA API arch/arm/mach-omap2/clock2430_data.c | 1 + arch/arm/mach-omap2/clock3xxx_data.c | 1 + arch/arm/mach-omap2/devices.c | 73 ++-- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 18 ++ arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 43 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 60 +++ arch/arm/mach-omap2/omap_hwmod_common_data.h | 2 + drivers/crypto/omap-sham.c | 195 +++-- 10 files changed, 245 insertions(+), 150 deletions(-) -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 2/7] ARM: OMAP2xxx: hwmod: Add DMA support for SHAM module
From: Mark A. Greer mgr...@animalcreek.com
The current OMAP2 SHAM support doesn't enable DMA
so add that support so it can use DMA just like OMAP3.
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Mark A. Greer mgr...@animalcreek.com
---
arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
index bb314c5..4b4fd5f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -405,5 +405,5 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = {
.slave = omap2xxx_sham_hwmod,
.clk= sha_ick,
.addr = omap2xxx_sham_addrs,
- .user = OCP_USER_MPU,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index a041670..703b269 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -873,9 +873,15 @@ struct omap_hwmod_irq_info omap2_sham_mpu_irqs[] = {
{ .irq = -1 }
};
+struct omap_hwmod_dma_info omap2_sham_sdma_chs[] = {
+ { .name = rx, .dma_req = OMAP24XX_DMA_SHA1MD5_RX },
+ { .dma_req = -1 }
+};
+
struct omap_hwmod omap2xxx_sham_hwmod = {
.name = sham,
.mpu_irqs = omap2_sham_mpu_irqs,
+ .sdma_reqs = omap2_sham_sdma_chs,
.main_clk = l4_ck,
.prcm = {
.omap2 = {
--
1.7.12
--
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[PATCH v3 4/7] ARM: OMAP2+: Remove unnecessary message when no SHA IP is present
From: Mark A. Greer mgr...@animalcreek.com
Remove the error message that prints when there is no SHA IP
present to make it consistent with all the other IPs.
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Mark A. Greer mgr...@animalcreek.com
---
arch/arm/mach-omap2/devices.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index f38ac9d..f41c793 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -456,20 +456,15 @@ static void omap_init_rng(void)
static void __init omap_init_sham(void)
{
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- struct omap_hwmod *oh;
- struct platform_device *pdev;
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
- oh = omap_hwmod_lookup(sham);
- if (!oh)
- return;
+ oh = omap_hwmod_lookup(sham);
+ if (!oh)
+ return;
- pdev = omap_device_build(omap-sham, -1, oh, NULL, 0, NULL,
-0, 0);
- WARN(IS_ERR(pdev), Can't build omap_device for omap-sham\n);
- } else {
- pr_err(%s: platform not supported\n, __func__);
- }
+ pdev = omap_device_build(omap-sham, -1, oh, NULL, 0, NULL, 0, 0);
+ WARN(IS_ERR(pdev), Can't build omap_device for omap-sham\n);
}
#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) ||
defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
--
1.7.12
--
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[PATCH v3 3/7] ARM: OMAP3xxx: hwmod: Convert SHAM crypto device data to hwmod
From: Mark A. Greer mgr...@animalcreek.com
Convert the device data for the OMAP3 SHAM2 (SHA1/MD5) crypto IP
from explicit platform_data to hwmod.
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Mark A. Greer mgr...@animalcreek.com
---
arch/arm/mach-omap2/clock3xxx_data.c | 1 +
arch/arm/mach-omap2/devices.c | 42 ++---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 60 ++
3 files changed, 64 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 1f42c9d..6f14d9b 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3342,6 +3342,7 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, icr_ick, icr_ick, CK_34XX | CK_36XX),
CLK(omap-aes, ick, aes2_ick, CK_34XX | CK_36XX),
CLK(omap-sham,ick, sha12_ick, CK_34XX | CK_36XX),
+ CLK(NULL, sha12_ick,sha12_ick, CK_34XX | CK_36XX),
CLK(NULL, des2_ick, des2_ick, CK_34XX | CK_36XX),
CLK(omap_hsmmc.1, ick, mmchs2_ick,CK_3XXX),
CLK(omap_hsmmc.0, ick, mmchs1_ick,CK_3XXX),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index f18fa50..f38ac9d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -36,6 +36,7 @@
#include devices.h
#include cm2xxx_3xxx.h
#include cm-regbits-24xx.h
+#include cm-regbits-34xx.h
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
@@ -453,38 +454,9 @@ static void omap_init_rng(void)
WARN(IS_ERR(pdev), Can't build omap_device for omap_rng\n);
}
-#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) ||
defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
-
-#ifdef CONFIG_ARCH_OMAP3
-static struct resource omap3_sham_resources[] = {
- {
- .start = OMAP34XX_SEC_SHA1MD5_BASE,
- .end= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = 49 + OMAP_INTC_START,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = OMAP34XX_DMA_SHA1MD5_RX,
- .flags = IORESOURCE_DMA,
- }
-};
-static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
-#else
-#define omap3_sham_resources NULL
-#define omap3_sham_resources_sz0
-#endif
-
-static struct platform_device sham_device = {
- .name = omap-sham,
- .id = -1,
-};
-
-static void omap_init_sham(void)
+static void __init omap_init_sham(void)
{
- if (cpu_is_omap24xx()) {
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
struct omap_hwmod *oh;
struct platform_device *pdev;
@@ -495,18 +467,10 @@ static void omap_init_sham(void)
pdev = omap_device_build(omap-sham, -1, oh, NULL, 0, NULL,
0, 0);
WARN(IS_ERR(pdev), Can't build omap_device for omap-sham\n);
- } else if (cpu_is_omap34xx()) {
- sham_device.resource = omap3_sham_resources;
- sham_device.num_resources = omap3_sham_resources_sz;
- platform_device_register(sham_device);
} else {
pr_err(%s: platform not supported\n, __func__);
- return;
}
}
-#else
-static inline void omap_init_sham(void) { }
-#endif
#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) ||
defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee..785a0c5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3543,6 +3543,65 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc =
{
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_core - SHAM2 (SHA1/MD5) (similar to omap24xx) */
+static struct omap_hwmod_class_sysconfig omap3_sham_sysc = {
+ .rev_offs = 0x5c,
+ .sysc_offs = 0x60,
+ .syss_offs = 0x64,
+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+ SYSS_HAS_RESET_STATUS),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_sham_class = {
+ .name = sham,
+ .sysc = omap3_sham_sysc,
+};
+
+struct omap_hwmod_irq_info omap3_sham_mpu_irqs[] = {
+ { .irq = 49 + OMAP_INTC_START, },
+ { .irq = -1 }
+};
+
+struct omap_hwmod_dma_info omap3_sham_sdma_reqs[] = {
+ { .name = rx, .dma_req = OMAP34XX_DMA_SHA1MD5_RX, },
+ { .dma_req = -1 }
+};
+
+struct omap_hwmod omap3xxx_sham_hwmod = {
+ .name = sham,
+ .mpu_irqs = omap3_sham_mpu_irqs,
+ .sdma_reqs = omap3_sham_sdma_reqs,
+ .main_clk = sha12_ick,
+ .prcm = {
+
[PATCH v3 6/7] crypto: omap-sham: Add code to use dmaengine API
From: Mark A. Greer mgr...@animalcreek.com
Add code to use the new dmaengine API alongside
the existing DMA code that uses the private
OMAP DMA API. The API to use is chosen by
defining or undefining 'OMAP_SHAM_DMA_PRIVATE'.
CC: Russell King rmk+ker...@arm.linux.org.uk
CC: Dmitry Kasatkin dmitry.kasat...@intel.com
Signed-off-by: Mark A. Greer mgr...@animalcreek.com
---
drivers/crypto/omap-sham.c | 150 +++--
1 file changed, 145 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 85d43b2..b57277c 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -13,6 +13,8 @@
* Some ideas are from old omap-sha1-md5.c driver.
*/
+#define OMAP_SHAM_DMA_PRIVATE
+
#define pr_fmt(fmt) %s: fmt, __func__
#include linux/err.h
@@ -27,6 +29,10 @@
#include linux/platform_device.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
+#ifndef OMAP_SHAM_DMA_PRIVATE
+#include linux/dmaengine.h
+#include linux/omap-dma.h
+#endif
#include linux/pm_runtime.h
#include linux/delay.h
#include linux/crypto.h
@@ -37,9 +43,11 @@
#include crypto/hash.h
#include crypto/internal/hash.h
+#ifdef OMAP_SHAM_DMA_PRIVATE
#include plat/cpu.h
#include plat/dma.h
#include mach/irqs.h
+#endif
#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
#define SHA_REG_DIN(x) (0x1C + ((x) * 0x04))
@@ -47,6 +55,8 @@
#define SHA1_MD5_BLOCK_SIZESHA1_BLOCK_SIZE
#define MD5_DIGEST_SIZE16
+#defineDST_MAXBURST16 /* Really element number
(en) */
+
#define SHA_REG_DIGCNT 0x14
#define SHA_REG_CTRL 0x18
@@ -110,6 +120,9 @@ struct omap_sham_reqctx {
/* walk state */
struct scatterlist *sg;
+#ifndef OMAP_SHAM_DMA_PRIVATE
+ struct scatterlist sgl;
+#endif
unsigned intoffset; /* offset in current sg */
unsigned inttotal; /* total request */
@@ -143,8 +156,12 @@ struct omap_sham_dev {
int irq;
spinlock_t lock;
int err;
+#ifdef OMAP_SHAM_DMA_PRIVATE
int dma;
int dma_lch;
+#else
+ struct dma_chan *dma_lch;
+#endif
struct tasklet_struct done_task;
unsigned long flags;
@@ -314,15 +331,32 @@ static int omap_sham_xmit_cpu(struct omap_sham_dev *dd,
const u8 *buf,
return -EINPROGRESS;
}
+#ifndef OMAP_SHAM_DMA_PRIVATE
+static void omap_sham_dma_callback(void *param)
+{
+ struct omap_sham_dev *dd = param;
+
+ set_bit(FLAGS_DMA_READY, dd-flags);
+ tasklet_schedule(dd-done_task);
+}
+#endif
+
static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
- size_t length, int final)
+ size_t length, int final, int is_sg)
{
struct omap_sham_reqctx *ctx = ahash_request_ctx(dd-req);
+#ifdef OMAP_SHAM_DMA_PRIVATE
int len32;
+#else
+ struct dma_async_tx_descriptor *tx;
+ struct dma_slave_config cfg;
+ int ret;
+#endif
dev_dbg(dd-dev, xmit_dma: digcnt: %d, length: %d, final: %d\n,
ctx-digcnt, length, final);
+#ifdef OMAP_SHAM_DMA_PRIVATE
len32 = DIV_ROUND_UP(length, sizeof(u32));
omap_set_dma_transfer_params(dd-dma_lch, OMAP_DMA_DATA_TYPE_S32, len32,
@@ -332,6 +366,48 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd,
dma_addr_t dma_addr,
omap_set_dma_src_params(dd-dma_lch, 0, OMAP_DMA_AMODE_POST_INC,
dma_addr, 0, 0);
+#else
+ memset(cfg, 0, sizeof(cfg));
+
+ cfg.dst_addr = dd-phys_base + SHA_REG_DIN(0);
+ cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ cfg.dst_maxburst = DST_MAXBURST;
+
+ ret = dmaengine_slave_config(dd-dma_lch, cfg);
+ if (ret) {
+ pr_err(omap-sham: can't configure dmaengine slave: %d\n, ret);
+ return ret;
+ }
+
+ if (is_sg) {
+ /*
+* The SG entry passed in may not have the 'length' member
+* set correctly so use a local SG entry (sgl) with the
+* proper value for 'length' instead. If this is not done,
+* the dmaengine may try to DMA the incorrect amount of data.
+*/
+ sg_init_table(ctx-sgl, 1);
+ ctx-sgl.page_link = ctx-sg-page_link;
+ ctx-sgl.offset = ctx-sg-offset;
+ sg_dma_len(ctx-sgl) = length;
+ sg_dma_address(ctx-sgl) = sg_dma_address(ctx-sg);
+
+ tx = dmaengine_prep_slave_sg(dd-dma_lch, ctx-sgl, 1,
+ DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+ } else {
+ tx =
[PATCH v3 7/7] crypto: omap_sham: Remove usage of private DMA API
From: Mark A. Greer mgr...@animalcreek.com
Remove usage of the private OMAP DMA API.
The dmaengine API will be used instead.
CC: Russell King rmk+ker...@arm.linux.org.uk
CC: Dmitry Kasatkin dmitry.kasat...@intel.com
Signed-off-by: Mark A. Greer mgr...@animalcreek.com
---
drivers/crypto/omap-sham.c | 117 -
1 file changed, 117 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index b57277c..ebb5255 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -13,8 +13,6 @@
* Some ideas are from old omap-sha1-md5.c driver.
*/
-#define OMAP_SHAM_DMA_PRIVATE
-
#define pr_fmt(fmt) %s: fmt, __func__
#include linux/err.h
@@ -29,10 +27,8 @@
#include linux/platform_device.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
-#ifndef OMAP_SHAM_DMA_PRIVATE
#include linux/dmaengine.h
#include linux/omap-dma.h
-#endif
#include linux/pm_runtime.h
#include linux/delay.h
#include linux/crypto.h
@@ -43,12 +39,6 @@
#include crypto/hash.h
#include crypto/internal/hash.h
-#ifdef OMAP_SHAM_DMA_PRIVATE
-#include plat/cpu.h
-#include plat/dma.h
-#include mach/irqs.h
-#endif
-
#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
#define SHA_REG_DIN(x) (0x1C + ((x) * 0x04))
@@ -120,9 +110,7 @@ struct omap_sham_reqctx {
/* walk state */
struct scatterlist *sg;
-#ifndef OMAP_SHAM_DMA_PRIVATE
struct scatterlist sgl;
-#endif
unsigned intoffset; /* offset in current sg */
unsigned inttotal; /* total request */
@@ -156,12 +144,7 @@ struct omap_sham_dev {
int irq;
spinlock_t lock;
int err;
-#ifdef OMAP_SHAM_DMA_PRIVATE
- int dma;
- int dma_lch;
-#else
struct dma_chan *dma_lch;
-#endif
struct tasklet_struct done_task;
unsigned long flags;
@@ -331,7 +314,6 @@ static int omap_sham_xmit_cpu(struct omap_sham_dev *dd,
const u8 *buf,
return -EINPROGRESS;
}
-#ifndef OMAP_SHAM_DMA_PRIVATE
static void omap_sham_dma_callback(void *param)
{
struct omap_sham_dev *dd = param;
@@ -339,34 +321,18 @@ static void omap_sham_dma_callback(void *param)
set_bit(FLAGS_DMA_READY, dd-flags);
tasklet_schedule(dd-done_task);
}
-#endif
static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
size_t length, int final, int is_sg)
{
struct omap_sham_reqctx *ctx = ahash_request_ctx(dd-req);
-#ifdef OMAP_SHAM_DMA_PRIVATE
- int len32;
-#else
struct dma_async_tx_descriptor *tx;
struct dma_slave_config cfg;
int ret;
-#endif
dev_dbg(dd-dev, xmit_dma: digcnt: %d, length: %d, final: %d\n,
ctx-digcnt, length, final);
-#ifdef OMAP_SHAM_DMA_PRIVATE
- len32 = DIV_ROUND_UP(length, sizeof(u32));
-
- omap_set_dma_transfer_params(dd-dma_lch, OMAP_DMA_DATA_TYPE_S32, len32,
- 1, OMAP_DMA_SYNC_PACKET, dd-dma,
- OMAP_DMA_DST_SYNC_PREFETCH);
-
- omap_set_dma_src_params(dd-dma_lch, 0, OMAP_DMA_AMODE_POST_INC,
- dma_addr, 0, 0);
-
-#else
memset(cfg, 0, sizeof(cfg));
cfg.dst_addr = dd-phys_base + SHA_REG_DIN(0);
@@ -406,7 +372,6 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd,
dma_addr_t dma_addr,
tx-callback = omap_sham_dma_callback;
tx-callback_param = dd;
-#endif
omap_sham_write_ctrl(dd, length, final, 1);
@@ -417,12 +382,8 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd,
dma_addr_t dma_addr,
set_bit(FLAGS_DMA_ACTIVE, dd-flags);
-#ifdef OMAP_SHAM_DMA_PRIVATE
- omap_start_dma(dd-dma_lch);
-#else
dmaengine_submit(tx);
dma_async_issue_pending(dd-dma_lch);
-#endif
return -EINPROGRESS;
}
@@ -528,7 +489,6 @@ static int omap_sham_update_dma_start(struct omap_sham_dev
*dd)
if (ctx-bufcnt || ctx-offset)
return omap_sham_update_dma_slow(dd);
-#ifndef OMAP_SHAM_DMA_PRIVATE
/*
* Don't use the sg interface when the transfer size is less
* than the number of elements in a DMA frame. Otherwise,
@@ -537,7 +497,6 @@ static int omap_sham_update_dma_start(struct omap_sham_dev
*dd)
*/
if (ctx-total (DST_MAXBURST * sizeof(u32)))
return omap_sham_update_dma_slow(dd);
-#endif
dev_dbg(dd-dev, fast: digcnt: %d, bufcnt: %u, total: %u\n,
ctx-digcnt, ctx-bufcnt, ctx-total);
@@ -599,11 +558,7 @@ static int omap_sham_update_dma_stop(struct omap_sham_dev
*dd)
{
struct omap_sham_reqctx *ctx = ahash_request_ctx(dd-req);
-#ifdef OMAP_SHAM_DMA_PRIVATE
- omap_stop_dma(dd-dma_lch);
-#else
