[PATCH] crypto: cavium/nitrox - Fix an error handling path in 'nitrox_probe()'

[Christophe JAILLET]

'err' is known to be 0 at this point.
If 'kzalloc()' fails, returns -ENOMEM instead of 0 which means success.

Signed-off-by: Christophe JAILLET 
---
 drivers/crypto/cavium/nitrox/nitrox_main.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/cavium/nitrox/nitrox_main.c 
b/drivers/crypto/cavium/nitrox/nitrox_main.c
index 9ccefb9b7232..fee7cb2ce747 100644
--- a/drivers/crypto/cavium/nitrox/nitrox_main.c
+++ b/drivers/crypto/cavium/nitrox/nitrox_main.c
@@ -513,8 +513,10 @@ static int nitrox_probe(struct pci_dev *pdev,
pci_set_master(pdev);
 
ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
-   if (!ndev)
+   if (!ndev) {
+   err = -ENOMEM;
goto ndev_fail;
+   }
 
pci_set_drvdata(pdev, ndev);
ndev->pdev = pdev;
-- 
2.11.0

[PATCH] crypto: inside-secure - fix an error handling path in safexcel_probe()

[Christophe JAILLET]

'ret' is known to be 0 at this point.
If 'safexcel_request_ring_irq()' fails, it returns an error code.
Return this value instead of 0 which means success.

Signed-off-by: Christophe JAILLET 
---
 drivers/crypto/inside-secure/safexcel.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/inside-secure/safexcel.c 
b/drivers/crypto/inside-secure/safexcel.c
index 1fabd4aee81b..89ba9e85c0f3 100644
--- a/drivers/crypto/inside-secure/safexcel.c
+++ b/drivers/crypto/inside-secure/safexcel.c
@@ -839,9 +839,10 @@ static int safexcel_probe(struct platform_device *pdev)
snprintf(irq_name, 6, "ring%d", i);
irq = safexcel_request_ring_irq(pdev, irq_name, 
safexcel_irq_ring,
ring_irq);
-
-   if (irq < 0)
+   if (irq < 0) {
+   ret = irq;
goto err_clk;
+   }
 
priv->ring[i].work_data.priv = priv;
priv->ring[i].work_data.ring = i;
-- 
2.11.0

Re: random.c: LFSR polynomials are not irreducible/primitive

[Theodore Ts'o]

On Tue, Aug 15, 2017 at 10:45:17AM +0200, Stephan Mueller wrote:
> Am Dienstag, 15. August 2017, 00:21:05 CEST schrieb Theodore Ts'o:
> 
> Hi Theodore,
> 
> > Have you looked at section 3.1.1 of the above cited paper?
> > 
> > http://eprint.iacr.org/2012/251.pdf
> 
> Thanks for the hint, but that does not seem to solve the mystery either.
> 
> When I use magma with GF(2^32), I see that all polynomials are neither 
> primitive nor irreducible:

I believe that assertion being made in that section is not that
modified P(X) is primitive, but that Q(X) is primitive

Q(X) = α**3 (P(X) − 1) + 1

Where multiplication by α**3 is done by a twist-table lookup.

Also of interest might be this paper, which I believe totally missed
when the authors made their proposal on the linux-crypto list in
September 2016 (I've added them to the cc list):

https://eprint.iacr.org/2017/726.pdf

The date on the paper is from just 3 weeks ago or so, and it was just
luck that I found it when Googling to find some other references in
response to your question.  (Thanks for raising the question, BTW).

I don't have a huge amount invested in any of the mixing schemes,
because in practice we are *not* feeding large number of zero inputs
into mixing function.  So while it is good to make the mixing function
to have as large a cyclic length as possible, it seems unlikely that
the weaknesses of the current polynomials can be leveraged into a
practical attack.

Stephan, if you have any comments on the proposal made by David
Fontaine and Olivier Vivolo, I'd appreciate hearing them!

- Ted

Re: random.c: LFSR polynomials are not irreducible/primitive

[Stephan Mueller]

Am Dienstag, 15. August 2017, 00:21:05 CEST schrieb Theodore Ts'o:

Hi Theodore,

> Have you looked at section 3.1.1 of the above cited paper?
> 
>   http://eprint.iacr.org/2012/251.pdf

Thanks for the hint, but that does not seem to solve the mystery either.

When I use magma with GF(2^32), I see that all polynomials are neither 
primitive nor irreducible:

F:=GF(4294967296);
F;

P:=PolynomialRing(F);
P;
print "Old polynomials:";

P:=x^128 + x^103 + x^76 + x^51 +x^25 + x + 1;
P;
print "is irreducible: "; IsIrreducible(P);
print "is primitive: "; IsPrimitive(P);

P:=x^32 + x^26 + x^20 + x^14 + x^7 + x + 1;
P;
print "is irreducible: "; IsIrreducible(P);
print "is primitive: "; IsPrimitive(P);

print "New polynomials:";

P:=x^128 + x^104 + x^76 + x^51 +x^25 + x + 1;
P;
print "is irreducible: "; IsIrreducible(P);
print "is primitive: "; IsPrimitive(P);

P:=x^32 + x^26 + x^19 + x^14 + x^7 + x + 1;
P;
print "is irreducible: "; IsIrreducible(P);
print "is primitive: "; IsPrimitive(P);



The output is:

Finite field of size 2^32
Univariate Polynomial Ring in x over GF(2^32)
Old polynomials:
x^128 + x^103 + x^76 + x^51 + x^25 + x + 1
is irreducible:
false
is primitive:
false
x^32 + x^26 + x^20 + x^14 + x^7 + x + 1
is irreducible:
false
is primitive:
false
New polynomials:
x^128 + x^104 + x^76 + x^51 + x^25 + x + 1
is irreducible:
false
is primitive:
false
x^32 + x^26 + x^19 + x^14 + x^7 + x + 1
is irreducible:
false
is primitive:
false


Thus, I am unsure how the referenced document concludes that the new 
polynomials are irreducible over GF(2^32).

Ciao
Stephan

Re: [PATCH v5 04/19] crypto: marvell/cesa: remove redundant backlog checks on EBUSY

[Boris Brezillon]

Le Mon, 14 Aug 2017 18:21:14 +0300,
Gilad Ben-Yossef  a écrit :

> Now that -EBUSY return code only indicates backlog queueing
> we can safely remove the now redundant check for the
> CRYPTO_TFM_REQ_MAY_BACKLOG flag when -EBUSY is returned.
> 
> Signed-off-by: Gilad Ben-Yossef 

Acked-by: Boris Brezillon 

> ---
>  drivers/crypto/marvell/cesa.c | 3 +--
>  drivers/crypto/marvell/cesa.h | 2 +-
>  2 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
> index 6e7a5c7..269737f 100644
> --- a/drivers/crypto/marvell/cesa.c
> +++ b/drivers/crypto/marvell/cesa.c
> @@ -183,8 +183,7 @@ int mv_cesa_queue_req(struct crypto_async_request *req,
>   spin_lock_bh(>lock);
>   ret = crypto_enqueue_request(>queue, req);
>   if ((mv_cesa_req_get_type(creq) == CESA_DMA_REQ) &&
> - (ret == -EINPROGRESS ||
> - (ret == -EBUSY && req->flags & CRYPTO_TFM_REQ_MAY_BACKLOG)))
> + (ret == -EINPROGRESS || ret == -EBUSY)
>   mv_cesa_tdma_chain(engine, creq);
>   spin_unlock_bh(>lock);
>  
> diff --git a/drivers/crypto/marvell/cesa.h b/drivers/crypto/marvell/cesa.h
> index b7872f6..63c8457 100644
> --- a/drivers/crypto/marvell/cesa.h
> +++ b/drivers/crypto/marvell/cesa.h
> @@ -763,7 +763,7 @@ static inline int mv_cesa_req_needs_cleanup(struct 
> crypto_async_request *req,
>* the backlog and will be processed later. There's no need to
>* clean it up.
>*/
> - if (ret == -EBUSY && req->flags & CRYPTO_TFM_REQ_MAY_BACKLOG)
> + if (ret == -EBUSY)
>   return false;
>  
>   /* Request wasn't queued, we need to clean it up */

RE: [PATCH 2/3] crypto: engine - find request type with cra_type

[Fabien DESSENNE]

Hi Corentin,

Since I have just sent a patch to add the support of "aead_request" to crypto 
engine, I am wondering if your proposed change (checking cra_type instead of 
crypto_tfm_alg_type) and mine are compatible.
It looks like they are (assuming we export crypto_aead_type): can you confirm?
BR

Fabien.

>-Original Message-
>From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto-
>ow...@vger.kernel.org] On Behalf Of Corentin Labbe
>Sent: lundi 14 août 2017 15:17
>To: herb...@gondor.apana.org.au; da...@davemloft.net
>Cc: linux-crypto@vger.kernel.org; linux-ker...@vger.kernel.org; Corentin Labbe
>
>Subject: [PATCH 2/3] crypto: engine - find request type with cra_type
>
>The current method for finding request type is based on crypto_tfm_alg_type.
>
>But in case of skcipher, it is the same than ablkcipher.
>Using cra_type for this work permits to make the distinction between the two.
>
>Signed-off-by: Corentin Labbe 
>---
> crypto/crypto_engine.c | 19 ---
> 1 file changed, 8 insertions(+), 11 deletions(-)
>
>diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c index
>61e7c4e02fd2..74b840749074 100644
>--- a/crypto/crypto_engine.c
>+++ b/crypto/crypto_engine.c
>@@ -38,7 +38,8 @@ static void crypto_pump_requests(struct crypto_engine
>*engine,
>   struct ablkcipher_request *breq;
>   unsigned long flags;
>   bool was_busy = false;
>-  int ret, rtype;
>+  int ret;
>+  const struct crypto_type *cratype;
>
>   spin_lock_irqsave(>queue_lock, flags);
>
>@@ -94,7 +95,7 @@ static void crypto_pump_requests(struct crypto_engine
>*engine,
>
>   spin_unlock_irqrestore(>queue_lock, flags);
>
>-  rtype = crypto_tfm_alg_type(engine->cur_req->tfm);
>+  cratype = engine->cur_req->tfm->__crt_alg->cra_type;
>   /* Until here we get the request need to be encrypted successfully */
>   if (!was_busy && engine->prepare_crypt_hardware) {
>   ret = engine->prepare_crypt_hardware(engine);
>@@ -104,8 +105,7 @@ static void crypto_pump_requests(struct crypto_engine
>*engine,
>   }
>   }
>
>-  switch (rtype) {
>-  case CRYPTO_ALG_TYPE_AHASH:
>+  if (cratype == _ahash_type) {
>   hreq = ahash_request_cast(engine->cur_req);
>   if (engine->prepare_hash_request) {
>   ret = engine->prepare_hash_request(engine, hreq); @@
>-122,7 +122,7 @@ static void crypto_pump_requests(struct crypto_engine
>*engine,
>   goto req_err;
>   }
>   return;
>-  case CRYPTO_ALG_TYPE_ABLKCIPHER:
>+  } else if (cratype == _ablkcipher_type) {
>   breq = ablkcipher_request_cast(engine->cur_req);
>   if (engine->prepare_cipher_request) {
>   ret = engine->prepare_cipher_request(engine, breq);
>@@ -139,21 +139,18 @@ static void crypto_pump_requests(struct
>crypto_engine *engine,
>   goto req_err;
>   }
>   return;
>-  default:
>+  } else {
>   dev_err(engine->dev, "failed to prepare request of unknown
>type\n");
>   return;
>   }
>
> req_err:
>-  switch (rtype) {
>-  case CRYPTO_ALG_TYPE_AHASH:
>+  if (cratype == _ahash_type) {
>   hreq = ahash_request_cast(engine->cur_req);
>   crypto_finalize_hash_request(engine, hreq, ret);
>-  break;
>-  case CRYPTO_ALG_TYPE_ABLKCIPHER:
>+  } else if (cratype == _ablkcipher_type) {
>   breq = ablkcipher_request_cast(engine->cur_req);
>   crypto_finalize_cipher_request(engine, breq, ret);
>-  break;
>   }
>   return;
>
>--
>2.13.0

[PATCH] crypto: rockchip: Don't dequeue the request when device is busy

[zain wang]

The device can only process one request at a time. So if multiple
requests came at the same time, we can enqueue them first, and
dequeue them one by one when the device is idle.

Signed-off-by: zain wang 
---
 drivers/crypto/rockchip/rk3288_crypto.c|  46 ++-
 drivers/crypto/rockchip/rk3288_crypto.h|  11 +-
 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 118 --
 drivers/crypto/rockchip/rk3288_crypto_ahash.c  | 133 ++---
 4 files changed, 160 insertions(+), 148 deletions(-)

diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
b/drivers/crypto/rockchip/rk3288_crypto.c
index 57c3783..c9d622a 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -184,15 +184,53 @@ static irqreturn_t rk_crypto_irq_handle(int irq, void 
*dev_id)
return IRQ_HANDLED;
 }
 
+static int rk_crypto_enqueue(struct rk_crypto_info *dev,
+ struct crypto_async_request *async_req)
+{
+   unsigned long flags;
+   int ret;
+
+   spin_lock_irqsave(>lock, flags);
+   ret = crypto_enqueue_request(>queue, async_req);
+   if (dev->busy) {
+   spin_unlock_irqrestore(>lock, flags);
+   return ret;
+   }
+   dev->busy = true;
+   spin_unlock_irqrestore(>lock, flags);
+   tasklet_schedule(>queue_task);
+
+   return ret;
+}
+
 static void rk_crypto_queue_task_cb(unsigned long data)
 {
struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
+   struct crypto_async_request *async_req, *backlog;
+   unsigned long flags;
int err = 0;
 
dev->err = 0;
+   spin_lock_irqsave(>lock, flags);
+   backlog   = crypto_get_backlog(>queue);
+   async_req = crypto_dequeue_request(>queue);
+
+   if (!async_req) {
+   dev->busy = false;
+   spin_unlock_irqrestore(>lock, flags);
+   return;
+   }
+   spin_unlock_irqrestore(>lock, flags);
+
+   if (backlog) {
+   backlog->complete(backlog, -EINPROGRESS);
+   backlog = NULL;
+   }
+
+   dev->async_req = async_req;
err = dev->start(dev);
if (err)
-   dev->complete(dev, err);
+   dev->complete(dev->async_req, err);
 }
 
 static void rk_crypto_done_task_cb(unsigned long data)
@@ -200,13 +238,13 @@ static void rk_crypto_done_task_cb(unsigned long data)
struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
 
if (dev->err) {
-   dev->complete(dev, dev->err);
+   dev->complete(dev->async_req, dev->err);
return;
}
 
dev->err = dev->update(dev);
if (dev->err)
-   dev->complete(dev, dev->err);
+   dev->complete(dev->async_req, dev->err);
 }
 
 static struct rk_crypto_tmp *rk_cipher_algs[] = {
@@ -365,6 +403,8 @@ static int rk_crypto_probe(struct platform_device *pdev)
crypto_info->disable_clk = rk_crypto_disable_clk;
crypto_info->load_data = rk_load_data;
crypto_info->unload_data = rk_unload_data;
+   crypto_info->enqueue = rk_crypto_enqueue;
+   crypto_info->busy = false;
 
err = rk_crypto_register(crypto_info);
if (err) {
diff --git a/drivers/crypto/rockchip/rk3288_crypto.h 
b/drivers/crypto/rockchip/rk3288_crypto.h
index 65ad1c2..ab6a1b4 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.h
+++ b/drivers/crypto/rockchip/rk3288_crypto.h
@@ -192,8 +192,7 @@ struct rk_crypto_info {
struct crypto_queue queue;
struct tasklet_struct   queue_task;
struct tasklet_struct   done_task;
-   struct ablkcipher_request   *ablk_req;
-   struct ahash_request*ahash_req;
+   struct crypto_async_request *async_req;
int err;
/* device lock */
spinlock_t  lock;
@@ -210,18 +209,20 @@ struct rk_crypto_info {
size_t  nents;
unsigned inttotal;
unsigned intcount;
-   u32 mode;
dma_addr_t  addr_in;
dma_addr_t  addr_out;
+   boolbusy;
int (*start)(struct rk_crypto_info *dev);
int (*update)(struct rk_crypto_info *dev);
-   void (*complete)(struct rk_crypto_info *dev, int err);
+   void (*complete)(struct crypto_async_request *base, int err);
int (*enable_clk)(struct rk_crypto_info *dev);
void (*disable_clk)(struct rk_crypto_info *dev);
int (*load_data)(struct rk_crypto_info *dev,
 struct scatterlist *sg_src,
 struct scatterlist *sg_dst);
void (*unload_data)(struct rk_crypto_info *dev);
+   int (*enqueue)(struct rk_crypto_info *dev,
+   

[PATCH v2 1/3] crypto: engine - permit to enqueue aead_request

[Fabien Dessenne]

The current crypto engine allows ablkcipher_request and ahash_request to
be enqueued. Extend this to aead_request.

Signed-off-by: Fabien Dessenne 
---
 crypto/crypto_engine.c  | 101 
 include/crypto/engine.h |  16 
 2 files changed, 117 insertions(+)

diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c
index 61e7c4e..3cdf051 100644
--- a/crypto/crypto_engine.c
+++ b/crypto/crypto_engine.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include "internal.h"
@@ -35,6 +36,7 @@ static void crypto_pump_requests(struct crypto_engine *engine,
 {
struct crypto_async_request *async_req, *backlog;
struct ahash_request *hreq;
+   struct aead_request *areq;
struct ablkcipher_request *breq;
unsigned long flags;
bool was_busy = false;
@@ -122,6 +124,22 @@ static void crypto_pump_requests(struct crypto_engine 
*engine,
goto req_err;
}
return;
+   case CRYPTO_ALG_TYPE_AEAD:
+   areq = aead_request_cast(engine->cur_req);
+   if (engine->prepare_aead_request) {
+   ret = engine->prepare_aead_request(engine, areq);
+   if (ret) {
+   pr_err("failed to prepare request: %d\n", ret);
+   goto req_err;
+   }
+   engine->cur_req_prepared = true;
+   }
+   ret = engine->aead_one_request(engine, areq);
+   if (ret) {
+   pr_err("failed to do aead one request from queue\n");
+   goto req_err;
+   }
+   return;
case CRYPTO_ALG_TYPE_ABLKCIPHER:
breq = ablkcipher_request_cast(engine->cur_req);
if (engine->prepare_cipher_request) {
@@ -150,6 +168,10 @@ static void crypto_pump_requests(struct crypto_engine 
*engine,
hreq = ahash_request_cast(engine->cur_req);
crypto_finalize_hash_request(engine, hreq, ret);
break;
+   case CRYPTO_ALG_TYPE_AEAD:
+   areq = aead_request_cast(engine->cur_req);
+   crypto_finalize_aead_request(engine, areq, ret);
+   break;
case CRYPTO_ALG_TYPE_ABLKCIPHER:
breq = ablkcipher_request_cast(engine->cur_req);
crypto_finalize_cipher_request(engine, breq, ret);
@@ -255,6 +277,48 @@ int crypto_transfer_hash_request_to_engine(struct 
crypto_engine *engine,
 EXPORT_SYMBOL_GPL(crypto_transfer_hash_request_to_engine);
 
 /**
+ * crypto_transfer_aead_request - transfer the new request into the
+ * enginequeue
+ * @engine: the hardware engine
+ * @req: the request need to be listed into the engine queue
+ */
+int crypto_transfer_aead_request(struct crypto_engine *engine,
+struct aead_request *req, bool need_pump)
+{
+   unsigned long flags;
+   int ret;
+
+   spin_lock_irqsave(>queue_lock, flags);
+
+   if (!engine->running) {
+   spin_unlock_irqrestore(>queue_lock, flags);
+   return -ESHUTDOWN;
+   }
+
+   ret = aead_enqueue_request((struct aead_queue *)>queue, req);
+
+   if (!engine->busy && need_pump)
+   kthread_queue_work(engine->kworker, >pump_requests);
+
+   spin_unlock_irqrestore(>queue_lock, flags);
+   return ret;
+}
+EXPORT_SYMBOL_GPL(crypto_transfer_aead_request);
+
+/**
+ * crypto_transfer_aead_request_to_engine - transfer one request to list
+ * into the engine queue
+ * @engine: the hardware engine
+ * @req: the request need to be listed into the engine queue
+ */
+int crypto_transfer_aead_request_to_engine(struct crypto_engine *engine,
+  struct aead_request *req)
+{
+   return crypto_transfer_aead_request(engine, req, true);
+}
+EXPORT_SYMBOL_GPL(crypto_transfer_aead_request_to_engine);
+
+/**
  * crypto_finalize_cipher_request - finalize one request if the request is done
  * @engine: the hardware engine
  * @req: the request need to be finalized
@@ -329,6 +393,43 @@ void crypto_finalize_hash_request(struct crypto_engine 
*engine,
 EXPORT_SYMBOL_GPL(crypto_finalize_hash_request);
 
 /**
+ * crypto_finalize_aead_request - finalize one request if the request is done
+ * @engine: the hardware engine
+ * @req: the request need to be finalized
+ * @err: error number
+ */
+void crypto_finalize_aead_request(struct crypto_engine *engine,
+ struct aead_request *req, int err)
+{
+   unsigned long flags;
+   bool finalize_cur_req = false;
+   int ret;
+
+   spin_lock_irqsave(>queue_lock, flags);
+   if (engine->cur_req == >base)
+   finalize_cur_req = true;
+   spin_unlock_irqrestore(>queue_lock, flags);
+
+   if (finalize_cur_req) {
+  

[PATCH v2 3/3] crypto: stm32 - Support for STM32 CRYP crypto module

[Fabien Dessenne]

This module registers block and AEAD cipher algorithms that make use of
the STMicroelectronics STM32 crypto "CRYP1" hardware.
The following algorithms are supported:
- aes: ecb, cbc, ctr, gcm, ccm
- des: ecb, cbc
- tdes: ecb, cbc

Signed-off-by: Fabien Dessenne 
---
 drivers/crypto/stm32/Kconfig  |9 +
 drivers/crypto/stm32/Makefile |3 +-
 drivers/crypto/stm32/stm32-cryp.c | 1962 +
 3 files changed, 1973 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/stm32/stm32-cryp.c

diff --git a/drivers/crypto/stm32/Kconfig b/drivers/crypto/stm32/Kconfig
index 602332e..61ef00b 100644
--- a/drivers/crypto/stm32/Kconfig
+++ b/drivers/crypto/stm32/Kconfig
@@ -18,3 +18,12 @@ config HASH_DEV_STM32
help
   This enables support for the HASH hw accelerator which can be found
  on STMicroelectronics STM32 SOC.
+
+config CRYP_DEV_STM32
+   tristate "Support for STM32 cryp accelerators"
+   depends on ARCH_STM32
+   select CRYPTO_HASH
+   select CRYPTO_ENGINE
+   help
+  This enables support for the CRYP (AES/DES/TDES) hw accelerator which
+ can be found on STMicroelectronics STM32 SOC.
diff --git a/drivers/crypto/stm32/Makefile b/drivers/crypto/stm32/Makefile
index 73cd56c..2c19fc1 100644
--- a/drivers/crypto/stm32/Makefile
+++ b/drivers/crypto/stm32/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_CRC_DEV_STM32) += stm32_crc32.o
-obj-$(CONFIG_HASH_DEV_STM32) += stm32-hash.o
\ No newline at end of file
+obj-$(CONFIG_HASH_DEV_STM32) += stm32-hash.o
+obj-$(CONFIG_CRYP_DEV_STM32) += stm32-cryp.o
diff --git a/drivers/crypto/stm32/stm32-cryp.c 
b/drivers/crypto/stm32/stm32-cryp.c
new file mode 100644
index 000..9a02d7c
--- /dev/null
+++ b/drivers/crypto/stm32/stm32-cryp.c
@@ -0,0 +1,1962 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author: Fabien Dessenne 
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME "stm32-cryp"
+
+/* Bit [0] encrypt / decrypt */
+#define FLG_ENCRYPT BIT(0)
+/* Bit [8..1] algo & operation mode */
+#define FLG_AES BIT(1)
+#define FLG_DES BIT(2)
+#define FLG_TDESBIT(3)
+#define FLG_ECB BIT(4)
+#define FLG_CBC BIT(5)
+#define FLG_CTR BIT(6)
+#define FLG_GCM BIT(7)
+#define FLG_CCM BIT(8)
+/* Mode mask = bits [15..0] */
+#define FLG_MODE_MASK   GENMASK(15, 0)
+/* Bit [31..16] status  */
+#define FLG_CCM_PADDED_WA   BIT(16)
+
+/* Registers */
+#define CRYP_CR 0x
+#define CRYP_SR 0x0004
+#define CRYP_DIN0x0008
+#define CRYP_DOUT   0x000C
+#define CRYP_DMACR  0x0010
+#define CRYP_IMSCR  0x0014
+#define CRYP_RISR   0x0018
+#define CRYP_MISR   0x001C
+#define CRYP_K0LR   0x0020
+#define CRYP_K0RR   0x0024
+#define CRYP_K1LR   0x0028
+#define CRYP_K1RR   0x002C
+#define CRYP_K2LR   0x0030
+#define CRYP_K2RR   0x0034
+#define CRYP_K3LR   0x0038
+#define CRYP_K3RR   0x003C
+#define CRYP_IV0LR  0x0040
+#define CRYP_IV0RR  0x0044
+#define CRYP_IV1LR  0x0048
+#define CRYP_IV1RR  0x004C
+#define CRYP_CSGCMCCM0R 0x0050
+#define CRYP_CSGCM0R0x0070
+
+/* Registers values */
+#define CR_DEC_NOT_ENC  0x0004
+#define CR_TDES_ECB 0x
+#define CR_TDES_CBC 0x0008
+#define CR_DES_ECB  0x0010
+#define CR_DES_CBC  0x0018
+#define CR_AES_ECB  0x0020
+#define CR_AES_CBC  0x0028
+#define CR_AES_CTR  0x0030
+#define CR_AES_KP   0x0038
+#define CR_AES_GCM  0x0008
+#define CR_AES_CCM  0x00080008
+#define CR_AES_UNKNOWN  0x
+#define CR_ALGO_MASK0x00080038
+#define CR_DATA32   0x
+#define CR_DATA16   0x0040
+#define CR_DATA80x0080
+#define CR_DATA10x00C0
+#define CR_KEY128   0x
+#define CR_KEY192   0x0100
+#define CR_KEY256   0x0200
+#define CR_FFLUSH   0x4000
+#define CR_CRYPEN   0x8000
+#define CR_PH_INIT  0x
+#define CR_PH_HEADER0x0001
+#define CR_PH_PAYLOAD   0x0002
+#define CR_PH_FINAL 0x0003
+#define CR_PH_MASK  0x0003
+
+#define SR_BUSY   

[PATCH v2 2/3] dt-bindings: Document STM32 CRYP bindings

[Fabien Dessenne]

Document device tree bindings for the STM32 CRYP.

Signed-off-by: Fabien Dessenne 
---
 .../devicetree/bindings/crypto/st,stm32-cryp.txt | 20 
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt

diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt 
b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt
new file mode 100644
index 000..7c6d599
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt
@@ -0,0 +1,20 @@
+* STMicroelectronics STM32 CRYP
+
+Required properties:
+- compatible: Should be "st,stm32f756-cryp".
+- reg: The address and length of the peripheral registers space
+- clocks: The input clock of the CRYP instance
+- interrupts: The CRYP interrupt
+
+Optional properties:
+- resets: The input reset of the CRYP instance
+
+Example:
+cryp1: cryp@5006 {
+   compatible = "st,stm32f756-cryp";
+   reg = <0x5006 0x400>;
+   interrupts = <79>;
+   clocks = < 0 STM32F7_AHB2_CLOCK(CRYP)>;
+   resets = < STM32F7_AHB2_RESET(CRYP)>;
+   status = "disabled";
+};
-- 
2.7.4

[PATCH v2 0/3] STM32 CRYP crypto driver

[Fabien Dessenne]

This set of patches adds a new crypto driver for STMicroelectronics stm32 HW.
This drivers uses the crypto API and provides with HW-enabled AEAD and block
cipher algorithms.
It makes use of the crypto engine which is upgraded in order to support AEAD
requests.

This driver was successfully tested with tcrypt / testmgr.

Changes since v2:
- update dt-bindings (interrupts description)
- rebase on STM32 crypto patches (L. Debieve : update CRC32 + add HASH)

Fabien Dessenne (3):
  crypto: engine - permit to enqueue aead_request
  dt-bindings: Document STM32 CRYP bindings
  crypto: stm32 - Support for STM32 CRYP crypto module

 .../devicetree/bindings/crypto/st,stm32-cryp.txt   |   20 +
 crypto/crypto_engine.c |  101 +
 drivers/crypto/stm32/Kconfig   |9 +
 drivers/crypto/stm32/Makefile  |3 +-
 drivers/crypto/stm32/stm32-cryp.c  | 1962 
 include/crypto/engine.h|   16 +
 6 files changed, 2110 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt
 create mode 100644 drivers/crypto/stm32/stm32-cryp.c

-- 
2.7.4

Re: [PATCH v3 11/22] staging: ccree: fix line indentation and breaks

[Joe Perches]

On Tue, 2017-08-15 at 09:26 +0300, Gilad Ben-Yossef wrote:
> Fix wrong indentation and line breaks, including missing tabs,
> breaking lines longer then 80 char or wrongly broken.
[]
> diff --git a/drivers/staging/ccree/ssi_driver.c 
> b/drivers/staging/ccree/ssi_driver.c
[]
> - SSI_LOG_ERR("snprintf returned %d . aborting buffer 
> array dump\n", ret);
> + SSI_LOG_ERR
> + ("snprintf returned %d . aborting buffer array 
> dump\n",
> +  ret);

This change is quite unpleasant to read.

[PATCH v3 01/22] staging: ccree: fix split strings

[Gilad Ben-Yossef]

Fix strings in log messages being split across lines and the resulting
alignment issues when being fixed.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c|  9 ++--
 drivers/staging/ccree/ssi_buffer_mgr.c  | 86 ++---
 drivers/staging/ccree/ssi_cipher.c  | 27 +--
 drivers/staging/ccree/ssi_driver.c  |  4 +-
 drivers/staging/ccree/ssi_hash.c| 43 -
 drivers/staging/ccree/ssi_ivgen.c   |  8 +--
 drivers/staging/ccree/ssi_request_mgr.c | 13 ++---
 7 files changed, 81 insertions(+), 109 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index f5ca0e3..d8f2249 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -240,9 +240,8 @@ static void ssi_aead_complete(struct device *dev, void 
*ssi_req, void __iomem *c
if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) {
if (memcmp(areq_ctx->mac_buf, areq_ctx->icv_virt_addr,
   ctx->authsize) != 0) {
-   SSI_LOG_DEBUG("Payload authentication failure, "
-   "(auth-size=%d, cipher=%d).\n",
-   ctx->authsize, ctx->cipher_mode);
+   SSI_LOG_DEBUG("Payload authentication failure, 
(auth-size=%d, cipher=%d).\n",
+ ctx->authsize, ctx->cipher_mode);
/* In case of payload authentication failure, MUST NOT
 * revealed the decrypted message --> zero its memory.
 */
@@ -455,8 +454,8 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 
*key, unsigned int keyl
if (likely(keylen != 0)) {
key_dma_addr = dma_map_single(dev, (void *)key, keylen, 
DMA_TO_DEVICE);
if (unlikely(dma_mapping_error(dev, key_dma_addr))) {
-   SSI_LOG_ERR("Mapping key va=0x%p len=%u for"
-  " DMA failed\n", key, keylen);
+   SSI_LOG_ERR("Mapping key va=0x%p len=%u for DMA 
failed\n",
+   key, keylen);
return -ENOMEM;
}
if (keylen > blocksize) {
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 6393609..d7ce293 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -82,8 +82,8 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
 
while (nbytes != 0) {
if (sg_is_chain(sg_list)) {
-   SSI_LOG_ERR("Unexpected chained entry "
-  "in sg (entry =0x%X)\n", nents);
+   SSI_LOG_ERR("Unexpected chained entry in sg (entry 
=0x%X)\n",
+   nents);
BUG();
}
if (sg_list->length != 0) {
@@ -259,11 +259,9 @@ static int ssi_buffer_mgr_generate_mlli(
/* Set MLLI size for the bypass operation */
mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE);
 
-   SSI_LOG_DEBUG("MLLI params: "
-"virt_addr=%pK dma_addr=%pad mlli_len=0x%X\n",
-  mlli_params->mlli_virt_addr,
-  mlli_params->mlli_dma_addr,
-  mlli_params->mlli_len);
+   SSI_LOG_DEBUG("MLLI params: virt_addr=%pK dma_addr=%pad 
mlli_len=0x%X\n",
+ mlli_params->mlli_virt_addr, mlli_params->mlli_dma_addr,
+ mlli_params->mlli_len);
 
 build_mlli_exit:
return rc;
@@ -276,9 +274,8 @@ static inline void ssi_buffer_mgr_add_buffer_entry(
 {
unsigned int index = sgl_data->num_of_buffers;
 
-   SSI_LOG_DEBUG("index=%u single_buff=%pad "
-"buffer_len=0x%08X is_last=%d\n",
-index, buffer_dma, buffer_len, is_last_entry);
+   SSI_LOG_DEBUG("index=%u single_buff=%pad buffer_len=0x%08X 
is_last=%d\n",
+ index, buffer_dma, buffer_len, is_last_entry);
sgl_data->nents[index] = 1;
sgl_data->entry[index].buffer_dma = buffer_dma;
sgl_data->offset[index] = 0;
@@ -359,8 +356,7 @@ static int ssi_buffer_mgr_map_scatterlist(
SSI_LOG_ERR("dma_map_sg() single buffer failed\n");
return -ENOMEM;
}
-   SSI_LOG_DEBUG("Mapped sg: dma_address=%pad "
-"page=%p addr=%pK offset=%u "
+   SSI_LOG_DEBUG("Mapped sg: dma_address=%pad page=%p addr=%pK 
offset=%u "
 "length=%u\n",
 sg_dma_address(sg),
 sg_page(sg),
@@ -419,12 +415,10 @@ ssi_aead_handle_config_buf(struct device *dev,
sg_init_one(_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + 

[PATCH v3 02/22] staging: ccree: kmalloc by sizeof var not type

[Gilad Ben-Yossef]

Change places where we alloc memory by sizeof type to sizeof var.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c| 4 ++--
 drivers/staging/ccree/ssi_cipher.c  | 4 ++--
 drivers/staging/ccree/ssi_driver.c  | 2 +-
 drivers/staging/ccree/ssi_hash.c| 4 ++--
 drivers/staging/ccree/ssi_ivgen.c   | 2 +-
 drivers/staging/ccree/ssi_request_mgr.c | 2 +-
 6 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index d8f2249..a8cb432 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -2658,7 +2658,7 @@ static struct ssi_crypto_alg *ssi_aead_create_alg(struct 
ssi_alg_template *templ
struct ssi_crypto_alg *t_alg;
struct aead_alg *alg;
 
-   t_alg = kzalloc(sizeof(struct ssi_crypto_alg), GFP_KERNEL);
+   t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL);
if (!t_alg) {
SSI_LOG_ERR("failed to allocate t_alg\n");
return ERR_PTR(-ENOMEM);
@@ -2713,7 +2713,7 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata)
int rc = -ENOMEM;
int alg;
 
-   aead_handle = kmalloc(sizeof(struct ssi_aead_handle), GFP_KERNEL);
+   aead_handle = kmalloc(sizeof(*aead_handle), GFP_KERNEL);
if (!aead_handle) {
rc = -ENOMEM;
goto fail0;
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index 068b10b..d98178d 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -1215,7 +1215,7 @@ struct ssi_crypto_alg *ssi_ablkcipher_create_alg(struct 
ssi_alg_template *templa
struct ssi_crypto_alg *t_alg;
struct crypto_alg *alg;
 
-   t_alg = kzalloc(sizeof(struct ssi_crypto_alg), GFP_KERNEL);
+   t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL);
if (!t_alg) {
SSI_LOG_ERR("failed to allocate t_alg\n");
return ERR_PTR(-ENOMEM);
@@ -1276,7 +1276,7 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata)
int rc = -ENOMEM;
int alg;
 
-   ablkcipher_handle = kmalloc(sizeof(struct ssi_blkcipher_handle),
+   ablkcipher_handle = kmalloc(sizeof(*ablkcipher_handle),
GFP_KERNEL);
if (!ablkcipher_handle)
return -ENOMEM;
diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index d104dbd..1cae2b7 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -223,7 +223,7 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
struct resource *req_mem_cc_regs = NULL;
void __iomem *cc_base = NULL;
bool irq_registered = false;
-   struct ssi_drvdata *new_drvdata = kzalloc(sizeof(struct ssi_drvdata), 
GFP_KERNEL);
+   struct ssi_drvdata *new_drvdata = kzalloc(sizeof(*new_drvdata), 
GFP_KERNEL);
struct device *dev = _dev->dev;
struct device_node *np = dev->of_node;
u32 signature_val;
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 3a734df..6c08b1d 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -2055,7 +2055,7 @@ ssi_hash_create_alg(struct ssi_hash_template *template, 
bool keyed)
struct crypto_alg *alg;
struct ahash_alg *halg;
 
-   t_crypto_alg = kzalloc(sizeof(struct ssi_hash_alg), GFP_KERNEL);
+   t_crypto_alg = kzalloc(sizeof(*t_crypto_alg), GFP_KERNEL);
if (!t_crypto_alg) {
SSI_LOG_ERR("failed to allocate t_alg\n");
return ERR_PTR(-ENOMEM);
@@ -2221,7 +2221,7 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata)
int rc = 0;
int alg;
 
-   hash_handle = kzalloc(sizeof(struct ssi_hash_handle), GFP_KERNEL);
+   hash_handle = kzalloc(sizeof(*hash_handle), GFP_KERNEL);
if (!hash_handle) {
SSI_LOG_ERR("kzalloc failed to allocate %zu B\n",
sizeof(struct ssi_hash_handle));
diff --git a/drivers/staging/ccree/ssi_ivgen.c 
b/drivers/staging/ccree/ssi_ivgen.c
index bca44af..93a2a94 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -191,7 +191,7 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata)
int rc;
 
/* Allocate "this" context */
-   drvdata->ivgen_handle = kzalloc(sizeof(struct ssi_ivgen_ctx), 
GFP_KERNEL);
+   drvdata->ivgen_handle = kzalloc(sizeof(*drvdata->ivgen_handle), 
GFP_KERNEL);
if (!drvdata->ivgen_handle) {
SSI_LOG_ERR("Not enough memory to allocate IVGEN context (%zu 
B)\n",
sizeof(struct ssi_ivgen_ctx));
diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index 9a4bb5c..cae9904 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ 

[PATCH v3 04/22] staging: ccree: Convert to devm_ioremap_resource for map, unmap

[Gilad Ben-Yossef]

From: Suniel Mahesh 

It is recommended to use managed function devm_ioremap_resource(),
which simplifies driver cleanup paths and driver code.
This patch does the following:
(a) replace request_mem_region(), ioremap() and corresponding error
handling with devm_ioremap_resource().
(b) remove struct resource pointer(res_mem) in struct ssi_drvdata as it
seems redundant, use struct resource pointer which is defined locally and
adjust return value of platform_get_resource() accordingly.
(c) release_mem_region() and iounmap() are dropped, since devm_ioremap_
resource() releases and unmaps mem region on driver detach.
(d) adjust log messages accordingly and remove any blank lines.

Signed-off-by: Suniel Mahesh 
[gby: rebase on top of latest coding style fixes changes]
Acked-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.c | 60 ++
 drivers/staging/ccree/ssi_driver.h |  1 -
 2 files changed, 15 insertions(+), 46 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 97dfc2c..603eb03 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -246,35 +246,21 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
dev_set_drvdata(_dev->dev, new_drvdata);
/* Get device resources */
/* First CC registers space */
-   new_drvdata->res_mem = platform_get_resource(plat_dev, IORESOURCE_MEM, 
0);
-   if (unlikely(!new_drvdata->res_mem)) {
-   SSI_LOG_ERR("Failed getting IO memory resource\n");
-   rc = -ENODEV;
-   goto init_cc_res_err;
-   }
-   SSI_LOG_DEBUG("Got MEM resource (%s): start=%pad end=%pad\n",
- new_drvdata->res_mem->name,
- new_drvdata->res_mem->start,
- new_drvdata->res_mem->end);
+   req_mem_cc_regs = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
/* Map registers space */
-   req_mem_cc_regs = request_mem_region(new_drvdata->res_mem->start, 
resource_size(new_drvdata->res_mem), "arm_cc7x_regs");
-   if (unlikely(!req_mem_cc_regs)) {
-   SSI_LOG_ERR("Couldn't allocate registers memory region at 
0x%08X\n",
-   (unsigned int)new_drvdata->res_mem->start);
-   rc = -EBUSY;
-   goto init_cc_res_err;
-   }
-   cc_base = ioremap(new_drvdata->res_mem->start, 
resource_size(new_drvdata->res_mem));
-   if (unlikely(!cc_base)) {
-   SSI_LOG_ERR("ioremap[CC](0x%08X,0x%08X) failed\n",
-   (unsigned int)new_drvdata->res_mem->start,
-   (unsigned int)resource_size(new_drvdata->res_mem));
-   rc = -ENOMEM;
+   new_drvdata->cc_base = devm_ioremap_resource(_dev->dev,
+req_mem_cc_regs);
+   if (IS_ERR(new_drvdata->cc_base)) {
+   rc = PTR_ERR(new_drvdata->cc_base);
goto init_cc_res_err;
}
-   SSI_LOG_DEBUG("CC registers mapped from %pa to 0x%p\n", 
_drvdata->res_mem->start, cc_base);
-   new_drvdata->cc_base = cc_base;
-
+   SSI_LOG_DEBUG("Got MEM resource (%s): start=%pad end=%pad\n",
+ req_mem_cc_regs->name,
+ req_mem_cc_regs->start,
+ req_mem_cc_regs->end);
+   SSI_LOG_DEBUG("CC registers mapped from %pa to 0x%p\n",
+ _mem_cc_regs->start, new_drvdata->cc_base);
+   cc_base = new_drvdata->cc_base;
/* Then IRQ */
new_drvdata->res_irq = platform_get_resource(plat_dev, IORESOURCE_IRQ, 
0);
if (unlikely(!new_drvdata->res_irq)) {
@@ -424,17 +410,9 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
 #ifdef ENABLE_CC_SYSFS
ssi_sysfs_fini();
 #endif
-
-   if (req_mem_cc_regs) {
-   if (irq_registered) {
-   free_irq(new_drvdata->res_irq->start, 
new_drvdata);
-   new_drvdata->res_irq = NULL;
-   iounmap(cc_base);
-   new_drvdata->cc_base = NULL;
-   }
-   release_mem_region(new_drvdata->res_mem->start,
-  resource_size(new_drvdata->res_mem));
-   new_drvdata->res_mem = NULL;
+   if (irq_registered) {
+   free_irq(new_drvdata->res_irq->start, new_drvdata);
+   new_drvdata->res_irq = NULL;
}
dev_set_drvdata(_dev->dev, NULL);
}
@@ -470,14 +448,6 @@ static void cleanup_cc_resources(struct platform_device 
*plat_dev)
cc_clk_off(drvdata);
free_irq(drvdata->res_irq->start, drvdata);
drvdata->res_irq = NULL;
-
-   if 

[PATCH v3 03/22] staging: ccree: Replace kzalloc with devm_kzalloc

[Gilad Ben-Yossef]

From: Suniel Mahesh 

It is recommended to use managed function devm_kzalloc, which
simplifies driver cleanup paths and driver code.
This patch does the following:
(a) replace kzalloc with devm_kzalloc.
(b) drop kfree(), because memory allocated with devm_kzalloc() is
automatically freed on driver detach, otherwise it leads to a double
free.
(c) remove unnecessary blank lines.

Signed-off-by: Suniel Mahesh 
[gby: rebase on top of latest coding style fixes changes]
Acked-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 1cae2b7..97dfc2c 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -223,13 +223,15 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
struct resource *req_mem_cc_regs = NULL;
void __iomem *cc_base = NULL;
bool irq_registered = false;
-   struct ssi_drvdata *new_drvdata = kzalloc(sizeof(*new_drvdata), 
GFP_KERNEL);
+   struct ssi_drvdata *new_drvdata;
struct device *dev = _dev->dev;
struct device_node *np = dev->of_node;
u32 signature_val;
int rc = 0;
 
-   if (unlikely(!new_drvdata)) {
+   new_drvdata = devm_kzalloc(_dev->dev, sizeof(*new_drvdata),
+  GFP_KERNEL);
+   if (!new_drvdata) {
SSI_LOG_ERR("Failed to allocate drvdata");
rc = -ENOMEM;
goto init_cc_res_err;
@@ -434,10 +436,8 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
   resource_size(new_drvdata->res_mem));
new_drvdata->res_mem = NULL;
}
-   kfree(new_drvdata);
dev_set_drvdata(_dev->dev, NULL);
}
-
return rc;
 }
 
@@ -478,8 +478,6 @@ static void cleanup_cc_resources(struct platform_device 
*plat_dev)
drvdata->cc_base = NULL;
drvdata->res_mem = NULL;
}
-
-   kfree(drvdata);
dev_set_drvdata(_dev->dev, NULL);
 }
 
-- 
2.1.4

[PATCH v3 05/22] staging: ccree: Use platform_get_irq and devm_request_irq

[Gilad Ben-Yossef]

From: Suniel Mahesh 

It is recommended to use managed function devm_request_irq(),
which simplifies driver cleanup paths and driver code.
This patch does the following:
(a) replace platform_get_resource(), request_irq() and corresponding
error handling with platform_get_irq() and devm_request_irq().
(b) remove struct resource pointer(res_irq) in struct ssi_drvdata as
it seems redundant.
(c) change type of member irq in struct ssi_drvdata from unsigned int
to int, as return type of platform_get_irq is int and can be used in
error handling.
(d) remove irq_registered variable from driver probe as it seems
redundant.
(e) free_irq is not required any more, devm_request_irq() free's it
on driver detach.
(f) adjust log messages accordingly and remove any blank lines.

Signed-off-by: Suniel Mahesh 
Acked-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.c | 30 +-
 drivers/staging/ccree/ssi_driver.h |  3 +--
 2 files changed, 10 insertions(+), 23 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 603eb03..c18e7e3 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -222,7 +222,6 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
 {
struct resource *req_mem_cc_regs = NULL;
void __iomem *cc_base = NULL;
-   bool irq_registered = false;
struct ssi_drvdata *new_drvdata;
struct device *dev = _dev->dev;
struct device_node *np = dev->of_node;
@@ -262,26 +261,22 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
  _mem_cc_regs->start, new_drvdata->cc_base);
cc_base = new_drvdata->cc_base;
/* Then IRQ */
-   new_drvdata->res_irq = platform_get_resource(plat_dev, IORESOURCE_IRQ, 
0);
-   if (unlikely(!new_drvdata->res_irq)) {
+   new_drvdata->irq = platform_get_irq(plat_dev, 0);
+   if (new_drvdata->irq < 0) {
SSI_LOG_ERR("Failed getting IRQ resource\n");
-   rc = -ENODEV;
+   rc = new_drvdata->irq;
goto init_cc_res_err;
}
-   rc = request_irq(new_drvdata->res_irq->start, cc_isr,
-IRQF_SHARED, "arm_cc7x", new_drvdata);
-   if (unlikely(rc != 0)) {
-   SSI_LOG_ERR("Could not register to interrupt %llu\n",
-   (unsigned long long)new_drvdata->res_irq->start);
+   rc = devm_request_irq(_dev->dev, new_drvdata->irq, cc_isr,
+ IRQF_SHARED, "arm_cc7x", new_drvdata);
+   if (rc) {
+   SSI_LOG_ERR("Could not register to interrupt %d\n",
+   new_drvdata->irq);
goto init_cc_res_err;
}
init_completion(_drvdata->icache_setup_completion);
 
-   irq_registered = true;
-   SSI_LOG_DEBUG("Registered to IRQ (%s) %llu\n",
- new_drvdata->res_irq->name,
- (unsigned long long)new_drvdata->res_irq->start);
-
+   SSI_LOG_DEBUG("Registered to IRQ: %d\n", new_drvdata->irq);
new_drvdata->plat_dev = plat_dev;
 
rc = cc_clk_on(new_drvdata);
@@ -410,10 +405,6 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
 #ifdef ENABLE_CC_SYSFS
ssi_sysfs_fini();
 #endif
-   if (irq_registered) {
-   free_irq(new_drvdata->res_irq->start, new_drvdata);
-   new_drvdata->res_irq = NULL;
-   }
dev_set_drvdata(_dev->dev, NULL);
}
return rc;
@@ -443,11 +434,8 @@ static void cleanup_cc_resources(struct platform_device 
*plat_dev)
 #ifdef ENABLE_CC_SYSFS
ssi_sysfs_fini();
 #endif
-
fini_cc_regs(drvdata);
cc_clk_off(drvdata);
-   free_irq(drvdata->res_irq->start, drvdata);
-   drvdata->res_irq = NULL;
dev_set_drvdata(_dev->dev, NULL);
 }
 
diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index 518c0bf..88ef370 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -128,9 +128,8 @@ struct ssi_crypto_req {
  * @fw_ver:SeP loaded firmware version
  */
 struct ssi_drvdata {
-   struct resource *res_irq;
void __iomem *cc_base;
-   unsigned int irq;
+   int irq;
u32 irq_mask;
u32 fw_ver;
/* Calibration time of start/stop
-- 
2.1.4

[PATCH v3 06/22] staging: ccree: simplify resource release on error

[Gilad Ben-Yossef]

The resource release on probe/init error was being handled
in an awkward manner and possibly leaking memory on certain
(unlikely) error path.

Fix it by simplifying the error resource release and making
it easier to track.

Reported-by: Dan Carpenter 
Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c   |   3 +-
 drivers/staging/ccree/ssi_cipher.c |   3 +-
 drivers/staging/ccree/ssi_driver.c | 102 -
 drivers/staging/ccree/ssi_hash.c   |   3 +-
 4 files changed, 59 insertions(+), 52 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index a8cb432..66eedbe 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -2719,6 +2719,7 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata)
goto fail0;
}
 
+   INIT_LIST_HEAD(_handle->aead_list);
drvdata->aead_handle = aead_handle;
 
aead_handle->sram_workspace_addr = ssi_sram_mgr_alloc(
@@ -2729,8 +2730,6 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata)
goto fail1;
}
 
-   INIT_LIST_HEAD(_handle->aead_list);
-
/* Linux crypto */
for (alg = 0; alg < ARRAY_SIZE(aead_algs); alg++) {
t_alg = ssi_aead_create_alg(_algs[alg]);
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index d98178d..712b21d 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -1281,9 +1281,8 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata)
if (!ablkcipher_handle)
return -ENOMEM;
 
-   drvdata->blkcipher_handle = ablkcipher_handle;
-
INIT_LIST_HEAD(_handle->blkcipher_alg_list);
+   drvdata->blkcipher_handle = ablkcipher_handle;
 
/* Linux crypto */
SSI_LOG_DEBUG("Number of algorithms = %zu\n", 
ARRAY_SIZE(blkcipher_algs));
diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index c18e7e3..1b95f90 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -233,16 +233,14 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
if (!new_drvdata) {
SSI_LOG_ERR("Failed to allocate drvdata");
rc = -ENOMEM;
-   goto init_cc_res_err;
+   goto post_drvdata_err;
}
+   dev_set_drvdata(_dev->dev, new_drvdata);
+   new_drvdata->plat_dev = plat_dev;
 
new_drvdata->clk = of_clk_get(np, 0);
new_drvdata->coherent = of_dma_is_coherent(np);
 
-   /*Initialize inflight counter used in dx_ablkcipher_secure_complete 
used for count of BYSPASS blocks operations*/
-   new_drvdata->inflight_counter = 0;
-
-   dev_set_drvdata(_dev->dev, new_drvdata);
/* Get device resources */
/* First CC registers space */
req_mem_cc_regs = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
@@ -250,38 +248,42 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
new_drvdata->cc_base = devm_ioremap_resource(_dev->dev,
 req_mem_cc_regs);
if (IS_ERR(new_drvdata->cc_base)) {
+   SSI_LOG_ERR("Failed to ioremap registers");
rc = PTR_ERR(new_drvdata->cc_base);
-   goto init_cc_res_err;
+   goto post_drvdata_err;
}
+
SSI_LOG_DEBUG("Got MEM resource (%s): start=%pad end=%pad\n",
  req_mem_cc_regs->name,
  req_mem_cc_regs->start,
  req_mem_cc_regs->end);
SSI_LOG_DEBUG("CC registers mapped from %pa to 0x%p\n",
  _mem_cc_regs->start, new_drvdata->cc_base);
+
cc_base = new_drvdata->cc_base;
+
/* Then IRQ */
new_drvdata->irq = platform_get_irq(plat_dev, 0);
if (new_drvdata->irq < 0) {
SSI_LOG_ERR("Failed getting IRQ resource\n");
rc = new_drvdata->irq;
-   goto init_cc_res_err;
+   goto post_drvdata_err;
}
+
rc = devm_request_irq(_dev->dev, new_drvdata->irq, cc_isr,
  IRQF_SHARED, "arm_cc7x", new_drvdata);
if (rc) {
SSI_LOG_ERR("Could not register to interrupt %d\n",
new_drvdata->irq);
-   goto init_cc_res_err;
+   goto post_drvdata_err;
}
-   init_completion(_drvdata->icache_setup_completion);
-
SSI_LOG_DEBUG("Registered to IRQ: %d\n", new_drvdata->irq);
-   new_drvdata->plat_dev = plat_dev;
+
+   init_completion(_drvdata->icache_setup_completion);
 
rc = cc_clk_on(new_drvdata);
if (rc)
-   goto init_cc_res_err;
+   goto post_drvdata_err;
 
if (!new_drvdata->plat_dev->dev.dma_mask)

[PATCH v3 09/22] staging: ccree: Fix format/argument mismatches

[Gilad Ben-Yossef]

From: Joe Perches 

By default, debug logging is disabled by CC_DEBUG not being defined.

Convert SSI_LOG_DEBUG to use no_printk instead of an empty define
to validate formats and arguments.

Fix fallout.

Miscellanea:

o One of the conversions now uses %pR instead of multiple uses of %pad

Signed-off-by: Joe Perches 
[ gby: rebase on top of latest changes ]
Acked-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c|  8 
 drivers/staging/ccree/ssi_buffer_mgr.c  | 29 +---
 drivers/staging/ccree/ssi_cipher.c  | 10 +-
 drivers/staging/ccree/ssi_driver.c  | 10 --
 drivers/staging/ccree/ssi_driver.h  |  2 +-
 drivers/staging/ccree/ssi_hash.c| 34 -
 drivers/staging/ccree/ssi_request_mgr.c |  6 +++---
 7 files changed, 47 insertions(+), 52 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 66eedbe..03533c8 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -103,7 +103,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
if (ctx->enckey) {
dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, 
ctx->enckey_dma_addr);
SSI_LOG_DEBUG("Freed enckey DMA buffer enckey_dma_addr=%pad\n",
- ctx->enckey_dma_addr);
+ >enckey_dma_addr);
ctx->enckey_dma_addr = 0;
ctx->enckey = NULL;
}
@@ -117,7 +117,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
  xcbc->xcbc_keys_dma_addr);
}
SSI_LOG_DEBUG("Freed xcbc_keys DMA buffer 
xcbc_keys_dma_addr=%pad\n",
- xcbc->xcbc_keys_dma_addr);
+ >xcbc_keys_dma_addr);
xcbc->xcbc_keys_dma_addr = 0;
xcbc->xcbc_keys = NULL;
} else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC auth. */
@@ -128,7 +128,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
  hmac->ipad_opad,
  hmac->ipad_opad_dma_addr);
SSI_LOG_DEBUG("Freed ipad_opad DMA buffer 
ipad_opad_dma_addr=%pad\n",
- hmac->ipad_opad_dma_addr);
+ >ipad_opad_dma_addr);
hmac->ipad_opad_dma_addr = 0;
hmac->ipad_opad = NULL;
}
@@ -137,7 +137,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
  hmac->padded_authkey,
  hmac->padded_authkey_dma_addr);
SSI_LOG_DEBUG("Freed padded_authkey DMA buffer 
padded_authkey_dma_addr=%pad\n",
- hmac->padded_authkey_dma_addr);
+ >padded_authkey_dma_addr);
hmac->padded_authkey_dma_addr = 0;
hmac->padded_authkey = NULL;
}
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index d7ce293..0b81fd5 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -14,6 +14,7 @@
  * along with this program; if not, see .
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -33,14 +34,10 @@
 #include "ssi_hash.h"
 #include "ssi_aead.h"
 
-#ifdef CC_DEBUG
 #define GET_DMA_BUFFER_TYPE(buff_type) ( \
((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \
((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \
((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID")
-#else
-#define GET_DMA_BUFFER_TYPE(buff_type)
-#endif
 
 enum dma_buffer_type {
DMA_NULL_TYPE = -1,
@@ -260,7 +257,7 @@ static int ssi_buffer_mgr_generate_mlli(
mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE);
 
SSI_LOG_DEBUG("MLLI params: virt_addr=%pK dma_addr=%pad 
mlli_len=0x%X\n",
- mlli_params->mlli_virt_addr, mlli_params->mlli_dma_addr,
+ mlli_params->mlli_virt_addr, _params->mlli_dma_addr,
  mlli_params->mlli_len);
 
 build_mlli_exit:
@@ -275,7 +272,7 @@ static inline void ssi_buffer_mgr_add_buffer_entry(
unsigned int index = sgl_data->num_of_buffers;
 
SSI_LOG_DEBUG("index=%u single_buff=%pad buffer_len=0x%08X 
is_last=%d\n",
- index, buffer_dma, buffer_len, is_last_entry);
+ index, _dma, buffer_len, is_last_entry);
sgl_data->nents[index] = 1;
sgl_data->entry[index].buffer_dma = buffer_dma;
sgl_data->offset[index] = 0;
@@ -358,7 +355,7 @@ static int ssi_buffer_mgr_map_scatterlist(
}

[PATCH v3 08/22] staging: ccree: remove m32r as supported platform

[Gilad Ben-Yossef]

M32R requires special handling due due to how it has implemented
ioread32. It is also an orphaned arch on Linux and doesn't seem
to be worth the trouble. So until we have a real user, remove
support for it.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index 0b3092b..89af1c5 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -1,6 +1,6 @@
 config CRYPTO_DEV_CCREE
tristate "Support for ARM TrustZone CryptoCell C7XX family of Crypto 
accelerators"
-   depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
+   depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA && !M32R
default n
select CRYPTO_HASH
select CRYPTO_BLKCIPHER
-- 
2.1.4

[PATCH v3 07/22] staging: ccree: remove unused completion

[Gilad Ben-Yossef]

icache_setup_completion is no longer used. Remove it.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.c | 2 --
 drivers/staging/ccree/ssi_driver.h | 1 -
 2 files changed, 3 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 1b95f90..928c988 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -279,8 +279,6 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
}
SSI_LOG_DEBUG("Registered to IRQ: %d\n", new_drvdata->irq);
 
-   init_completion(_drvdata->icache_setup_completion);
-
rc = cc_clk_on(new_drvdata);
if (rc)
goto post_drvdata_err;
diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index 88ef370..9b6476d 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -138,7 +138,6 @@ struct ssi_drvdata {
u32 monitor_null_cycles;
struct platform_device *plat_dev;
ssi_sram_addr_t mlli_sram_addr;
-   struct completion icache_setup_completion;
void *buff_mgr_handle;
void *hash_handle;
void *aead_handle;
-- 
2.1.4

[PATCH v3 10/22] staging: ccree: rewrite GET_DMA_BUFFER_TYPE as func

[Gilad Ben-Yossef]

The GET_DMA_BUFFER_TYPE macro was triggering a macro argument reuse
warning from checkpatch. Rewrite the macro as inline function instead
to avoid risk of unintended side effects.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 26 +-
 drivers/staging/ccree/ssi_buffer_mgr.h |  6 --
 2 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 0b81fd5..4be7b51 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -34,11 +34,6 @@
 #include "ssi_hash.h"
 #include "ssi_aead.h"
 
-#define GET_DMA_BUFFER_TYPE(buff_type) ( \
-   ((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \
-   ((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \
-   ((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID")
-
 enum dma_buffer_type {
DMA_NULL_TYPE = -1,
DMA_SGL_TYPE = 1,
@@ -65,6 +60,19 @@ struct buffer_array {
u32 *mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
 };
 
+static const char *dma_buf_types[SSI_DMA_BUF_TYPE_MAX] = {
+   "BUF_NULL",
+   "BUF_DLLI",
+   "BUF_MLLI"
+   "BUF_INVALID"
+};
+
+static inline const char *dma_buf_type_str(enum ssi_req_dma_buf_type type)
+{
+   type = (type < SSI_DMA_BUF_INVL) ? type : SSI_DMA_BUF_INVL;
+   return dma_buf_types[type];
+}
+
 /**
  * ssi_buffer_mgr_get_sgl_nents() - Get scatterlist number of entries.
  *
@@ -597,7 +605,7 @@ int ssi_buffer_mgr_map_blkcipher_request(
}
 
SSI_LOG_DEBUG("areq_ctx->dma_buf_type = %s\n",
- GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type));
+ dma_buf_type_str(req_ctx->dma_buf_type));
 
return 0;
 
@@ -827,7 +835,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
areq_ctx->assoc.nents = 0;
areq_ctx->assoc.mlli_nents = 0;
SSI_LOG_DEBUG("Chain assoc of length 0: buff_type=%s 
nents=%u\n",
- GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
+ dma_buf_type_str(areq_ctx->assoc_buff_type),
  areq_ctx->assoc.nents);
goto chain_assoc_exit;
}
@@ -879,7 +887,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
if (unlikely((do_chain) ||
 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) {
SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n",
- GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
+ dma_buf_type_str(areq_ctx->assoc_buff_type),
  areq_ctx->assoc.nents);
ssi_buffer_mgr_add_scatterlist_entry(
sg_data, areq_ctx->assoc.nents,
@@ -1555,7 +1563,7 @@ int ssi_buffer_mgr_map_hash_request_final(
/* change the buffer index for the unmap function */
areq_ctx->buff_index = (areq_ctx->buff_index ^ 1);
SSI_LOG_DEBUG("areq_ctx->data_dma_buf_type = %s\n",
- GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type));
+ dma_buf_type_str(areq_ctx->data_dma_buf_type));
return 0;
 
 fail_unmap_din:
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.h 
b/drivers/staging/ccree/ssi_buffer_mgr.h
index 41f5223..93972fd 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.h
+++ b/drivers/staging/ccree/ssi_buffer_mgr.h
@@ -28,8 +28,10 @@
 
 enum ssi_req_dma_buf_type {
SSI_DMA_BUF_NULL = 0,
-   SSI_DMA_BUF_DLLI,
-   SSI_DMA_BUF_MLLI
+   SSI_DMA_BUF_DLLI = 1,
+   SSI_DMA_BUF_MLLI = 2,
+   SSI_DMA_BUF_INVL = 3,
+   SSI_DMA_BUF_TYPE_MAX = 4
 };
 
 enum ssi_sg_cpy_direct {
-- 
2.1.4

[PATCH v3 12/22] staging: ccree: align box comment correctly

[Gilad Ben-Yossef]

Fix indentation in first comment.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index b7d6586..b95c3ce 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -1,18 +1,18 @@
  /*
- * Copyright (C) 2012-2017 ARM Limited or its affiliates.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see .
- */
+  * Copyright (C) 2012-2017 ARM Limited or its affiliates.
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
+  *
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+  *
+  * You should have received a copy of the GNU General Public License
+  * along with this program; if not, see .
+  */
 
 #include 
 #include 
-- 
2.1.4

[PATCH v3 11/22] staging: ccree: fix line indentation and breaks

[Gilad Ben-Yossef]

Fix wrong indentation and line breaks, including missing tabs,
breaking lines longer then 80 char or wrongly broken.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.c | 107 +++--
 1 file changed, 67 insertions(+), 40 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 81cb63d..0ce2f57 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -87,27 +87,31 @@ void dump_byte_array(const char *name, const u8 *the_array, 
unsigned long size)
 
ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ", name, size);
if (ret < 0) {
-   SSI_LOG_ERR("snprintf returned %d . aborting buffer array 
dump\n", ret);
+   SSI_LOG_ERR
+   ("snprintf returned %d . aborting buffer array dump\n",
+ret);
return;
}
line_offset = ret;
for (i = 0, cur_byte = the_array;
 (i < size) && (line_offset < sizeof(line_buf)); i++, cur_byte++) {
-   ret = snprintf(line_buf + line_offset,
-  sizeof(line_buf) - line_offset,
-  "0x%02X ", *cur_byte);
+   ret = snprintf(line_buf + line_offset,
+  sizeof(line_buf) - line_offset,
+  "0x%02X ", *cur_byte);
if (ret < 0) {
-   SSI_LOG_ERR("snprintf returned %d . aborting buffer 
array dump\n", ret);
+   SSI_LOG_ERR
+   ("snprintf returned %d . aborting buffer array 
dump\n",
+ret);
return;
}
line_offset += ret;
-   if (line_offset > 75) { /* Cut before line end */
+   if (line_offset > 75) { /* Cut before line end */
SSI_LOG_DEBUG("%s\n", line_buf);
line_offset = 0;
}
}
 
-   if (line_offset > 0) /* Dump remaining line */
+   if (line_offset > 0)/* Dump remaining line */
SSI_LOG_DEBUG("%s\n", line_buf);
 }
 #endif
@@ -124,7 +128,7 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
/* read the interrupt status */
irr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR));
SSI_LOG_DEBUG("Got IRR=0x%08X\n", irr);
-   if (unlikely(irr == 0)) { /* Probably shared interrupt line */
+   if (unlikely(irr == 0)) {   /* Probably shared interrupt line */
SSI_LOG_ERR("Got interrupt with empty IRR\n");
return IRQ_NONE;
}
@@ -137,7 +141,8 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
/* Completion interrupt - most probable */
if (likely((irr & SSI_COMP_IRQ_MASK) != 0)) {
/* Mask AXI completion interrupt - will be unmasked in Deferred 
service handler */
-   CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | 
SSI_COMP_IRQ_MASK);
+   CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR),
+ imr | SSI_COMP_IRQ_MASK);
irr &= ~SSI_COMP_IRQ_MASK;
complete_request(drvdata);
}
@@ -145,7 +150,8 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
/* TEE FIPS interrupt */
if (likely((irr & SSI_GPR0_IRQ_MASK) != 0)) {
/* Mask interrupt - will be unmasked in Deferred service 
handler */
-   CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | 
SSI_GPR0_IRQ_MASK);
+   CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR),
+ imr | SSI_GPR0_IRQ_MASK);
irr &= ~SSI_GPR0_IRQ_MASK;
fips_handler(drvdata);
}
@@ -155,14 +161,18 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
u32 axi_err;
 
/* Read the AXI error ID */
-   axi_err = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, 
AXIM_MON_ERR));
-   SSI_LOG_DEBUG("AXI completion error: axim_mon_err=0x%08X\n", 
axi_err);
+   axi_err =
+   CC_HAL_READ_REGISTER(CC_REG_OFFSET
+(CRY_KERNEL, AXIM_MON_ERR));
+   SSI_LOG_DEBUG("AXI completion error: axim_mon_err=0x%08X\n",
+ axi_err);
 
irr &= ~SSI_AXI_ERR_IRQ_MASK;
}
 
if (unlikely(irr != 0)) {
-   SSI_LOG_DEBUG("IRR includes unknown cause bits (0x%08X)\n", 
irr);
+   SSI_LOG_DEBUG("IRR includes unknown cause bits (0x%08X)\n",
+ irr);
/* Just warning */
}
 
@@ -176,8 +186,11 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool 
is_probe)
 
/* Unmask all AXI interrupt 

[PATCH v3 13/22] staging: ccree: fix line indentation and breaks

[Gilad Ben-Yossef]

Fix source line indentation and breaks

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 494 ++-
 1 file changed, 284 insertions(+), 210 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index b95c3ce..e2dc5d8 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -33,7 +33,6 @@
 
 #define SSI_MAX_AHASH_SEQ_LEN 12
 #define SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE MAX(SSI_MAX_HASH_BLCK_SIZE, 3 * 
AES_BLOCK_SIZE)
-
 struct ssi_hash_handle {
ssi_sram_addr_t digest_len_sram_addr; /* const value in SRAM*/
ssi_sram_addr_t larval_digest_sram_addr;   /* const value in SRAM */
@@ -64,10 +63,9 @@ static const u64 sha512_init[] = {
SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0 };
 #endif
 
-static void ssi_hash_create_xcbc_setup(
-   struct ahash_request *areq,
-   struct cc_hw_desc desc[],
-   unsigned int *seq_size);
+static void ssi_hash_create_xcbc_setup(struct ahash_request *areq,
+  struct cc_hw_desc desc[],
+  unsigned int *seq_size);
 
 static void ssi_hash_create_cmac_setup(struct ahash_request *areq,
   struct cc_hw_desc desc[],
@@ -94,7 +92,8 @@ struct ssi_hash_ctx {
 * the initial digest if HASH.
 */
u8 digest_buff[SSI_MAX_HASH_DIGEST_SIZE]  cacheline_aligned;
-   u8 opad_tmp_keys_buff[SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE]  
cacheline_aligned;
+   u8 opad_tmp_keys_buff[SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE]
+   cacheline_aligned;
 
dma_addr_t opad_tmp_keys_dma_addr  cacheline_aligned;
dma_addr_t digest_buff_dma_addr;
@@ -107,18 +106,17 @@ struct ssi_hash_ctx {
bool is_hmac;
 };
 
-static void ssi_hash_create_data_desc(
-   struct ahash_req_ctx *areq_ctx,
-   struct ssi_hash_ctx *ctx,
-   unsigned int flow_mode, struct cc_hw_desc desc[],
-   bool is_not_last_data,
-   unsigned int *seq_size);
+static void ssi_hash_create_data_desc(struct ahash_req_ctx *areq_ctx,
+ struct ssi_hash_ctx *ctx,
+ unsigned int flow_mode,
+ struct cc_hw_desc desc[],
+ bool is_not_last_data,
+ unsigned int *seq_size);
 
 static inline void ssi_set_hash_endianity(u32 mode, struct cc_hw_desc *desc)
 {
if (unlikely((mode == DRV_HASH_MD5) ||
-(mode == DRV_HASH_SHA384) ||
-(mode == DRV_HASH_SHA512))) {
+(mode == DRV_HASH_SHA384) || (mode == DRV_HASH_SHA512))) {
set_bytes_swap(desc, 1);
} else {
set_cipher_config0(desc, HASH_DIGEST_RESULT_LITTLE_ENDIAN);
@@ -130,17 +128,18 @@ static int ssi_hash_map_result(struct device *dev,
   unsigned int digestsize)
 {
state->digest_result_dma_addr =
-   dma_map_single(dev, (void *)state->digest_result_buff,
-  digestsize,
-  DMA_BIDIRECTIONAL);
+   dma_map_single(dev, (void *)state->digest_result_buff,
+  digestsize, DMA_BIDIRECTIONAL);
if (unlikely(dma_mapping_error(dev, state->digest_result_dma_addr))) {
-   SSI_LOG_ERR("Mapping digest result buffer %u B for DMA 
failed\n",
-   digestsize);
+   SSI_LOG_ERR
+   ("Mapping digest result buffer %u B for DMA failed\n",
+digestsize);
return -ENOMEM;
}
-   SSI_LOG_DEBUG("Mapped digest result buffer %u B at va=%pK to 
dma=%pad\n",
- digestsize, state->digest_result_buff,
- >digest_result_dma_addr);
+   SSI_LOG_DEBUG
+   ("Mapped digest result buffer %u B at va=%pK to dma=%pad\n",
+digestsize, state->digest_result_buff,
+>digest_result_dma_addr);
 
return 0;
 }
@@ -150,8 +149,8 @@ static int ssi_hash_map_request(struct device *dev,
struct ssi_hash_ctx *ctx)
 {
bool is_hmac = ctx->is_hmac;
-   ssi_sram_addr_t larval_digest_addr = 
ssi_ahash_get_larval_digest_sram_addr(
-   ctx->drvdata, ctx->hash_mode);
+   ssi_sram_addr_t larval_digest_addr =
+   ssi_ahash_get_larval_digest_sram_addr(ctx->drvdata, ctx->hash_mode);
struct ssi_crypto_req ssi_req = {};
struct cc_hw_desc desc;
int rc = -ENOMEM;
@@ -166,40 +165,56 @@ static int ssi_hash_map_request(struct device *dev,
SSI_LOG_ERR("Allocating buff1 in context failed\n");
goto fail_buff0;
}
-   state->digest_result_buff = kzalloc(SSI_MAX_HASH_DIGEST_SIZE, 

[PATCH v3 14/22] staging: ccree: fix struct init braces

[Gilad Ben-Yossef]

Put struct init braces on line of it's own.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 32 
 1 file changed, 24 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index e2dc5d8..6baa449 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -41,26 +41,42 @@ struct ssi_hash_handle {
 };
 
 static const u32 digest_len_init[] = {
-   0x0040, 0x, 0x, 0x };
+   0x0040, 0x, 0x, 0x
+};
+
 static const u32 md5_init[] = {
-   SHA1_H3, SHA1_H2, SHA1_H1, SHA1_H0 };
+   SHA1_H3, SHA1_H2, SHA1_H1, SHA1_H0
+};
+
 static const u32 sha1_init[] = {
-   SHA1_H4, SHA1_H3, SHA1_H2, SHA1_H1, SHA1_H0 };
+   SHA1_H4, SHA1_H3, SHA1_H2, SHA1_H1, SHA1_H0
+};
+
 static const u32 sha224_init[] = {
SHA224_H7, SHA224_H6, SHA224_H5, SHA224_H4,
-   SHA224_H3, SHA224_H2, SHA224_H1, SHA224_H0 };
+   SHA224_H3, SHA224_H2, SHA224_H1, SHA224_H0
+};
+
 static const u32 sha256_init[] = {
SHA256_H7, SHA256_H6, SHA256_H5, SHA256_H4,
-   SHA256_H3, SHA256_H2, SHA256_H1, SHA256_H0 };
+   SHA256_H3, SHA256_H2, SHA256_H1, SHA256_H0
+};
+
 #if (DX_DEV_SHA_MAX > 256)
 static const u32 digest_len_sha512_init[] = {
-   0x0080, 0x, 0x, 0x };
+   0x0080, 0x, 0x, 0x
+};
+
 static const u64 sha384_init[] = {
SHA384_H7, SHA384_H6, SHA384_H5, SHA384_H4,
-   SHA384_H3, SHA384_H2, SHA384_H1, SHA384_H0 };
+   SHA384_H3, SHA384_H2, SHA384_H1, SHA384_H0
+};
+
 static const u64 sha512_init[] = {
SHA512_H7, SHA512_H6, SHA512_H5, SHA512_H4,
-   SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0 };
+   SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0
+};
+
 #endif
 
 static void ssi_hash_create_xcbc_setup(struct ahash_request *areq,
-- 
2.1.4

[PATCH v3 15/22] staging: ccree: fix line indentation and breaks

[Gilad Ben-Yossef]

Fix source line indentation and breaks in ssi_aead.c

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c | 1024 --
 1 file changed, 532 insertions(+), 492 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 03533c8..515a603 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -101,7 +101,8 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
dev = >drvdata->plat_dev->dev;
/* Unmap enckey buffer */
if (ctx->enckey) {
-   dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, 
ctx->enckey_dma_addr);
+   dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey,
+ ctx->enckey_dma_addr);
SSI_LOG_DEBUG("Freed enckey DMA buffer enckey_dma_addr=%pad\n",
  >enckey_dma_addr);
ctx->enckey_dma_addr = 0;
@@ -116,8 +117,9 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
  xcbc->xcbc_keys,
  xcbc->xcbc_keys_dma_addr);
}
-   SSI_LOG_DEBUG("Freed xcbc_keys DMA buffer 
xcbc_keys_dma_addr=%pad\n",
- >xcbc_keys_dma_addr);
+   SSI_LOG_DEBUG
+   ("Freed xcbc_keys DMA buffer xcbc_keys_dma_addr=%pad\n",
+>xcbc_keys_dma_addr);
xcbc->xcbc_keys_dma_addr = 0;
xcbc->xcbc_keys = NULL;
} else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC auth. */
@@ -127,8 +129,9 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
dma_free_coherent(dev, 2 * MAX_HMAC_DIGEST_SIZE,
  hmac->ipad_opad,
  hmac->ipad_opad_dma_addr);
-   SSI_LOG_DEBUG("Freed ipad_opad DMA buffer 
ipad_opad_dma_addr=%pad\n",
- >ipad_opad_dma_addr);
+   SSI_LOG_DEBUG
+   ("Freed ipad_opad DMA buffer 
ipad_opad_dma_addr=%pad\n",
+>ipad_opad_dma_addr);
hmac->ipad_opad_dma_addr = 0;
hmac->ipad_opad = NULL;
}
@@ -136,8 +139,9 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
dma_free_coherent(dev, MAX_HMAC_BLOCK_SIZE,
  hmac->padded_authkey,
  hmac->padded_authkey_dma_addr);
-   SSI_LOG_DEBUG("Freed padded_authkey DMA buffer 
padded_authkey_dma_addr=%pad\n",
- >padded_authkey_dma_addr);
+   SSI_LOG_DEBUG
+   ("Freed padded_authkey DMA buffer 
padded_authkey_dma_addr=%pad\n",
+>padded_authkey_dma_addr);
hmac->padded_authkey_dma_addr = 0;
hmac->padded_authkey = NULL;
}
@@ -150,8 +154,9 @@ static int ssi_aead_init(struct crypto_aead *tfm)
struct aead_alg *alg = crypto_aead_alg(tfm);
struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
struct ssi_crypto_alg *ssi_alg =
-   container_of(alg, struct ssi_crypto_alg, aead_alg);
-   SSI_LOG_DEBUG("Initializing context @%p for %s\n", ctx, 
crypto_tfm_alg_name(>base));
+   container_of(alg, struct ssi_crypto_alg, aead_alg);
+   SSI_LOG_DEBUG("Initializing context @%p for %s\n", ctx,
+ crypto_tfm_alg_name(>base));
 
/* Initialize modes in instance */
ctx->cipher_mode = ssi_alg->cipher_mode;
@@ -168,7 +173,8 @@ static int ssi_aead_init(struct crypto_aead *tfm)
SSI_LOG_ERR("Failed allocating key buffer\n");
goto init_failed;
}
-   SSI_LOG_DEBUG("Allocated enckey buffer in context ctx->enckey=@%p\n", 
ctx->enckey);
+   SSI_LOG_DEBUG("Allocated enckey buffer in context ctx->enckey=@%p\n",
+ ctx->enckey);
 
/* Set default authlen value */
 
@@ -200,13 +206,13 @@ static int ssi_aead_init(struct crypto_aead *tfm)
goto init_failed;
}
 
-   SSI_LOG_DEBUG("Allocated authkey buffer in context 
ctx->authkey=@%p\n",
- hmac->ipad_opad);
+   SSI_LOG_DEBUG
+   ("Allocated authkey buffer in context ctx->authkey=@%p\n",
+hmac->ipad_opad);
 
hmac->padded_authkey = dma_alloc_coherent(dev,
  MAX_HMAC_BLOCK_SIZE,
- pkey_dma,
- GFP_KERNEL);
+  

[PATCH v3 20/22] staging: ccree: replace noop macro with inline

[Gilad Ben-Yossef]

Replace noop macro with a noop inline function

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index 0b9c7e6..063a1cc 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -190,8 +190,8 @@ struct async_gen_req_ctx {
 #ifdef DX_DUMP_BYTES
 void dump_byte_array(const char *name, const u8 *the_array, unsigned long 
size);
 #else
-#define dump_byte_array(name, array, size) do {\
-} while (0);
+static inline void dump_byte_array(const char *name, const u8 *the_array,
+  unsigned long size) {};
 #endif
 
 int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe);
-- 
2.1.4

[PATCH v3 18/22] staging: ccree: move over to BIT macro for bit defines

[Gilad Ben-Yossef]

Use BIT macro for bit definitions where needed.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_cipher.h | 10 +-
 drivers/staging/ccree/ssi_driver.c |  3 ++-
 drivers/staging/ccree/ssi_driver.h |  6 +++---
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/staging/ccree/ssi_cipher.h 
b/drivers/staging/ccree/ssi_cipher.h
index 296b375..c9a83df 100644
--- a/drivers/staging/ccree/ssi_cipher.h
+++ b/drivers/staging/ccree/ssi_cipher.h
@@ -27,11 +27,11 @@
 #include "ssi_buffer_mgr.h"
 
 /* Crypto cipher flags */
-#define CC_CRYPTO_CIPHER_KEY_KFDE0(1 << 0)
-#define CC_CRYPTO_CIPHER_KEY_KFDE1(1 << 1)
-#define CC_CRYPTO_CIPHER_KEY_KFDE2(1 << 2)
-#define CC_CRYPTO_CIPHER_KEY_KFDE3(1 << 3)
-#define CC_CRYPTO_CIPHER_DU_SIZE_512B (1 << 4)
+#define CC_CRYPTO_CIPHER_KEY_KFDE0 BIT(0)
+#define CC_CRYPTO_CIPHER_KEY_KFDE1 BIT(1)
+#define CC_CRYPTO_CIPHER_KEY_KFDE2 BIT(2)
+#define CC_CRYPTO_CIPHER_KEY_KFDE3 BIT(3)
+#define CC_CRYPTO_CIPHER_DU_SIZE_512B  BIT(4)
 
 #define CC_CRYPTO_CIPHER_KEY_KFDE_MASK (CC_CRYPTO_CIPHER_KEY_KFDE0 | 
CC_CRYPTO_CIPHER_KEY_KFDE1 | CC_CRYPTO_CIPHER_KEY_KFDE2 | 
CC_CRYPTO_CIPHER_KEY_KFDE3)
 
diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 91c0b71..6ec5287 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -202,7 +202,8 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), val);
 
/* Unmask relevant interrupt cause */
-   val = (~(SSI_COMP_IRQ_MASK | SSI_AXI_ERR_IRQ_MASK | SSI_GPR0_IRQ_MASK));
+   val = (unsigned int)(~(SSI_COMP_IRQ_MASK | SSI_AXI_ERR_IRQ_MASK |
+  SSI_GPR0_IRQ_MASK));
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), val);
 
 #ifdef DX_HOST_IRQ_TIMER_INIT_VAL_REG_OFFSET
diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index e37a55a..0b9c7e6 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -68,12 +68,12 @@
 #define SSI_AXI_IRQ_MASK ((1 << DX_AXIM_CFG_BRESPMASK_BIT_SHIFT) | (1 << 
DX_AXIM_CFG_RRESPMASK_BIT_SHIFT) |\
(1 << DX_AXIM_CFG_INFLTMASK_BIT_SHIFT) | (1 << 
DX_AXIM_CFG_COMPMASK_BIT_SHIFT))
 
-#define SSI_AXI_ERR_IRQ_MASK (1 << DX_HOST_IRR_AXI_ERR_INT_BIT_SHIFT)
+#define SSI_AXI_ERR_IRQ_MASK BIT(DX_HOST_IRR_AXI_ERR_INT_BIT_SHIFT)
 
-#define SSI_COMP_IRQ_MASK (1 << DX_HOST_IRR_AXIM_COMP_INT_BIT_SHIFT)
+#define SSI_COMP_IRQ_MASK BIT(DX_HOST_IRR_AXIM_COMP_INT_BIT_SHIFT)
 
 /* TEE FIPS status interrupt */
-#define SSI_GPR0_IRQ_MASK (1 << DX_HOST_IRR_GPR0_BIT_SHIFT)
+#define SSI_GPR0_IRQ_MASK BIT(DX_HOST_IRR_GPR0_BIT_SHIFT)
 
 #define SSI_CRA_PRIO 3000
 
-- 
2.1.4

[PATCH v3 17/22] staging: ccree: clean up comments

[Gilad Ben-Yossef]

Clean up comments: fix style, trim long lines and remove useless ones.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c| 40 +
 drivers/staging/ccree/ssi_aead.h| 47 ++---
 drivers/staging/ccree/ssi_buffer_mgr.c  | 52 +
 drivers/staging/ccree/ssi_cipher.c  | 10 +--
 drivers/staging/ccree/ssi_config.h  |  7 +++--
 drivers/staging/ccree/ssi_driver.c  |  8 +++--
 drivers/staging/ccree/ssi_driver.h  |  9 --
 drivers/staging/ccree/ssi_hash.c| 16 +++---
 drivers/staging/ccree/ssi_hash.h| 10 +--
 drivers/staging/ccree/ssi_ivgen.c   |  7 +++--
 drivers/staging/ccree/ssi_ivgen.h   |  3 +-
 drivers/staging/ccree/ssi_request_mgr.c | 29 --
 drivers/staging/ccree/ssi_sysfs.c   |  9 +++---
 13 files changed, 167 insertions(+), 80 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 515a603..88305f0 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -267,7 +267,10 @@ static void ssi_aead_complete(struct device *dev, void 
*ssi_req,
ctx->authsize,

SSI_SG_FROM_BUF);
 
-   /* If an IV was generated, copy it back to the user provided 
buffer. */
+   /*
+* If an IV was generated, copy it back to the user provided
+* buffer.
+*/
if (areq_ctx->backup_giv) {
if (ctx->cipher_mode == DRV_CIPHER_CTR)
memcpy(areq_ctx->backup_giv,
@@ -288,8 +291,9 @@ static int xcbc_setkey(struct cc_hw_desc *desc, struct 
ssi_aead_ctx *ctx)
 {
/* Load the AES key */
hw_desc_init([0]);
-   /* We are using for the source/user key the same buffer as for the 
output keys,
-* because after this key loading it is not needed anymore
+   /* We are using for the source/user key the same buffer as for the
+* output keys, because after this key loading it is not needed
+* anymore.
 */
set_din_type([0], DMA_DLLI,
 ctx->auth_state.xcbc.xcbc_keys_dma_addr, ctx->auth_keylen,
@@ -1570,7 +1574,9 @@ static int config_ccm_adata(struct aead_request *req)
struct aead_req_ctx *req_ctx = aead_request_ctx(req);
//unsigned int size_of_a = 0, rem_a_size = 0;
unsigned int lp = req->iv[0];
-   /* Note: The code assume that req->iv[0] already contains the value of 
L' of RFC3610 */
+   /* Note: The code assumes that req->iv[0] already contains the value
+* of L' of RFC3610
+*/
unsigned int l = lp + 1;  /* This is L' of RFC 3610. */
unsigned int m = ctx->authsize;  /* This is M' of RFC 3610. */
u8 *b0 = req_ctx->ccm_config + CCM_B0_OFFSET;
@@ -1624,9 +1630,14 @@ static void ssi_rfc4309_ccm_process(struct aead_request 
*req)
 
/* L' */
memset(areq_ctx->ctr_iv, 0, AES_BLOCK_SIZE);
-   areq_ctx->ctr_iv[0] = 3;  /* For RFC 4309, always use 4 bytes for 
message length (at most 2^32-1 bytes). */
+   /* For RFC 4309, always use 4 bytes for message length
+* (at most 2^32-1 bytes).
+*/
+   areq_ctx->ctr_iv[0] = 3;
 
-   /* In RFC 4309 there is an 11-bytes nonce+IV part, that we build here. 
*/
+   /* In RFC 4309 there is an 11-bytes nonce+IV part, that we build
+* here.
+*/
memcpy(areq_ctx->ctr_iv + CCM_BLOCK_NONCE_OFFSET, ctx->ctr_nonce,
   CCM_BLOCK_NONCE_SIZE);
memcpy(areq_ctx->ctr_iv + CCM_BLOCK_IV_OFFSET, req->iv,
@@ -1701,7 +1712,9 @@ static inline void ssi_aead_gcm_setup_ghash_desc(struct 
aead_request *req,
set_setup_mode([idx], SETUP_LOAD_KEY0);
idx++;
 
-   /* Load GHASH initial STATE (which is 0). (for any hash there is an 
initial state) */
+   /* Load GHASH initial STATE (which is 0). (for any hash there is an
+* initial state).
+*/
hw_desc_init([idx]);
set_din_const([idx], 0x0, AES_BLOCK_SIZE);
set_dout_no_dma([idx], 0, 0, 1);
@@ -1938,7 +1951,10 @@ static int config_gcm_context(struct aead_request *req)
memcpy(_ctx->gcm_len_block.len_a, , sizeof(temp64));
temp64 = cpu_to_be64(cryptlen * 8);
memcpy(_ctx->gcm_len_block.len_c, , 8);
-   } else { //rfc4543=>  all data(AAD,IV,Plain) are considered additional 
data that is nothing is encrypted.
+   } else {
+   /* rfc4543=> all data(AAD,IV,Plain) are considered additional
+* data that is nothing is encrypted.
+*/
__be64 temp64;
 
temp64 =
@@ -2078,10 +2094,10 @@ static int ssi_aead_process(struct aead_request *req,
 

[PATCH v3 16/22] staging: ccree: fix spelling mistakes

[Gilad Ben-Yossef]

Fix various spelling mistakes in comments.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_cipher.c  | 2 +-
 drivers/staging/ccree/ssi_hash.c| 2 +-
 drivers/staging/ccree/ssi_hash.h| 2 +-
 drivers/staging/ccree/ssi_ivgen.c   | 2 +-
 drivers/staging/ccree/ssi_request_mgr.c | 2 +-
 drivers/staging/ccree/ssi_request_mgr.h | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index 8d65e97..e417bfd 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -697,7 +697,7 @@ static int ssi_blkcipher_complete(struct device *dev,
 
ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
 
-   /*Set the inflight couter value to local variable*/
+   /*Set the inflight counter value to local variable*/
inflight_counter =  ctx_p->drvdata->inflight_counter;
/*Decrease the inflight counter*/
if (ctx_p->flow_mode == BYPASS && ctx_p->drvdata->inflight_counter > 0)
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 6baa449..cfd5f5c 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -2575,7 +2575,7 @@ static void ssi_hash_create_data_desc(struct 
ahash_req_ctx *areq_ctx,
  * \param drvdata
  * \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256
  *
- * \return u32 The address of the inital digest in SRAM
+ * \return u32 The address of the initial digest in SRAM
  */
 ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode)
 {
diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h
index 2400e38..c884727 100644
--- a/drivers/staging/ccree/ssi_hash.h
+++ b/drivers/staging/ccree/ssi_hash.h
@@ -95,7 +95,7 @@ ssi_ahash_get_initial_digest_len_sram_addr(void *drvdata, u32 
mode);
  * \param drvdata
  * \param mode The Hash mode. Supported modes: 
MD5/SHA1/SHA224/SHA256/SHA384/SHA512
  *
- * \return u32 The address of the inital digest in SRAM
+ * \return u32 The address of the initial digest in SRAM
  */
 ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode);
 
diff --git a/drivers/staging/ccree/ssi_ivgen.c 
b/drivers/staging/ccree/ssi_ivgen.c
index 93a2a94..ba70237 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -200,7 +200,7 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata)
}
ivgen_ctx = drvdata->ivgen_handle;
 
-   /* Allocate pool's header for intial enc. key/IV */
+   /* Allocate pool's header for initial enc. key/IV */
ivgen_ctx->pool_meta = dma_alloc_coherent(device, SSI_IVPOOL_META_SIZE,
  _ctx->pool_meta_dma,
  GFP_KERNEL);
diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index 27324bb..9ca2536 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -205,7 +205,7 @@ static inline int request_mgr_queues_status_check(
unsigned long poll_queue;
 
/* SW queue is checked only once as it will not
-* be chaned during the poll becasue the spinlock_bh
+* be chaned during the poll because the spinlock_bh
 * is held by the thread
 */
if (unlikely(((req_mgr_h->req_queue_head + 1) &
diff --git a/drivers/staging/ccree/ssi_request_mgr.h 
b/drivers/staging/ccree/ssi_request_mgr.h
index bdbbf89..b248fb6 100644
--- a/drivers/staging/ccree/ssi_request_mgr.h
+++ b/drivers/staging/ccree/ssi_request_mgr.h
@@ -36,7 +36,7 @@ int request_mgr_init(struct ssi_drvdata *drvdata);
  *   If "false": this function adds a dummy descriptor completion
  *   and waits upon completion signal.
  *
- * \return int Returns -EINPROGRESS if "is_dout=ture"; "0" if "is_dout=false"
+ * \return int Returns -EINPROGRESS if "is_dout=true"; "0" if "is_dout=false"
  */
 int send_request(
struct ssi_drvdata *drvdata, struct ssi_crypto_req *ssi_req,
-- 
2.1.4

[PATCH v3 19/22] staging: ccree: fix code indent

[Gilad Ben-Yossef]

Fix multiple code indentation issues.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 23 ---
 drivers/staging/ccree/ssi_cipher.c |  2 +-
 drivers/staging/ccree/ssi_sysfs.c  |  4 +++-
 3 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 202387b..051d948 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -420,8 +420,8 @@ ssi_aead_handle_config_buf(struct device *dev,
sg_init_one(_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + 
areq_ctx->ccm_hdr_size);
if (unlikely(dma_map_sg(dev, _ctx->ccm_adata_sg, 1,
DMA_TO_DEVICE) != 1)) {
-   SSI_LOG_ERR("dma_map_sg() config buffer failed\n");
-   return -ENOMEM;
+   SSI_LOG_ERR("dma_map_sg() config buffer failed\n");
+   return -ENOMEM;
}
SSI_LOG_DEBUG("Mapped curr_buff: dma_address=%pad page=%p addr=%pK "
 "offset=%u length=%u\n",
@@ -451,8 +451,8 @@ static inline int ssi_ahash_handle_curr_buf(struct device 
*dev,
sg_init_one(areq_ctx->buff_sg, curr_buff, curr_buff_cnt);
if (unlikely(dma_map_sg(dev, areq_ctx->buff_sg, 1,
DMA_TO_DEVICE) != 1)) {
-   SSI_LOG_ERR("dma_map_sg() src buffer failed\n");
-   return -ENOMEM;
+   SSI_LOG_ERR("dma_map_sg() src buffer failed\n");
+   return -ENOMEM;
}
SSI_LOG_DEBUG("Mapped curr_buff: dma_address=%pad page=%p addr=%pK "
 "offset=%u length=%u\n",
@@ -1050,15 +1050,16 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
 * verification is made by CPU compare in order to
 * simplify MAC verification upon request completion
 */
- u32 size_to_skip = req->assoclen;
+   u32 size_to_skip = req->assoclen;
 
- if (areq_ctx->is_gcm4543)
- size_to_skip += crypto_aead_ivsize(tfm);
+   if (areq_ctx->is_gcm4543)
+   size_to_skip += crypto_aead_ivsize(tfm);
 
- ssi_buffer_mgr_copy_scatterlist_portion(
- areq_ctx->backup_mac, req->src,
- size_to_skip + req->cryptlen - 
areq_ctx->req_authsize,
- size_to_skip + req->cryptlen, SSI_SG_TO_BUF);
+   
ssi_buffer_mgr_copy_scatterlist_portion(areq_ctx->backup_mac,
+   req->src,
+   size_to_skip + 
req->cryptlen - areq_ctx->req_authsize,
+   size_to_skip + 
req->cryptlen,
+   SSI_SG_TO_BUF);
areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
} else { /* Contig. ICV */
/*Should hanlde if the sg is not contig.*/
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index 14930ce..aa722e1 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -139,7 +139,7 @@ static int validate_data_size(struct ssi_ablkcipher_ctx 
*ctx_p, unsigned int siz
break;
case S_DIN_to_DES:
if (likely(IS_ALIGNED(size, DES_BLOCK_SIZE)))
-   return 0;
+   return 0;
break;
 #if SSI_CC_HAS_MULTI2
case S_DIN_to_MULTI2:
diff --git a/drivers/staging/ccree/ssi_sysfs.c 
b/drivers/staging/ccree/ssi_sysfs.c
index a0ab3c6..40cd3be2 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -316,7 +316,9 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj,
 
offset += scnprintf(buf + offset, PAGE_SIZE - offset, "Usage:\n");
for (i = 0; i < ARRAY_SIZE(help_str); i += 2)
-  offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s\t\t%s\n", 
help_str[i], help_str[i + 1]);
+   offset += scnprintf(buf + offset, PAGE_SIZE - offset,
+   "%s\t\t%s\n", help_str[i],
+   help_str[i + 1]);
 
return offset;
 }
-- 
2.1.4

[PATCH v3 22/22] staging: ccree: remove BUG macro usage

[Gilad Ben-Yossef]

Replace BUG() macro usage that crash the kernel with alternatives
that signal error and/or try to recover.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c  | 14 ++
 drivers/staging/ccree/ssi_cipher.c  |  1 -
 drivers/staging/ccree/ssi_pm.c  |  3 ++-
 drivers/staging/ccree/ssi_request_mgr.c | 23 +--
 4 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 051d948..6d5af50 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -86,11 +86,6 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
unsigned int nents = 0;
 
while (nbytes != 0) {
-   if (sg_is_chain(sg_list)) {
-   SSI_LOG_ERR("Unexpected chained entry in sg (entry 
=0x%X)\n",
-   nents);
-   BUG();
-   }
if (sg_list->length != 0) {
nents++;
/* get the number of bytes in the last entry */
@@ -861,7 +856,8 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
 * unexpected
 */ if (!current_sg) {
SSI_LOG_ERR("reached end of sg list. 
unexpected\n");
-   BUG();
+   rc = -EINVAL;
+   goto chain_assoc_exit;
}
sg_index += current_sg->length;
mapped_nents++;
@@ -1163,7 +1159,8 @@ static inline int ssi_buffer_mgr_aead_chain_data(
//if have reached the end of the sgl, then this is unexpected
if (!areq_ctx->src_sgl) {
SSI_LOG_ERR("reached end of sg list. unexpected\n");
-   BUG();
+   return -EINVAL;
+   goto chain_data_exit;
}
sg_index += areq_ctx->src_sgl->length;
src_mapped_nents--;
@@ -1207,7 +1204,8 @@ static inline int ssi_buffer_mgr_aead_chain_data(
//if have reached the end of the sgl, then this is unexpected
if (!areq_ctx->dst_sgl) {
SSI_LOG_ERR("reached end of sg list. unexpected\n");
-   BUG();
+   rc = -EINVAL;
+   goto chain_data_exit;
}
sg_index += areq_ctx->dst_sgl->length;
dst_mapped_nents--;
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index cc550b5..73ba4eb 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -543,7 +543,6 @@ ssi_blkcipher_create_setup_desc(
break;
default:
SSI_LOG_ERR("Unsupported cipher mode (%d)\n", cipher_mode);
-   BUG();
}
 }
 
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index 31325e6..a50671a 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -109,7 +109,8 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev)
rc = pm_runtime_put_autosuspend(dev);
} else {
/* Something wrong happens*/
-   BUG();
+   SSI_LOG_ERR("request to suspend already suspended queue");
+   rc = -EBUSY;
}
return rc;
 }
diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index b671eff..8bf72e7 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -366,11 +366,16 @@ int send_request(
enqueue_seq(cc_base, _mgr_h->compl_desc, (is_dout ? 0 : 1));
 
if (unlikely(req_mgr_h->q_free_slots < total_seq_len)) {
-   /*This means that there was a problem with the resume*/
-   BUG();
+   /* This situation should never occur. Maybe indicating problem
+* with resuming power. Set the free slot count to 0 and hope
+* for the best.
+*/
+   SSI_LOG_ERR("HW free slot count mismatch.");
+   req_mgr_h->q_free_slots = 0;
+   } else {
+   /* Update the free slots in HW queue */
+   req_mgr_h->q_free_slots -= total_seq_len;
}
-   /* Update the free slots in HW queue */
-   req_mgr_h->q_free_slots -= total_seq_len;
 
spin_unlock_bh(_mgr_h->hw_lock);
 
@@ -459,8 +464,13 @@ static void proc_completions(struct ssi_drvdata *drvdata)
 
/* Dequeue request */
if (unlikely(request_mgr_handle->req_queue_head == 
request_mgr_handle->req_queue_tail)) {
-   SSI_LOG_ERR("Request queue is empty 

[PATCH v3 21/22] staging: ccree: save ciphertext for CTS IV

[Gilad Ben-Yossef]

The crypto API requires saving the last blocks of ciphertext
in req->info for use as IV for CTS mode. The ccree driver
was not doing it and so failing tcrypt tests in some
situations. This patch fixes the issue.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_cipher.c | 31 +--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index aa722e1..cc550b5 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ssi_config.h"
 #include "ssi_driver.h"
@@ -696,6 +697,7 @@ static int ssi_blkcipher_complete(struct device *dev,
 {
int completion_error = 0;
u32 inflight_counter;
+   struct ablkcipher_request *req = (struct ablkcipher_request *)areq;
 
ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
 
@@ -706,6 +708,22 @@ static int ssi_blkcipher_complete(struct device *dev,
ctx_p->drvdata->inflight_counter--;
 
if (areq) {
+   /*
+* The crypto API expects us to set the req->info to the last
+* ciphertext block. For encrypt, simply copy from the result.
+* For decrypt, we must copy from a saved buffer since this
+* could be an in-place decryption operation and the src is
+* lost by this point.
+*/
+   if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT)  {
+   memcpy(req->info, req_ctx->backup_info, ivsize);
+   kfree(req_ctx->backup_info);
+   } else {
+   scatterwalk_map_and_copy(req->info, req->dst,
+(req->nbytes - ivsize),
+ivsize, 0);
+   }
+
ablkcipher_request_complete(areq, completion_error);
return 0;
}
@@ -859,7 +877,6 @@ static int ssi_ablkcipher_encrypt(struct ablkcipher_request 
*req)
struct blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(req);
unsigned int ivsize = crypto_ablkcipher_ivsize(ablk_tfm);
 
-   req_ctx->backup_info = req->info;
req_ctx->is_giv = false;
 
return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, 
req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_ENCRYPT);
@@ -872,8 +889,18 @@ static int ssi_ablkcipher_decrypt(struct 
ablkcipher_request *req)
struct blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(req);
unsigned int ivsize = crypto_ablkcipher_ivsize(ablk_tfm);
 
-   req_ctx->backup_info = req->info;
+   /*
+* Allocate and save the last IV sized bytes of the source, which will
+* be lost in case of in-place decryption and might be needed for CTS.
+*/
+   req_ctx->backup_info = kmalloc(ivsize, GFP_KERNEL);
+   if (!req_ctx->backup_info)
+   return -ENOMEM;
+
+   scatterwalk_map_and_copy(req_ctx->backup_info, req->src,
+(req->nbytes - ivsize), ivsize, 0);
req_ctx->is_giv = false;
+
return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, 
req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_DECRYPT);
 }
 
-- 
2.1.4

[PATCH v3 00/22] staging: ccree: fixes and simplifications

[Gilad Ben-Yossef]

The series includes various bug fixes, code simplification and style
cleanups. 

Changer from v2:
- Drop M32R as supported architecture, which resolve the kbuild bot
  warnings on Joe Perches patch.
- Bug fix that properly saves last bytes of ciphertext for CTS in
  skcipher
- Even more coding style fixes

Changes from v1:

- Rebase on top of current staging-next.
- Added resource release on error simplification patch suggested by
  Dan C. as part of the review.

Based on top of staging-next commit 0116ced91d3a
("staging: fsl-mc: add explicit dependencies for compile-tested arches")

Gilad Ben-Yossef (18):
  staging: ccree: fix split strings
  staging: ccree: kmalloc by sizeof var not type
  staging: ccree: simplify resource release on error
  staging: ccree: remove unused completion
  staging: ccree: remove m32r as supported platform
  staging: ccree: rewrite GET_DMA_BUFFER_TYPE as func
  staging: ccree: fix line indentation and breaks
  staging: ccree: align box comment correctly
  staging: ccree: fix line indentation and breaks
  staging: ccree: fix struct init braces
  staging: ccree: fix line indentation and breaks
  staging: ccree: fix spelling mistakes
  staging: ccree: clean up comments
  staging: ccree: move over to BIT macro for bit defines
  staging: ccree: fix code indent
  staging: ccree: replace noop macro with inline
  staging: ccree: save ciphertext for CTS IV
  staging: ccree: remove BUG macro usage

Joe Perches (1):
  staging: ccree: Fix format/argument mismatches

Suniel Mahesh (3):
  staging: ccree: Replace kzalloc with devm_kzalloc
  staging: ccree: Convert to devm_ioremap_resource for map, unmap
  staging: ccree: Use platform_get_irq and devm_request_irq

 drivers/staging/ccree/Kconfig   |2 +-
 drivers/staging/ccree/ssi_aead.c| 1076 ---
 drivers/staging/ccree/ssi_aead.h|   47 +-
 drivers/staging/ccree/ssi_buffer_mgr.c  |  216 ---
 drivers/staging/ccree/ssi_buffer_mgr.h  |6 +-
 drivers/staging/ccree/ssi_cipher.c  |   88 ++-
 drivers/staging/ccree/ssi_cipher.h  |   10 +-
 drivers/staging/ccree/ssi_config.h  |7 +-
 drivers/staging/ccree/ssi_driver.c  |  306 +
 drivers/staging/ccree/ssi_driver.h  |   26 +-
 drivers/staging/ccree/ssi_hash.c|  598 +
 drivers/staging/ccree/ssi_hash.h|   12 +-
 drivers/staging/ccree/ssi_ivgen.c   |   19 +-
 drivers/staging/ccree/ssi_ivgen.h   |3 +-
 drivers/staging/ccree/ssi_pm.c  |3 +-
 drivers/staging/ccree/ssi_request_mgr.c |   75 ++-
 drivers/staging/ccree/ssi_request_mgr.h |2 +-
 drivers/staging/ccree/ssi_sysfs.c   |   13 +-
 18 files changed, 1364 insertions(+), 1145 deletions(-)

-- 
2.1.4