Re: [V1, 1/2] i2c: brcmstb: Adding support for CM and DSL SoCs

[Wolfram Sang]

On Wed, Dec 16, 2015 at 03:49:09PM -0500, Kamal Dasu wrote:
> Broadcoms DSL, CM (cable modem)and STB I2C core implementation have
> 8 data in/out registers that can transfer 8 bytes or 32 bytes max.
> Cable and DSL "Peripheral" i2c cores use single byte per data
> register and the STB can use 4 byte per data register transfer.
> Adding support to take care of this difference. Accordingly added
> the compatible string for SoCs using the "Peripheral" I2C block.
> 
> Signed-off-by: Kamal Dasu 

Squashed both patches and applied to for-next, thanks!



signature.asc
Description: Digital signature

Re: [V1, 1/2] i2c: brcmstb: Adding support for CM and DSL SoCs

[Florian Fainelli]

On 16/12/15 12:49, Kamal Dasu wrote:
> Broadcoms DSL, CM (cable modem)and STB I2C core implementation have
> 8 data in/out registers that can transfer 8 bytes or 32 bytes max.
> Cable and DSL "Peripheral" i2c cores use single byte per data
> register and the STB can use 4 byte per data register transfer.
> Adding support to take care of this difference. Accordingly added
> the compatible string for SoCs using the "Peripheral" I2C block.
> 
> Signed-off-by: Kamal Dasu 

Reviewed-by: Florian Fainelli 

Thanks Kamal!

> ---
>  drivers/i2c/busses/i2c-brcmstb.c | 80 
> 
>  1 file changed, 56 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-brcmstb.c 
> b/drivers/i2c/busses/i2c-brcmstb.c
> index 8e9637e..3711df1 100644
> --- a/drivers/i2c/busses/i2c-brcmstb.c
> +++ b/drivers/i2c/busses/i2c-brcmstb.c
> @@ -25,13 +25,16 @@
>  #include 
>  
>  #define N_DATA_REGS  8
> -#define N_DATA_BYTES (N_DATA_REGS * 4)
>  
> -/* BSC count register field definitions */
> -#define BSC_CNT_REG1_MASK0x003f
> -#define BSC_CNT_REG1_SHIFT   0
> -#define BSC_CNT_REG2_MASK0x0fc0
> -#define BSC_CNT_REG2_SHIFT   6
> +/*
> + * PER_I2C/BSC count register mask depends on 1 byte/4 byte data register
> + * size. Cable modem and DSL SoCs with Peripheral i2c cores use 1 byte per
> + * data register whereas STB SoCs use 4 byte per data register transfer,
> + * account for this difference in total count per transaction and mask to
> + * use.
> + */
> +#define BSC_CNT_REG1_MASK(nb)(nb == 1 ? GENMASK(3, 0) : GENMASK(5, 
> 0))
> +#define BSC_CNT_REG1_SHIFT   0
>  
>  /* BSC CTL register field definitions */
>  #define BSC_CTL_REG_DTF_MASK 0x0003
> @@ -41,7 +44,7 @@
>  #define BSC_CTL_REG_INT_EN_SHIFT 6
>  #define BSC_CTL_REG_DIV_CLK_MASK 0x0080
>  
> -/* BSC_IIC_ENABLE r/w enable and interrupt field defintions */
> +/* BSC_IIC_ENABLE r/w enable and interrupt field definitions */
>  #define BSC_IIC_EN_RESTART_MASK  0x0040
>  #define BSC_IIC_EN_NOSTART_MASK  0x0020
>  #define BSC_IIC_EN_NOSTOP_MASK   0x0010
> @@ -169,6 +172,7 @@ struct brcmstb_i2c_dev {
>   struct completion done;
>   bool is_suspended;
>   u32 clk_freq_hz;
> + int data_regsz;
>  };
>  
>  /* register accessors for both be and le cpu arch */
> @@ -186,6 +190,16 @@ struct brcmstb_i2c_dev {
>  #define bsc_writel(_dev, _val, _reg) \
>   __bsc_writel(_val, _dev->base + offsetof(struct bsc_regs, _reg))
>  
> +static inline int brcmstb_i2c_get_xfersz(struct brcmstb_i2c_dev *dev)
> +{
> + return (N_DATA_REGS * dev->data_regsz);
> +}
> +
> +static inline int brcmstb_i2c_get_data_regsz(struct brcmstb_i2c_dev *dev)
> +{
> + return dev->data_regsz;
> +}
> +
>  static void brcmstb_i2c_enable_disable_irq(struct brcmstb_i2c_dev *dev,
>  bool int_en)
>  {
> @@ -323,14 +337,16 @@ static int brcmstb_i2c_xfer_bsc_data(struct 
> brcmstb_i2c_dev *dev,
>u8 *buf, unsigned int len,
>struct i2c_msg *pmsg)
>  {
> - int cnt, byte, rc;
> + int cnt, byte, i, rc;
>   enum bsc_xfer_cmd cmd;
>   u32 ctl_reg;
>   struct bsc_regs *pi2creg = dev->bsc_regmap;
>   int no_ack = pmsg->flags & I2C_M_IGNORE_NAK;
> + int data_regsz = brcmstb_i2c_get_data_regsz(dev);
> + int xfersz = brcmstb_i2c_get_xfersz(dev);
>  
>   /* see if the transaction needs to check NACK conditions */
> - if (no_ack || len <= N_DATA_BYTES) {
> + if (no_ack || len <= xfersz) {
>   cmd = (pmsg->flags & I2C_M_RD) ? CMD_RD_NOACK
>   : CMD_WR_NOACK;
>   pi2creg->ctlhi_reg |= BSC_CTLHI_REG_IGNORE_ACK_MASK;
> @@ -348,20 +364,22 @@ static int brcmstb_i2c_xfer_bsc_data(struct 
> brcmstb_i2c_dev *dev,
>   pi2creg->ctl_reg = ctl_reg | DTF_RD_MASK;
>  
>   /* set the read/write length */
> - bsc_writel(dev, BSC_CNT_REG1_MASK & (len << BSC_CNT_REG1_SHIFT),
> -cnt_reg);
> + bsc_writel(dev, BSC_CNT_REG1_MASK(data_regsz) &
> +(len << BSC_CNT_REG1_SHIFT), cnt_reg);
>  
>   /* Write data into data_in register */
> +
>   if (cmd == CMD_WR || cmd == CMD_WR_NOACK) {
> - for (cnt = 0; cnt < len; cnt += 4) {
> + for (cnt = 0, i = 0; cnt < len; cnt += data_regsz, i++) {
>   u32 word = 0;
>  
> - for (byte = 0; byte < 4; byte++) {
> - word >>= 8;
> + for (byte = 0; byte < data_regsz; byte++) {